Design a multi-cycle implementation of the reduced MIPS architecture
Design a multi-cycle implementation of the reduced MIPS architecture and implement it on the DE2-115 board. You will need to add I/O to the approach discussed in the text and in class. Add the following peripherals: interrupt system connected to a push button, slide switches, green LEDs, red LEDs, and the 7-segment display. Develop a test program to verify you machine works and run it on the simulator and on the board.
The design can be based on the system in the text but you should maximize the use of behavioral code as opposed to the approach used in the text. The control unit and the alu should be done behaviorally at a minimum.
Provide a report which documents your design, implementation and results. Include data from simulations in the form of screen captures, photos, etc. Include copies of your code in an appendix to the report.
and more informationi are on the file,and image, please check
- 7seg.zip
- DATA_I_O_Memory.zip
- WeChatImage_20171129140541.jpg
- EnableICMPEchoRequest.pdf
- WeChatImage_20171129142129.jpg
- WeChatImage_20171129140534.jpg
- WeChatImage_20171129142132.jpg
- WeChatImage_20171129142134.jpg
- WeChatImage_20171129142140.jpg
- WeChatImage_20171129142137.jpg
- NotesforFinalProject.pptx
- ECE449-Session_12.ppt
- sourcecodefromtext.zip
9 years ago
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