CSUN COMP 222 Practice Set: Binary Subtraction via
Twos Complement
Topic: Binary Subtraction, Twos Complement Conversion, and Signed Overflow Detection
Instructions: For all subtraction problems, assume the specified bit-width and Twos Complement
representation unless otherwise noted. Show your work (Twos Complement conversion and final
addition). Determine the final binary result, the Carry Flag (
C
), and the Overflow Flag (
V
).
Page 1: Section 1 - Fundamentals and Twos Complement Conversion (Easy)
This section focuses on the foundational mechanics of the Twos Complement system.
Question 1.1: Range Determination
What is the full range of signed decimal values (from minimum to maximum) that can be
represented in a 6-bit Twos Complement system?
Minimum Value:
Maximum Value:
Question 1.2: Twos Complement Conversion
Determine the 8-bit Twos Complement representation for the decimal number
−7810
.
Binary of 7810
:
Two’s Complement of−7810
:
Question 1.3: Decimal Conversion
What is the decimal value of the following 8-bit Twos Complement binary number?
R=101100102
Decimal Value:
Question 1.4: Subtrahend Conversion
Prepare the subtrahend for the operation
−1510 −4510
. What is the 8-bit Twos Complement
representation of
−4510
(i.e., the term being added)?
Twos Complement of
4510
:
Question 1.5: Sign Extension
Extend the 4-bit Twos Complement number
10112
(representing
−510
) to its correct 8-bit
representation.
8-bit Value:
Page 2: Section 2 - 8-Bit Subtraction: Non-Overflow Cases (Moderate)
Perform the following 8-bit subtraction operations. These problems are designed to result in
correct, non-overflowing results.
Question 2.1: Positive Result
Compute the 8-bit Twos Complement subtraction:
10010 −6010
Two’s Complement of6010
:
Addition (Show Work)
:
8-bit Binary Result (R)
:
Carry Flag (C)
:
Overflow Flag (V)
:
Question 2.2: Negative Result
Compute the 8-bit Twos Complement subtraction:
2510 −8010
Two’s Complement of8010
:
Addition (Show Work)
:
8-bit Binary Result (R)
:
Carry Flag (C)
:
Overflow Flag (V)
:
Question 2.3: Subtraction of a Negative Number
Compute the 8-bit Twos Complement subtraction:
7510 −(−2510)
Two’s Complement of−2510
:
Addition (Show Work)
:
8-bit Binary Result (R)
:
Carry Flag (C)
:
Overflow Flag (V)
:
Question 2.4: Subtraction of Two Negative Numbers
Compute the 8-bit Twos Complement subtraction:
-1010 −(−5010 )
Two’s Complement of−5010
:
Addition (Show Work)
:
8-bit Binary Result (R)
:
Carry Flag (C)
:
Overflow Flag (V)
:
Question 2.5: Mixed Operation
Determine the 8-bit decimal result of the following twos complement binary subtraction:
111110002−000000102
Minuend(111110002)in Decimal
:
Subtrahend(000000102)in Decimal
:
Final Decimal Result
:
Page 3: Section 3 - Overflow Detection and Analysis (Advanced)
These 8-bit problems are designed to cause signed overflow. Focus on detecting the overflow
using the flag and explaining why the result is incorrect.
Question 3.1: Positive Overflow
Compute the 8-bit Twos Complement subtraction:
12010 −(−2010)
Addition (Show Work)
:
8-bit Binary Result (R)
:
Overflow Flag (V)
:
Why is the result incorrect?
:
Question 3.2: Negative Overflow
Compute the 8-bit Twos Complement subtraction:
- 8010 −5510
Addition (Show Work)
:
8-bit Binary Result (R)
:
Overflow Flag (V)
:
Why is the result incorrect?
:
Question 3.3: Flag Calculation (Conceptual)
If an 8-bit Twos Complement addition resulted in a Carry-In to the MSB of
0
and a Carry-Out from
the MSB of
1
, what is the value of the Overflow Flag
V
, and what does this imply about the signs
of the two effective operands being added?
V Flag
:
Implication about Operands
:
Question 3.4: Overflow Condition
Explain the single necessary condition related to the signs of the effective operands (
A
and
− B
)
and the result (
R
) that must be met for a signed overflow (
V=1
) to occur.
Question 3.5: Minimal Overflow
In an 8-bit system, what is the smallest positive integer
P
such that the subtraction
12710 −(− P)
will cause a signed overflow?
Value of P
:
Page 4: Section 4 - Application and 16-Bit Operations (Expert)
This section applies the concepts to larger bit-widths and different number bases, focusing on the
assembly language implications.
Question 4.1: 16-Bit Subtraction
Compute the 16-bit Twos Complement subtraction:
50010 −100010
Two’s Complement of100010
:
16-bit Binary Result (R)
:
V Flag
:
Question 4.2: Hexadecimal Subtraction (8-bit)
Compute the 8-bit Twos Complement subtraction in Hexadecimal format:
C316 −1816
Two’s Complement of1816 (Hex)
:
Hex Addition (Show Work)
:
Final Hex Result
:
Question 4.3: Unsigned vs. Signed Flag
An 8-bit subtraction yields a result
R=101010102
and sets the Carry Flag
C=0
and Overflow
Flag
V=1
.
What is the signed decimal value of R?
:
What is the unsigned decimal value of R?
:
Which value (signed or unsigned) is mathematically correct?
:
Question 4.4: Flag Usage in Assembly
In an Assembly routine following an 8-bit subtraction, a programmer wants to check if the
Minuend
A
was strictly less than the Subtrahend
B
in the unsigned context. Which flag should
they check, and what value should that flag have?
Question 4.5: Conditional Jumps
A signed subtraction operation yields
R=010101012
(Positive) and
V=1
. If the next
instruction is a conditional jump JNL (Jump if Not Less than, i.e., jump if the result is greater than
or equal to zero, taking overflow into account), will the jump be taken? Explain why, based on the
effective sign.
Page 5: Answer Key and Detailed Rationale
Section 1: Fundamentals and Twos Complement Conversion
Q
Answer
Rationale
1.1
Min:
−32
, Max:
31
The range is
-2N−1
to
2N−1−1
. For
N=6
, this is
-25=- 32
to
25−1=31
.
1.2
Binary of 7810
:
010011102
Two’s Complement of−7810
:
101100102
Inversion (
101100012
) plus
1
yields
101100102
.
1.3
-7810
Since the MSB is
1
, the number is negative. Twos Complement of
101100102
is
010011102
,
which is
7810
. Thus, the original number is
−7810
.
1.4
110100112
The operation is
-15+(−45)
. We need the Twos Complement of
4510
(
001011012
), which is
110100112
.
1.5
111110112
The sign bit (MSB, which is
1
) must be copied to all added higher-order bits to preserve the
negative magnitude.
Section 2: 8-Bit Subtraction: Non-Overflow Cases
Q
Final Result & Flags
Rationale
2.1
R=001010002
(
+4010
).
C=1
,
V=0
.
100+(−60)
. Two positive numbers would be added. Result
40
is correct and within range.
V=0
as opposite signs were added.
2.2
R=110010112
(
−5510
).
C=0
,
V=0
.
25+(−80)
. The effective operands are opposite signs, so
V=0
(no overflow). The result is
negative, which is mathematically correct.
2.3
R=011001002
(
+10010
).
C=0
,
V=1
.
75 −(−25)=75+25
. Two positive numbers added. Result
100
is positive, consistent with the
operands. No overflow. (
Cin=0, C out=0
).
2.4
R=001010002
(
+4010
).
C=1
,
V=0
.
-10 −(−50)=-10+50
. Opposite signs added. Result
40
is correct and positive.
V=0
is
expected.
2.5
Minuend=- 810
,
Subtrahend=210
.
Final Result=-1010
.
−8−2=−10
. In binary:
−8+(−2)
→111110002+111111102=(1)111101102
(
−1010
).
Section 3: Overflow Detection and Analysis
Q
Final Result & Flags
Rationale
3.1
R=100010002
(
−12010
).
V=1
.
Addition :120+20=140
. The true result
(+140)
exceeds max
(+127)
. The sum of two
positive numbers yielded a negative result (MSB flipped), setting
V=1
.
3.2
R=011110112
(
+12310
).
V=1
.
Addition :-80+(-55)=- 135
. The true result
(−135)
is below min
(−128)
. The sum of two
negative numbers yielded a positive result (MSB flipped), setting
V=1
.
3.3
V Flag=1 (since 0 ⊕1=1¿
.
Implication :Two effective operands had the same sign
.
The condition
Cin, MSB ≠Cout, MSB
implies an overflow, which only happens when adding two
numbers of the same sign.
3.4
Signed overflow occurs only if the two effective operands being added (
A
and
-B
) have the
same sign, but the final result
R
has the opposite sign.
This is the primary sign-check rule for overflow detection.
3.5
Value of P=110
.
The operation is
127+P
. Since
127
is the maximum positive value, adding
P=1
results in
128
.
This sum exceeds the maximum, causing positive overflow.
Section 4: Application and 16-Bit Operations
Q
Final Result & Flags
Rationale
4.1
Two’s C of100010 :11111100000100002
.
R :11111110000100002
(
-50010
).
V=0
.
500+(−1000)
. Opposite signs added. Result
−500
is correct and within the 16-bit range (
−32768
to
32767
). No overflow.
4.2
Two’s C of1816 : E816
.
Hex Addition : A516 +E816=(1)8 D16
.
Final Hex Result :8 D16
.
C316 →110000112
(
-6110
). The addition is
-61+(- 24 )
. The result
- 8510
is
8 D16
.
V=0
.
4.3
Signed Decimal Value of R :-8610
.
Unsigned Decimal Value of R :17010
.
Mathematically Correct Value : Unsigned
.
The operation must have been in the unsigned context to yield
V=1
but have
C=0
. The
V=1
means the signed result
−86
is incorrect; the unsigned result
170
is correct, given the inputs.
4.4
Check the Carry Flag (
C
). The flag should have a value of
C=0
.
In the unsigned context,
C=0
after a subtraction means a borrow occurred, which signifies that
the subtrahend was larger than the minuend (
A<B
).
4.5
The jump will NOT be taken.
The result
R=010101012
is positive. However,
V=1
means a negative overflow occurred (i.e.,
we added two negatives and got a positive). The true mathematical result is negative. Conditional
jumps on signed numbers (like JNL) use the effective sign:
N⊕V
. Since
N=0
(result is positive)
and
V=1
, the effective sign is
0⊕1=1
(Negative). The jump is skipped because the effective
result is less than zero.
