Exam Computer System Architecture

1. Parallel communication is impractical for long haul communication because of ___________ and _____________.issues.

2. Research Question: In the lc3 how many LOAD instructions are used in lc3 Instruction set architecture..

3. Superscalar architectures can execute more than ______________ __________ at a time.

4. Encode -13 into an 8 bit 2’s complement binary integer.

5. Encode -13 into an 8 bit signed binary integer.

6. Encode -13 into a 1’s complement binary integer.

7. Two alternatives to using Programmed I/O in a computer architecture _______________ and ______________/

8. A parity bit is added to every ___________.

9. a Steaming image of a file looks most closely like the ___________ _________ representation of the file.

10. The internal level of a data base describes the ______________architecture of the data base.

11. Embedded operating systems are often known as ____________________ operating systems.

12. After system boot what part of an operating system must always be memory resident ___________________

13. Research Question: Investigate the lc3 microcomputer. What type of I/O does this 16 bit micro use ________________

14. What is the fastest memory in every computer system _________________.

15. Human interface functions like GUIs and File management systems are not needed in ___________applications

16. Memory that a relatively long distance from the CPU is usually _______________ but ___________.

17. Encode the mixed fraction -3 1/32 as an IEEE floating point binary value.

18. When the CPU; receives an interrupt it polls devices on the basis of ____________________.

19. What technology is used to store large amounts of data very securely for many years _____________

20. What is the base 10 value of the one’s complement binary integer 1110 1110?

21. An ____________________computer is programmed using jumper wires,

22. The ALU is used to perform ______________ ________________

23. Research Question:… A ___________circuit is a pre-planned route between CPUs that is established for ALL packets in a packet switched network.

24. DMA devices access _______________ directly.

25. The control unit is used to determine the _________________of instruction execution.