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PREDICTIVE CONTROL OF

MULTILEVEL CONVERTERS FOR

MEGAWATT WIND ENERGY

CONVERSION SYSTEMS

Venkata Narasimha Rao Yaramasu

B. Tech., J. N. T. University, Hyderabad, India, 2005

M. E., S. G. S. Institute of Technology and Science, Indore, India, 2008

A dissertation

presented to Ryerson University

in partial fulfillment of the

requirements for the degree of

Doctor of Philosophy

in the Program of

Electrical and Computer Engineering

Toronto, Ontario, Canada, 2014

c©Venkata Narasimha Rao Yaramasu, 2014

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Author’s Declaration

I hereby declare that I am the sole author of this dissertation. This is a true copy of the

dissertation, including any required final revisions, as accepted by my examiners.

I authorize Ryerson University to lend this dissertation to other institutions or individuals

for the purpose of scholarly research.

I further authorize Ryerson University to reproduce this dissertation by photocopying or by

other means, in total or in part, at the request of other institutions or individuals for the

purpose of scholarly research.

I understand that my dissertation may be made electronically available to the public.

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Predictive Control of Multilevel

Converters for Megawatt Wind

Energy Conversion Systems

Venkata Narasimha Rao Yaramasu

Doctor of Philosophy

Electrical and Computer Engineering

Ryerson University, Toronto, 2014

Abstract

This dissertation proposes two novel medium voltage (MV) multilevel converter config-

urations for use with permanent magnet synchronous generator (PMSG) based megawatt

(MW) wind energy conversion systems (WECS). The classical control techniques, based on

linear PI regulators and low band-width modulation, present several technical issues during

lower switching frequency operation. To overcome these issues, a high performance finite

control-set model predictive control (FCS-MPC) strategy is proposed to control the power

converters employed in the MW-PMSG-WECS.

The proposed three-level and four-level converters combine the advantages of proven wind

turbine technologies, such as low-cost generator-side passive converters, and efficient grid-

side multilevel converters. The intermediate dc-dc multilevel converters ensure balancing

of the capacitor voltages during all operating conditions. With this feature, the grid-side

multilevel converters produce better grid current waveforms compared to the back-to-back

connected converters.

A generalized approach for the predictive control of an n-level diode-clamped converter

was investigated. The FCS-MPC strategy for current control and decoupled active/reactive

power regulation of grid-connected multilevel converters was also analyzed. The major

WECS requirements such as maximum power point tracking, balancing of dc-link capac-

itor voltages, switching frequency minimization, common-mode voltage mitigation, regula-

tion of net dc-bus voltage, and grid reactive power control have been modeled in terms of

power converter switching states. These control objectives have been accomplished during

each sampling interval by selecting the switching states which minimize the generator- and

grid-side cost functions.

Issues related to the weighting factors selection, control delay compensation, accurate

extrapolation of references, control of variable switching frequency nature, prediction of

variables over two samples with reduced computational burden, and robustness analysis, are

also addressed in this dissertation.

To keep the dc-bus voltage constant during low voltage ride-through operation, predictive

control scheme is proposed for the power converters while storing surplus energy in the

turbine-generator rotor inertia. The generation and exchange of reference control variables

during symmetrical grid voltage dips is suggested to meet the grid code requirements. The

proposed solution is efficient as no energy is dissipated in the dc-link crowbar.

The simulation and experimental results validate the proposed MV converters and pre-

dictive control schemes.

Acknowledgement

I express my deep sense of gratitude and heart-felt thanks to my supervisor, Professor Bin

Wu, for his invaluable guidance, patience, kindness and consistent encouragement throughout

the course of this work. I am very grateful to him for always treating me as his special student.

I am very glad that I have pursued my doctoral studies under his excellent supervision.

I am very thankful to my good friend and fellow researcher Dr. Marco Rivera (Universidad

de Talca, Chile), and Prof. Jose Rodriguez (Universidad Tecnica Federico Santa Maria,

Chile) for their support during the early stage of my research on predictive control. I would

like to thank my collaborative research team members Drs. Samir Kouro (Universidad

Tecnica Federico Santa Maria) and Salvador Alepuz (Technical University of Catalonia,

Spain) for many interesting discussions.

I am grateful to Drs. Dewei Xu and Amir Yazdani for their kind suggestions and helpful

tips in developing prototype converters. I would like to acknowledge very good suggestions

given by them during my PhD dissertation preliminary and final defence examinations. I

am very thankful to Drs. Jin Jiang (Western University, Canada), Krishnan Venkatakrish-

nan (Ryerson University) and David Naylor (Ryerson University) for providing me valuable

suggestions and comments during my final defence examination.

I would like to thank all my friends in LEDAR, especially Mehdi Narimani, Moya Dai,

Jason Wang, Ning Zhu, Jin Chen, Mitesh Popat, Sasan Mostafaei, Sebastian Rivera, Ahmad

Yafaoui, Liangyu Tang, Anping Hu, Shivkumar Iyer, Srinivas Karanki and Sivaprasad Jal-

adanki for memorable time and fruitful discussions. My special thanks to Apparao Dekka

for his great assistance in performing the experimental tests.

(Continued on the next page..)

vii

I express my respect and intense gratitude to my parents who were the source of in-

spiration and support all through my life. Special thanks to my brother Anil Kumar who

supported me in every possible way to see the completion of this work. My research would

not have been possible without his help. I am so thankful to all those people with whom

I am close, especially Beverly, Kartheek, Saiprasanth, Gangadhar, Lakshmikanth and Nitin

Goel for always being by my side and helping me.

Financial support from Prof. Bin Wu, Department of ELCE, Center for Urban En-

ergy (CUE), Toronto Hydro, Hydro One, Connect Canada program, Wind Energy Strategic

Network (WESNet) and Ryerson University are gratefully acknowledged.

Thanks are extended to Wendy Thornton for providing professional editing to my research

publications and dissertation.

V. Yaramasu

Toronto, Ontario, Canada

23, January, 2014

viii

Dedicated to my mother Subbayamma and father Veeraiah

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List of Publications

Papers in Refereed Journals1

Papers Published

[1] V. Yaramasu, M. Rivera, B. Wu, and J. Rodriguez, “Model Predictive Current Control of Two-

Level Four-Leg Inverters – Part I: Concept, Algorithm and Simulation Analysis,” IEEE Trans. Power

Electron., vol. 28, no. 7, pp. 3459-3468, Jul. 2013.

[2] M. Rivera, V. Yaramasu, J. Rodriguez, and B. Wu, “Model Predictive Current Control of Two-Level

Four-Leg Inverters – Part II: Experimental Implementation and Validation,” IEEE Trans. Power

Electron., vol. 28, no. 7, pp. 3469-3478, Jul. 2013.

[3] M. Rivera, V. Yaramasu, A. Llor, J. Rodriguez, B. Wu, and M. Fadel, “Digital Predictive Current

Control of a Three-Phase Four-Leg Inverter,” IEEE Trans. Ind. Electron., vol. 60, no. 11, pp.

4903-4912, Nov. 2013.

Papers Accepted for Publication

[4] V. Yaramasu, B. Wu, and J. Chen, “Model Predictive Control of Grid-Tied Four-Level Diode-

Clamped Inverters for High Power Wind Energy Conversion Systems,” IEEE Trans. Power Electron.,

2013, DOI: 10.1109/TPEL.2013.2276120.

1Impact Factor of Journals as of 23, Jan. 2014: IEEE Transactions on Industrial Electronics = 5.165 IEEE Transactions on Power Electronics = 4.08 IEEE Transactions on Industrial Informatics = 3.381 Proceedings of the IEEE = 6.911 Journal of Electric Power Systems Research = 1.694 IEEE Journal of Emerging and Selected Topics in Power Electronics = 0 (new journal)

[5] V. Yaramasu, and B. Wu, “A Model Predictive Decoupled Active and Reactive Power Control

for High Power Grid-Connected Four-Level Diode-Clamped Inverters,” IEEE Trans. Ind. Electron.,

2013, DOI: 10.1109/TIE.2013.2278959.

[6] V. Yaramasu, and B. Wu, “Predictive Control of a Three-Level Boost Converter and an NPC

Inverter for High-Power PMSG-Based Medium Voltage Wind Energy Conversion Systems,” IEEE

Trans. Power Electron., 2013, DOI: 10.1109/TPEL.2013.2292068.

[7] V. Yaramasu, B. Wu, M. Rivera, and J. Rodriguez, “A New Power Conversion System for Megawatt

PMSG Wind Turbines using Four-Level Converters and a Simple Control Scheme Based on Two-Step

Model Predictive Strategy – Part I: Modeling and Theoretical Analysis,” IEEE J. Emerging and

Selected Topics in Power Electron., 2013, DOI: 10.1109/JESTPE.2013.2294920.

[8] V. Yaramasu, B. Wu, M. Rivera, and J. Rodriguez, “A New Power Conversion System for Megawatt

PMSG Wind Turbines using Four-Level Converters and a Simple Control Scheme Based on Two-Step

Model Predictive Strategy – Part II: Simulation and Experimental Analysis,” IEEE J. Emerging and

Selected Topics in Power Electron., 2013, DOI: 10.1109/JESTPE.2013.2294922.

[9] V. Yaramasu, M. Rivera, M. Narimani, B. Wu, and J. Rodriguez, “Model Predictive Approach for

a Simple and Effective Load Voltage Control of Four-Leg Inverter with an Output LC Filter,” IEEE

Trans. Ind. Electron., 2013, DOI: 10.1109/TIE.2013.2297291.

[10] C. Baier, J. Espinoza, J. Munoz, P. Melin, M. Rivera, B. Wu, and V. Yaramasu, “Improving Power

Quality in Cascade Multilevel Converters Based on Single-Phase Non-Regenerative Power Cells,”

IEEE Trans. Ind. Electron., 2013, DOI: 10.1109/TIE.2013.2289866.

Papers in Revision and Review

[11] V. Yaramasu, B. Wu, S. Alepuz, and S. Kouro, “Predictive Control for Low Voltage Ride-Through

Enhancement of Three-Level Boost and NPC Converters based PMSG Wind Turbines,” IEEE Trans.

Ind. Electron., 2013. (Minor revision submitted for review)

xii

[12] V. Yaramasu, M. Rivera, M. Narimani, J. Rodriguez, and B. Wu, “Current Regulation of Four-Leg

NPC Converters using Two-Step Finite States Model Predictive Control Strategy,” IEEE Trans. Ind.

Informat., 2013. (Manuscript submitted for review)

[13] V. Yaramasu, B. Wu, P. Sen, S. Kouro, and M. Narimani, “High-Power Wind Energy Conversion

Systems: State-of-the-Art and Emerging Technologies,” Proc. IEEE, 2013. (Proposal submitted to

the EIC)

[14] M. Narimani, V. Yaramasu, B. Wu, N. Zargari, G. Moschopoulos, and G. Cheng, “Simplified DC-

Link Capacitor Current Calculation for Voltage Balancing of n-Level Diode-Clamped Converters using

Space Vector Modulation,” IEEE Trans. Power Electron., 2013. (Manuscript submitted for review)

[15] L. Tang, B. Wu, V. Yaramasu, W. Chen, and H. S. Athab, “Novel DC/DC Choppers with Circuit

Breaker Functionality for HVDC Transmission Lines,” J. Electric Power Systems Research, 2013.

(Manuscript submitted for review)

Papers in Preparation2

[16] V. Yaramasu, B. Wu, M. Narimani, M. Rivera, and J. Wang, “Comparative Assessment of Classical

and Predictive Control Techniques for Two-Level Voltage Source Converters Based High-Power PMSG

Wind Turbines,” IEEE Trans. Power Electron., 2014.

[17] V. Yaramasu, and B. Wu, “Predictive Control of PMSG Wind Energy Conversion Systems Employ-

ing Back-to-Back Connected NPC Converters,” IEEE Trans. Ind. Electron., 2014.

[18] V. Yaramasu, M. Rivera, M. Narimani, B. Wu, and J. Rodriguez, “High-Performance Two-Step

FCS-MPC Strategy for Four-Pole NPC Inverter Based UPS Applications,” IEEE Trans. Ind. Elec-

tron., 2014.

2Simulation and experimental results have been obtained for all the journal papers which are in prepara- tion stage.

xiii

[19] V. Yaramasu, B. Wu, M. Narimani, S. Kouro, M. Rivera, and J. Rodriguez, “Generalized Ap-

proach for Predictive Control with Common-Mode Voltage Mitigation in Multilevel Diode-Clamped

Converters,” IEEE Trans. Power Electron., 2014.

[20] M. Narimani, V. Yaramasu, B. Wu, N. Zargari, and G. Cheng, “A Nested Neutral Point Clamped

(NNPC) Converter using Simple Single-Phase Modulator,” IEEE Trans. Ind. Electron., 2014.

[21] M. Narimani, V. Yaramasu, B. Wu, N. Zargari, and G. Cheng, “Predictive Control with Common-

Mode Voltage Reduction in Nested Neutral Point Clamped (NNPC) Converter,” IEEE Trans. Power

Electron., 2014.

[22] S. Rivera, B. Wu, S. Kouro, V. Yaramasu, and J. Wang, “Electric Vehicle Charging Station using

a Neutral Point Clamped Converter with Bipolar dc Bus,” IEEE Trans. Ind. Electron., 2014.

Papers in Refereed Conference Proceedings

Papers Published

[23] M. Narimani, V. Yaramasu, B. Wu, N. Zargari, G. Cheng, and G. Moschopoulos, “A Simple Method

for Capacitor Voltages Balancing of Diode-Clamped Multilevel Converters using Space Vector Mod-

ulation,” in IEEE Ind. Electron. Society (IECON), Nov. 2013, pp. 310-315, Vienna, Austria.

[24] P. Zavala, M. Rivera, S. Kouro, J. Rodriguez, B. Wu, V. Yaramasu, C. Baier, J. Munoz, J. Espinoza,

and P. Melin, “Predictive Control of a Current Source Rectifier with Imposed Sinusoidal Input Cur-

rents,” in IEEE Ind. Electron. Society (IECON), Nov. 2013, pp. 5842-5847, Vienna, Austria.

[25] V. Yaramasu, B. Wu, M. Rivera, and J. Rodriguez, “Predictive Current Control and DC-Link

Capacitors Balancing for Four-Leg NPC Inverters,” in IEEE Int. Symp. on Ind. Electron. (ISIE),

May. 2013, pp. 1-6, Taipei, Taiwan.

[26] M. Rivera, J. Rodriguez, V. Yaramasu, and B. Wu, “A Simple Current Control Strategy for Two-

Level Four-Leg Inverters: The Model Predictive Approach,” in IEEE Int. Conf. on Power Eng.

Energy and Elect. Drives (POWERENG), May. 2013, pp. 46-51, Istanbul, Turkey.

xiv

[27] M. Rivera, S. Kouro, J. Rodriguez, B. Wu, V. Yaramasu, J. Espinoza, and P. Melin, “Predictive

Current Control in a Current Source Inverter Operating with Low Switching Frequency,” in IEEE Int.

Conf. on Power Eng. Energy and Elect. Drives (POWERENG), May. 2013, pp. 334-339, Istanbul,

Turkey.

[28] M. Rivera, J. Rodriguez, J. Munoz, C. Baier, J. Espinoza, V. Yaramasu, B. Wu, and P. Wheeler,

“A Simple Predictive Current Control of a Single-Phase Matrix Converter,” in IEEE Int. Conf. on

Power Eng. Energy and Elect. Drives (POWERENG), May. 2013, pp. 235-239, Istanbul, Turkey.

[29] V. Yaramasu, and B. Wu, “Predictive Power Control of Grid-Connected Four-Level Inverters in Sta-

tionary Reference Frame,” in IEEE Int. Conf. on Circuits, Power and Computing Tech. (ICCPCT),

Mar. 2013, pp. 636-641, Kumaracoil, India.

[30] V. Yaramasu, B. Wu, M. Rivera, and J. Rodriguez, “Enhanced Model Predictive Voltage Control

of Four-Leg Inverters With Switching Frequency Reduction for Standalone Power Systems,” in Int.

Power Electron. and Motion Control Conf. (EPE/PEMC), Sep. 2012, pp. DS2c.6-1-DS2c.6-5, Novi

Sad, Serbia.

[31] M. Rivera, J. Rodriguez, V. Yaramasu, and B. Wu, “Predictive Load Voltage and Capacitor Bal-

ancing Control for a Four-Leg NPC Inverter,” in Int. Power Electron. and Motion Control Conf.

(EPE/PEMC), Sep. 2012, pp. DS3c.8-1-DS3c.8-5, Novi Sad, Serbia.

[32] V. Yaramasu, B. Wu, M. Rivera, J. Rodriguez, and A. Wilson, “Cost-Function Based Predictive

Voltage Control of Two-Level Four-Leg Inverters using Two Step Prediction Horizon for Standalone

Power Systems,” in IEEE Appl. Power Electron. Conf. Expo. (APEC), Feb. 2012, pp. 128-135,

Orlando, Florida, USA.

[33] V. Yaramasu, and B. Wu, “Three-Level Boost Converter Based Medium Voltage Megawatt PMSG

Wind Energy Conversion Systems,” in IEEE Energy Conversion Congr. and Expo. (ECCE), Sep.

2011, pp. 561-567, Phoenix, Arizona, USA.

[34] J. Rodriguez, B. Wu, M. Rivera, C. Rojas, V. Yaramasu, and A. Wilson, “Predictive Current

Control of Three-Phase Two-Level Four-Leg Inverter,” in Int. Power Electron. and Motion Control

Conf. (EPE/PEMC), Sep. 2010, pp. T3-106-T3-110, Ohrid, Republic of Macedonia.

[35] V. Yaramasu, J. Rodriguez, B. Wu, M. Rivera, A. Wilson, and C. Rojas, “A Simple and Effective

Solution for Superior Performance in Two-Level Four-Leg Voltage Source Inverters: Predictive Voltage

Control,” in IEEE Int. Symp. on Ind. Electron. (ISIE), Jul. 2010, pp. 3127-3132, Bari, Italy.

[36] J. Rodriguez, B. Wu, M. Rivera, A. Wilson, V. Yaramasu, and C. Rojas, “Model Predictive Control

of Three-Phase Four-Leg Neutral-Point-Clamped Inverter,” in Int. Power Electron. Conf. (IPEC),

Jun. 2010, pp. 3112-3116, Sapporo, Japan.

Papers Accepted for Presentation

[37] L. Tang, B. Wu, V. Yaramasu, W. Chen, and H. S. Athab, “Fast Acting DC Circuit Breaker for

HVDC Transmission Line Based on DC/DC Chopper,” in Int. Power Electron. Conf. (IPEC), May.

2014, Hiroshima, Japan.

Papers in Review Process

[38] M. Narimani, V. Yaramasu, B. Wu, and N. Zargari, “A New Simplified Approach for Capacitor

Voltage Balancing of Flying Capacitor Multilevel Converters using Space Vector Modulation,” in

European Conf. on Power Electron. and Appl. (EPE’14-ECCE Europe), Aug. 2014, Lappeenranta,

Finland.

xvi

Contents

Abstract v

Acknowledgement vii

List of Publications xi

Table of Contents xvii

List of Figures xxii

List of Tables xxviii

Glossary of Acronyms and Symbols xxx

1 Introduction 1

1.1 Overview of Wind Energy Conversion Systems . . . . . . . . . . . . . . . . . 2

1.1.1 Installed Wind Power Capacity and Growth Rate . . . . . . . . . . . 3

1.1.2 Global Perspective of WECS . . . . . . . . . . . . . . . . . . . . . . . 3

1.1.3 Evolution of Megawatt WECS . . . . . . . . . . . . . . . . . . . . . . 4

1.1.4 Major Components of Grid-Connected WECS . . . . . . . . . . . . . 5

1.1.5 Classification of WECS Operating Voltages . . . . . . . . . . . . . . . 7

1.1.6 Grid Code Requirements . . . . . . . . . . . . . . . . . . . . . . . . . 8

1.1.7 Commercial Configurations of WECS . . . . . . . . . . . . . . . . . . 11

1.2 Motivation for Dissertation Research . . . . . . . . . . . . . . . . . . . . . . 14

1.2.1 Motivation from the Power Converters’ Perspective . . . . . . . . . . 14

1.2.2 Motivation from the Control Schemes’ Perspective . . . . . . . . . . . 17

1.3 Dissertation Objectives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

1.3.1 Investigation of Next-Generation Power Converters . . . . . . . . . . 19

1.3.2 Investigation of Next-Generation Control Schemes . . . . . . . . . . . 21

1.4 Outline of Dissertation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

xvii

2 Review of Power Converters for High Power Wind Turbines 25

2.1 Back-to-Back Connected Converters . . . . . . . . . . . . . . . . . . . . . . . 26

2.1.1 Low Voltage (LV) Converters . . . . . . . . . . . . . . . . . . . . . . 27

2.1.2 Medium Voltage (MV) Converters . . . . . . . . . . . . . . . . . . . . 28

2.2 Passive Generator-side Converters . . . . . . . . . . . . . . . . . . . . . . . . 34

2.3 Converters for Six-Phase Machine Based WECS . . . . . . . . . . . . . . . . 40

2.4 Converters for Open Winding Machine Based WECS . . . . . . . . . . . . . 44

2.5 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

3 Review of Control Techniques in Power Converters 47

3.1 The Past, Present and Future of Control Platforms . . . . . . . . . . . . . . 48

3.2 Overview of Digital Control Techniques . . . . . . . . . . . . . . . . . . . . . 49

3.2.1 Hysteresis Control Technique . . . . . . . . . . . . . . . . . . . . . . 52

3.2.2 Linear Control Technique . . . . . . . . . . . . . . . . . . . . . . . . 52

3.2.3 Sliding Mode Control Technique . . . . . . . . . . . . . . . . . . . . . 54

3.2.4 Intelligent Control Techniques . . . . . . . . . . . . . . . . . . . . . . 54

3.2.5 Predictive Control Techniques . . . . . . . . . . . . . . . . . . . . . . 55

3.3 Finite Control-Set Model Predictive Control . . . . . . . . . . . . . . . . . . 56

3.3.1 Operating Principle and Design Procedure . . . . . . . . . . . . . . . 57

3.3.2 Cost Function Flexibility . . . . . . . . . . . . . . . . . . . . . . . . . 61

3.3.3 Delay Compensation Methods . . . . . . . . . . . . . . . . . . . . . . 62

3.3.4 Extrapolation Methods . . . . . . . . . . . . . . . . . . . . . . . . . . 65

3.4 Comparison of FCS-MPC with Linear Control . . . . . . . . . . . . . . . . . 67

3.5 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

4 Generalized Approach for Predictive Control in High-Performance Multi-

level Diode-Clamped Converters 69

4.1 Control Requirements and Challenges . . . . . . . . . . . . . . . . . . . . . . 70

4.2 Review of Multilevel DCCs . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

4.3 Generalized Model of Multilevel DCCs . . . . . . . . . . . . . . . . . . . . . 74

4.3.1 Model of Load/Motor/Grid Currents . . . . . . . . . . . . . . . . . . 74

4.3.2 Model of DC-link Capacitor Voltages . . . . . . . . . . . . . . . . . . 78

4.3.3 Model of Common-Mode Voltage . . . . . . . . . . . . . . . . . . . . 81

4.4 Predictive Control of Multilevel Diode-Clamped Converters . . . . . . . . . . 82

4.4.1 Definition of Cost Function . . . . . . . . . . . . . . . . . . . . . . . 82

4.4.2 Selection of Weighting Factors . . . . . . . . . . . . . . . . . . . . . . 84

4.4.3 Selection of Prediction Horizon −h . . . . . . . . . . . . . . . . . . . 85 4.4.4 Control Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

4.5 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

xviii

4.5.1 Transient Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

4.5.2 Robustness against DC-link Perturbations . . . . . . . . . . . . . . . 88

4.5.3 Switching Frequency Reduction . . . . . . . . . . . . . . . . . . . . . 89

4.5.4 Common-Mode Voltage Mitigation . . . . . . . . . . . . . . . . . . . 91

4.6 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94

4.7 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

5 Predictive Current Control of Grid-Tied Diode-Clamped Inverters 99

5.1 Overview of Grid-Tied Inverters . . . . . . . . . . . . . . . . . . . . . . . . . 100

5.1.1 Definition of Grid-side Control Variables . . . . . . . . . . . . . . . . 102

5.1.2 Classical Control Schemes for Grid-Tied Inverters . . . . . . . . . . . 103

5.1.3 Grid Voltage Orientation . . . . . . . . . . . . . . . . . . . . . . . . . 103

5.2 Grid-Tied Four-Level Inverter Model . . . . . . . . . . . . . . . . . . . . . . 104

5.2.1 Modeling of Grid Currents in Synchronous Frame . . . . . . . . . . . 106

5.2.2 Modeling of DC-link Capacitor Voltages . . . . . . . . . . . . . . . . 107

5.3 Model Predictive Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

5.4 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111

5.4.1 Steady-state Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . 112

5.4.2 Transient Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114

5.4.3 DC-link Dynamics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115

5.4.4 Switching Frequency Regulation . . . . . . . . . . . . . . . . . . . . . 116

5.5 Experimental Implementation and Validation . . . . . . . . . . . . . . . . . 118

5.5.1 Experimental Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118

5.5.2 Delay Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . 119

5.5.3 Selection of Sampling Time . . . . . . . . . . . . . . . . . . . . . . . 122

5.5.4 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . 122

5.6 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126

6 Model Predictive Decoupled Active and Reactive Power Control for Grid-

Tied Diode-Clamped Inverters 127

6.1 Proposed Control Strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128

6.2 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132

6.2.1 Transient Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132

6.2.2 Steady-state Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . 134

6.2.3 Comparison to Classical VOC . . . . . . . . . . . . . . . . . . . . . . 134

6.2.4 Comparison to Lagrange Extrapolation . . . . . . . . . . . . . . . . . 137

6.2.5 Capacitor Voltages Balancing . . . . . . . . . . . . . . . . . . . . . . 139

6.2.6 Robustness Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . 139

6.3 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141

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6.4 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146

7 Predictive Control of Three-Level Boost and NPC Converters Based PMSG-

WECS 147

7.1 Modeling of Complete WECS . . . . . . . . . . . . . . . . . . . . . . . . . . 149

7.1.1 Grid-Tied NPC Inverter Model . . . . . . . . . . . . . . . . . . . . . 150

7.1.2 Three-Level Boost Converter Model . . . . . . . . . . . . . . . . . . . 151

7.2 Control System for Proposed PMSG-WECS . . . . . . . . . . . . . . . . . . 156

7.2.1 Predictive Control of Three-Level Boost Converter . . . . . . . . . . 156

7.2.2 Predictive Control of NPC Inverter . . . . . . . . . . . . . . . . . . . 158

7.3 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160

7.4 Experimental Implementation and Validation . . . . . . . . . . . . . . . . . 167

7.5 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172

8 Predictive Control of Four-Level Converters Based PMSG-WECS 173

8.1 Configuration and Modeling of Proposed WECS . . . . . . . . . . . . . . . . 174

8.1.1 Continuous-Time Modeling of Four-Level Inverter . . . . . . . . . . . 174

8.1.2 Continuous-Time Modeling of Four-Level Boost Converter . . . . . . 176

8.2 Discrete-Time Modeling and Two-Step Prediction . . . . . . . . . . . . . . . 180

8.3 Proposed Model Predictive Control Strategy . . . . . . . . . . . . . . . . . . 183

8.3.1 Control System for Four-Level Boost Converter . . . . . . . . . . . . 183

8.3.2 Control System for Four-Level Inverter . . . . . . . . . . . . . . . . . 186

8.4 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 189

8.4.1 Steady-state Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . 189

8.4.2 Harmonic Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190

8.4.3 Switching Frequency Minimization . . . . . . . . . . . . . . . . . . . 192

8.4.4 Common-Mode Voltage Minimization . . . . . . . . . . . . . . . . . . 192

8.4.5 DC-link Perturbations . . . . . . . . . . . . . . . . . . . . . . . . . . 194

8.4.6 Step-Change in Wind Speed Condition . . . . . . . . . . . . . . . . . 195

8.4.7 Step-Changes in Grid Reactive Power Reference . . . . . . . . . . . . 197

8.5 Experimental Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . 199

8.5.1 Experimental Platform . . . . . . . . . . . . . . . . . . . . . . . . . . 199

8.5.2 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . 199

8.6 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206

9 Predictive Control for Low Voltage Ride-Through Enhancement of Three-

Level Converter Based WECS 207

9.1 State-of-the-art LVRT Enhancement Methods . . . . . . . . . . . . . . . . . 208

9.2 Configuration of the PMSG-WECS . . . . . . . . . . . . . . . . . . . . . . . 209

9.3 Storage of Surplus Energy in Turbine-Generator Rotor Inertia . . . . . . . . 211

9.4 Control System for the PMSG-WECS . . . . . . . . . . . . . . . . . . . . . . 212

9.4.1 Generator-side Converter Controller . . . . . . . . . . . . . . . . . . . 212

9.4.2 Grid-side Inverter Controller . . . . . . . . . . . . . . . . . . . . . . . 214

9.5 Generation of Reference Control Variables . . . . . . . . . . . . . . . . . . . 215

9.5.1 Normal Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215

9.5.2 LVRT Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215

9.6 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216

9.6.1 Analysis with Generator-side LVRT Controller Disabled . . . . . . . . 216

9.6.2 Analysis with Generator-side LVRT Controller Enabled . . . . . . . . 220

9.7 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225

9.8 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 230

10 Conclusions 231

10.1 Summary of Major Contributions . . . . . . . . . . . . . . . . . . . . . . . . 232

10.2 Future Works . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 236

A List of Commercial Wind Turbines 237

B System Modeling 239

B.1 Notation of Per-Unit Values . . . . . . . . . . . . . . . . . . . . . . . . . . . 239

B.2 Reference Frame Transformation . . . . . . . . . . . . . . . . . . . . . . . . 240

B.3 Wind Turbine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 241

B.4 Phase-Locked Loop (PLL) Model . . . . . . . . . . . . . . . . . . . . . . . . 243

C Performance Assessment 244

Bibliography 246

xxi

List of Figures

1.1 Global annual and cumulative installed wind power from 1996 to 2012 [source:

Global Wind Energy Council (GWEC)]. . . . . . . . . . . . . . . . . . . . . 2

1.2 Top 10 countries in the installed wind power capacity. . . . . . . . . . . . . . 3

1.3 Evolution in the wind turbine size (Φ: rotor diameter, H: height). . . . . . . 4

1.4 Basic configuration of a grid-connected WECS. . . . . . . . . . . . . . . . . 5

1.5 Overview of different LVRT profiles. . . . . . . . . . . . . . . . . . . . . . . . 9

1.6 State-of-the-art electric generator and power converter configurations for the

commercial WECS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

1.7 Summary of top 10 wind turbine manufacturers and their market share by

Dec. 2012. [source: REN21 and GWEC] (2S/3S = two-/three-stage gearbox,

DD = direct-drive). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

1.8 Classification of full-scale power converters used in Type-4 wind turbines. . . 15

1.9 Review of commercial power converters for PMSG-WECS. . . . . . . . . . . 15

1.10 Classification of control techniques used for the power converters. . . . . . . 17

1.11 Summary of dissertation research directions and objectives. . . . . . . . . . . 19

1.12 Next-generation power converters for the MW-MV-PMSG-WECS. . . . . . . 19

1.13 Organization of dissertation research. . . . . . . . . . . . . . . . . . . . . . . 23

2.1 Classification employed in this chapter for full-scale power converters. . . . . 25

2.2 Classification of back-to-back connected converters. . . . . . . . . . . . . . . 26

2.3 WECS with BTB connected 2L voltage source converters. . . . . . . . . . . 26

2.4 Parallel connected BTB 2L-VSCs and open winding transformer. . . . . . . . 27

2.5 WECS with BTB connected 3L diode-clamped converters. . . . . . . . . . . 30

2.6 WECS with BTB connected 4L diode-clamped converters. . . . . . . . . . . 31

2.7 WECS with BTB connected 3L active neutral point clamped converters. . . 32

2.8 WECS with BTB connected 3L flying capacitor converters. . . . . . . . . . . 32

2.9 WECS with BTB connected current source converters. . . . . . . . . . . . . 33

2.10 WECS with diode rectifier, 2L boost converter and 2L-VSI. . . . . . . . . . . 35

2.11 WECS with diode rectifier, two-channel boost converter and 2L-VSI. . . . . 35

2.12 WECS with diode rectifier, 2L boost converter and 3L-VSI. . . . . . . . . . . 36

xxii

2.13 WECS with diode rectifier, 3L-boost converter and 3L-VSI. . . . . . . . . . . 36

2.14 WECS with diode rectifier, 4L-boost converter and 4L-VSI. . . . . . . . . . . 37

2.15 WECS with diode rectifier, 3L-boost converter and 3L-ANPCI. . . . . . . . . 38

2.16 WECS with diode rectifier, 3L-buck converter and CSI. . . . . . . . . . . . . 38

2.17 WECS with diode rectifier, 3L-boost converter and multilevel ANPC. . . . . 39

2.18 Six-phase machine based WECS with parallel 2L-VSC modules. . . . . . . . 40

2.19 Six-phase machine based WECS with parallel 2L-boost + 2L-VSC modules. 40

2.20 Series connected 2L-VSRs at generator-side and 3L-VSI at grid-side. . . . . . 41

2.21 Series connected 2L boost converters at generator-side and 3L-VSI at grid-side. 41

2.22 Series connected diode rectifiers, 3L-boost converter and 3L-VSI at grid-side. 42

2.23 Series connected 2L-buck converters at generator-side and CSI at grid-side. . 43

2.24 Open winding machine based WECS with multiple 2L VSC modules. . . . . 43

2.25 Open winding machine based WECS with cascaded converters. . . . . . . . . 43

2.26 BTB connected 3L- and 5L-HB converters based module. . . . . . . . . . . . 44

2.27 Back-to-back connected 3L H-bridge converters and MFT based module. . . 45

2.28 Diode rectifier, 3L-boost and 5L-HB converter based module. . . . . . . . . . 45

3.1 Hysteresis current control scheme for 3−φ load/motor/grid (L/M/G). . . . . 50 3.2 Linear current control scheme using PI regulators and SVM. . . . . . . . . . 50

3.3 Sliding mode current control scheme using SVM. . . . . . . . . . . . . . . . . 50

3.4 Fuzzy logic current control scheme using SVM. . . . . . . . . . . . . . . . . . 50

3.5 ANN based current control scheme. . . . . . . . . . . . . . . . . . . . . . . . 51

3.6 Fuzzy logic current control scheme using ANN modulation. . . . . . . . . . . 51

3.7 Deadbeat predictive current control with SVM. . . . . . . . . . . . . . . . . 51

3.8 Finite control-set model predictive control (FCS-MPC) scheme. . . . . . . . 51

3.9 FCS-MPC strategy with one-step prediction horizon. . . . . . . . . . . . . . 60

3.10 Overview of cost function definition with primary and secondary objectives. . 61

3.11 Delay compensation method–1 using modified one-step prediction horizon. . 63

3.12 Delay compensation method–2 using standard two-step prediction horizon. . 63

3.13 Delay compensation method–3 using simplified two-step prediction horizon. . 63

4.1 Overview of state-of-the-art and proposed solutions for high performance con-

trol in MLDCCs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

4.2 Per-phase diagram of multi-level diode-clamped converters. . . . . . . . . . . 73

4.3 Space vectors generated by the multilevel diode-clamped converter. . . . . . 74

4.4 Topology of multi-level diode-clamped converter with RLE load. . . . . . . . 75

4.5 Simplified representation of the power circuit model for a 5L-DCC. . . . . . 77

4.6 FCS-MPC scheme for multilevel diode-clamped converter. . . . . . . . . . . 82

4.7 Prediction of control variables for a 4L-DCC. . . . . . . . . . . . . . . . . . . 85

xxiii

4.8 Two-step predictive control algorithm for an m-level DCC. . . . . . . . . . . 86

4.9 Simulation results during step-change in reference load current. . . . . . . . 88

4.10 Simulation results for dc-link capacitor voltages behavior with and without

the weighting factor λdc. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

4.11 Simulation results for switching frequency minimization using the weighting

factor λswc. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

4.12 Simulation results for common-mode voltage minimization of odd-level con-

verters using the weighting factor λcmv. . . . . . . . . . . . . . . . . . . . . . 92

4.13 Simulation results for common-mode voltage minimization of even-level con-

verters using the weighting factor λcmv. . . . . . . . . . . . . . . . . . . . . . 93

4.14 Experimental results during step-change in reference to load current. . . . . 95

4.15 Experimental results for dc-link capacitor voltages behavior with and without

the weighting factor λdc. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96

4.16 Experimental results for switching frequency minimization using the weighting

factor λswc. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

4.17 Experimental results for common-mode voltage reduction using the weighting

factor λcmv. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

5.1 Configuration of Type-4 WECS with full-scale power converters. . . . . . . . 101

5.2 Simplified representation of Type-4 WECS. . . . . . . . . . . . . . . . . . . . 101

5.3 Topology of grid-tied 4L-DCI in MV-WECS. . . . . . . . . . . . . . . . . . . 104

5.4 Space vector diagram and switching states for a four-level inverter. . . . . . . 105

5.5 Proposed model predictive control algorithm for grid-tied four-level inverter. 109

5.6 Simulation results during steady-state operation. . . . . . . . . . . . . . . . . 113

5.7 Simulation results during transient operation. . . . . . . . . . . . . . . . . . 114

5.8 Simulation analysis for dc-link capacitor voltages balancing. . . . . . . . . . 115

5.9 Simulation results for switching frequency variation with respect to i∗dg and Q ∗ g.117

5.10 Comparison of %THD for 4L-inverter with grid-tied and resistive load cases. 117

5.11 Photograph of experimental setup. . . . . . . . . . . . . . . . . . . . . . . . 118

5.12 Prediction of four-level inverter control variables. . . . . . . . . . . . . . . . 119

5.13 Predictive current control and dc-link capacitor voltages balancing algorithm

with delay compensation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120

5.14 Experimental results during steady-state operation. . . . . . . . . . . . . . . 123

5.15 Experimental results during transient operation. . . . . . . . . . . . . . . . . 124

5.16 Experimental results for dc-link capacitor voltages balancing. . . . . . . . . . 125

5.17 Experimental results for switching frequency variation with respect to i∗dg and

Q∗g. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125

xxiv

6.1 Proposed decoupled active and reactive power control with dc-link capacitor

voltages balancing for a grid-tied 4L-DCI. . . . . . . . . . . . . . . . . . . . 128

6.2 Simulation results with dynamic active and reactive power references. . . . . 133

6.3 Simulation results for active and reactive powers tracking with classical VOC. 135

6.4 Simulation results for active and reactive powers tracking with predictive control.135

6.5 Simulation results for inverter line-line voltage and it’s FFT with the classical

decoupled voltage-oriented control. . . . . . . . . . . . . . . . . . . . . . . . 136

6.6 Simulation results for inverter line-line voltage and it’s FFT with the proposed

predictive control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136

6.7 Simulation results for phase-a grid current, and it’s FFT with the classical

decoupled voltage-oriented control. . . . . . . . . . . . . . . . . . . . . . . . 136

6.8 Simulation results for phase-a grid current, and its FFT with the proposed

predictive control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137

6.9 Simulation results for step-change in active power with Lagrange extrapolation.138

6.10 Simulation results for step-change in active power with proposed extrapolation.138

6.11 Simulation results for dc-link capacitor voltages balancing with perturbations

to the system model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139

6.12 Simulation results with grid filter parameter variations (CF: changes to filter,

and CCF: changes to controller and filter.) . . . . . . . . . . . . . . . . . . . 140

6.13 Proposed predictive power control algorithm with delay compensation. . . . 141

6.14 Experimental results with dynamic active and reactive power references. . . 143

6.15 Experimental results during the step change in active power reference. . . . . 144

6.16 Experimental results for dc-link capacitor voltages balancing with the pertur-

bations in system model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144

6.17 Experimental analysis with grid filter parameter variations (CF: changes to

filter, and CCF: changes to controller and filter). . . . . . . . . . . . . . . . . 145

7.1 Configuration of TLB-NPC converters based medium voltage PMSG-WECS. 148

7.2 Simplified power circuit of the dc-dc TLB converter stage. . . . . . . . . . . 152

7.3 Modes of operation for three-level boost converter. . . . . . . . . . . . . . . . 152

7.4 Proposed model predictive control scheme for three-level boost and NPC con-

verter based PMSG-WECS. . . . . . . . . . . . . . . . . . . . . . . . . . . . 155

7.5 Simulation results with step change in wind speed and programmed changes

in reactive power reference (first part of figure). . . . . . . . . . . . . . . . . 162

7.6 Simulation results with step change in wind speed and programmed changes

in reactive power reference (second part of figure). . . . . . . . . . . . . . . . 163

7.7 Simulation results for capacitor voltages balancing with a resistor across Cdc1. 164

7.8 Simulation results for NPC fsw minimization with BTB NPC converters. . . 166

xxv

7.9 Simulation results for NPC fsw minimization with proposed topology. . . . . 166

7.10 Block diagram of the experimental setup. . . . . . . . . . . . . . . . . . . . . 167

7.11 Proposed predictive control algorithm with delay compensation for: (a) TLB

converter, and (b) NPC inverter. . . . . . . . . . . . . . . . . . . . . . . . . 169

7.12 Experimental results for programmed changes in ωm and Q ∗ g. . . . . . . . . . 170

7.13 Experimental results for capacitor voltages balancing with a resistor across

Cdc1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171

7.14 Experimental results for inverter switching frequency minimization. . . . . . 171

8.1 Configuration of proposed high power PMSG wind energy system. . . . . . . 175

8.2 Operating modes for the four-level boost converter: (a) mode-I, (b) mode-II,

8.3 Representation of virtual resistors and the inverter. . . . . . . . . . . . . . . 179

8.4 Prediction of control variables using one-step prediction. . . . . . . . . . . . 182

8.5 Prediction of control variables using modified two-step prediction . . . . . . . 182

8.6 Block diagram of the complete control system. . . . . . . . . . . . . . . . . . 184

8.7 Proposed predictive control scheme for 4L-converter based PMSG-WECS. . . 185

8.8 Proposed two-step predictive control algorithm for: (a) four-level boost con-

verter, and (b) four-level diode-clamped inverter. . . . . . . . . . . . . . . . 187

8.9 Comparison of simulation results during rated wind speed condition using two

different prediction methods. . . . . . . . . . . . . . . . . . . . . . . . . . . . 191

8.10 Simulation FFT analysis of inverter line-line voltage and grid currents using

two different prediction methods. . . . . . . . . . . . . . . . . . . . . . . . . 191

8.11 Simulation results for grid-tied inverter switching frequency minimization. . . 193

8.12 Simulation results for grid-tied inverter common-mode voltage minimization. 193

8.13 Simulation results with step-connection of capacitor Cext across Cdc2. . . . . 194

8.14 Simulation results with step change in wind speed from 12 m/s to 9.6 m/s. . 196

8.15 Simulation results with step-changes in grid reactive power reference. . . . . 198

8.16 Photographs of the experimental setup. . . . . . . . . . . . . . . . . . . . . . 200

8.17 Comparison of experimental results during rated wind speed condition. . . . 201

8.18 Experimental results for grid-tied inverter switching frequency minimization. 201

8.19 Experimental results for grid-tied inverter common-mode voltage minimization.203

8.20 Experimental results with step-connection of capacitor Cext across Cdc2. . . . 203

8.21 Experimental results with step change in ω∗m from 1.0 to 0.8 p.u.. . . . . . . 204

8.22 Experimental results with step-changes in grid reactive power reference. . . . 205

9.1 Configuration of three-level boost converter and NPC inverter based MW-MV

PMSG-WECS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 210

9.2 Proposed model predictive controller for the generator-side converter. . . . . 213

xxvi

9.3 Proposed model predictive controller for grid-side inverter. . . . . . . . . . . 213

9.4 Generation of reference control variables during normal and LVRT operation. 214

9.5 Simulation results during three-phase grid voltage dip with the generator-side

LVRT controller disabled (Part–I). . . . . . . . . . . . . . . . . . . . . . . . 218

9.6 Simulation results during three-phase grid voltage dip with the generator-side

LVRT controller disabled (Part–II). . . . . . . . . . . . . . . . . . . . . . . . 219

9.7 Simulation results during three-phase grid voltage dip with the generator-side

LVRT controller enabled (Part-I). . . . . . . . . . . . . . . . . . . . . . . . . 221

9.8 Simulation results during three-phase grid voltage dip with the generator-side

LVRT controller enabled (Part-II). . . . . . . . . . . . . . . . . . . . . . . . 222

9.9 Simulation result for input dc voltage vin during three-phase grid voltage dip

with the generator-side LVRT controller enabled and Cin = 820 μF. . . . . . 224

9.10 Experimental setup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225

9.11 Experimental results during three-phase grid voltage dip with the generator-

side LVRT controller enabled (Part-I). . . . . . . . . . . . . . . . . . . . . . 227

9.12 Experimental results during three-phase grid voltage dip with the generator-

side LVRT controller enabled (Part-II). . . . . . . . . . . . . . . . . . . . . . 228

B.1 MATLAB/Simulink model of wind turbine. . . . . . . . . . . . . . . . . . . . 242

B.2 MATLAB/Simulink model of pitch control system. . . . . . . . . . . . . . . 242

B.3 Simplified model for grid voltage angle estimation. . . . . . . . . . . . . . . . 243

B.4 Standard SRF-PLL model for grid voltage angle estimation. . . . . . . . . . 243

xxvii

List of Tables

1.1 Advantages and disadvantages of wind generators [source: J. A. Baroudi et.

al. (2007)] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

1.2 Voltage classifications by region [source: NREL (2012)] . . . . . . . . . . . . 7

1.3 Summary of national grid codes and different LVRT profiles . . . . . . . . . 9

1.4 Summary of four types of wind turbine configurations . . . . . . . . . . . . . 14

1.5 List of few commercial PMSG wind turbines . . . . . . . . . . . . . . . . . . 16

2.1 Summary of LV and MV operation for a 6 MW wind turbine . . . . . . . . . 29

2.2 Comparison of BTB connected converters for megawatt wind turbines . . . . 33

2.3 Summary of active and passive generator-side converters for WECS . . . . . 34

3.1 Coefficients for two-samples ahead (k + 2) Lagrange extrapolation method . 66

3.2 Comparison between classical linear control and FCS-MPC . . . . . . . . . . 67

4.1 Components, switching states and voltage vectors count for MLDCC . . . . 72

4.2 MLDCC terminal voltages versus switching states (x = a,b,c) . . . . . . . . 72

4.3 Relationship between switching states and coefficients of capacitor currents

for a 5L-DCC (x = a,b,c) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

4.4 Calculation of number of switch changes for MLDCC (x = a,b,c) . . . . . . 83

4.5 Parameters of the MLDCC and controller . . . . . . . . . . . . . . . . . . . 87

4.6 Simulation analysis during fsw minimization . . . . . . . . . . . . . . . . . . 91

4.7 Computational burden with MLDCCs . . . . . . . . . . . . . . . . . . . . . 94

4.8 Experimental analysis during fsw minimization . . . . . . . . . . . . . . . . . 95

5.1 Switching states and inverter terminal voltages . . . . . . . . . . . . . . . . . 105

5.2 Grid-tied four-level inverter and controller parameters . . . . . . . . . . . . . 111

5.3 Summary of simulation steady-state analysis . . . . . . . . . . . . . . . . . . 111

5.4 Summary of experimental steady-state analysis . . . . . . . . . . . . . . . . 122

6.1 Grid-tied four-level inverter parameters . . . . . . . . . . . . . . . . . . . . . 132

6.2 Steady-state analysis with simulation results . . . . . . . . . . . . . . . . . . 134

6.3 Steady-state analysis with experimental results . . . . . . . . . . . . . . . . . 142

xxviii

7.1 Switching states and NPC inverter terminal voltages (x = a,b,c) . . . . . . . 150

7.2 Parameters of the proposed wind energy conversion system . . . . . . . . . . 160

8.1 Summary of four-level boost converter switching states . . . . . . . . . . . . 176

8.2 Parameters of the proposed power conversion system . . . . . . . . . . . . . 188

9.1 Parameters of the proposed PMSG-WECS . . . . . . . . . . . . . . . . . . . 217

A.1 Future development of full-scale converters based MW wind turbines . . . . 237

A.2 List of commercial wind turbines using full-scale converters . . . . . . . . . . 238

xxix

Glossary of Acronyms and Symbols

Abbreviations

3L Three-Level

4L Four-Level

AC Alternating Current

ADC Analog-to-Digital Conversion

ANPCC Active Neutral-Point Clamped Converter

ANPCI Active Neutral-Point Clamped Inverter

ANPCR Active Neutral-Point Clamped Rectifier

BC Boost Converter

BTB Back-to-Back Connected

CCF Changes to Controller and Filter

CCM Continuous Current Mode

CF Changes to Filter

CHB Cascaded H-Bridge

CMOS Complementary Metal-Oxide-Semiconductor

CMV Common-Mode Voltage

CSC Current Source Converter

CSI Current Source Inverter

CSR Current Source Rectifier

DAC Digital-to-Analog Conversion

DC Direct Current

DCC Diode-Clamped Converter

DCI Diode-Clamped Inverter

DCM Discontinuous Current Mode

DCR Diode-Clamped Rectifier

DD Direct-Driven

xxx

DFIG Doubly-Fed Induction Generator

DSO Distribution System Operator

DSP Digital Signal Processor

DTC Direct Torque Control

EMF Electro-Motive Force

FC Flying Capacitor

FCC Flying Capacitor Converter

FCI Flying Capacitor Inverter

FCR Flying Capacitor Rectifier

FCS-MPC Finite Control-Set Model Predictive Control

FFT Fast Fourier Transform

FOC Field Oriented Control

FPGA Field-Programmable Gate Array

FRT Fault Ride-Through

FSC Full-Scale Converter

GB Gear Box

GCR Grid-Code Requirements

GCT Gate-Controlled Thyristor

GTI Grid-Tied Inverter

HB H-Bridge

HBI H-Bridge Inverter

HBR H-Bridge Rectifier

IG Induction Generator

IGBT Insulated Gate Bipolar Transistor

IGCT Integrated Gate-Commutated Thyristor

IM Induction Machine

I/O Input/Output

IPD In-Phase Disposition

LCI Load Commutated Inverter

LV Low Voltage

LVRT Low Voltage Ride-Through

ML Multi-Level

MLDCC Multi-Level Diode-Clamped Converter

MPC Model Predictive Control

MPP Maximum Power Point

MPPT Maximum Power Point Tracking

xxxi

MSC Machine-side Converter

MV Medium Voltage

MW Megawatt

NPC Neutral-Point Clamped

OTSR Optimal Tip-Speed Ratio

PC Predictive Control

PCC Predictive Current Control

PE Power Electronics

PF Power Factor

PPC Predictive Power Control

PVC Predictive Voltage Control

PI Proportional-Integral

PLL Phase-Locked Loop

PMSG Permanent Magnet Synchronous Generator

PWM Pulse Width Modulation

RPG Reactive Power Generation

RTI Real-Time Interface

SCIG Squirrel Cage Induction Generator

SGCT Symmetric Gate-Controlled Thyristor

SHE Selective Harmonic Elimination

SRF Synchronous Reference Frame

SS Steady-state

SVM Space Vector Modulation

TLB Three-Level Boost

THD Total Harmonic Distortion

TSO Transmission System Operator

TTL Transistor-Transistor Logic

UPF Unity Power Factor

VOC Voltage Oriented Control

VSC Voltage Source Converter

VSI Voltage Source Inverter

VSR Voltage Source Rectifier

WECS Wind Energy Conversion Systems

WRIG Wound Rotor Induction Generator

WRSG Wound Rotor Synchronous Generator

WT Wind Turbine

xxxii

Voltage Quantities

vg Grid rms phase-neutral voltage (V)

vgl Grid rms line-line voltage (V)

vag,vbg,vcg Three-phase grid voltages (V)

vdg,vqg d and q-axis grid voltages (V)

van,vbn,vcn Three-phase inverter voltages with respect to grid/load neutral (V)

vaN,vbN,vcN Three-phase inverter voltages with respect to negative dc-rail (V)

vdi,vqi d and q-axis inverter voltages (V)

vs Generator rms phase-neutral voltage (V)

vsl Generator rms line-line voltage (V)

vas,vbs,vcs Three-phase generator voltages (V)

vds,vqs d and q-axis generator voltages (V)

ea,eb,ec Three-phase motor back emf (V)

vdc Net dc-bus voltage (V)

v∗dc Reference dc-bus voltage (V)

vcj Voltage across dc-link capacitors j = 1, 2, · · · (V)

Current Quantities

ig Grid rms current (A)

iag, ibg, icg Three-phase grid currents (A)

idg, iqg d and q-axis grid currents (A)

idc DC current (A)

icj Current through dc-link capacitors j = 1, 2, · · · (A)

Power Quantities

Sg Grid apparent power (VA)

Pg Grid active power (W)

Qg Grid reactive power (VAR)

Q∗g Reference grid reactive power (VAR)

PM Power output of wind turbine (W)

Pm Mechanical input power to wind generator (W)

Ss Wind generator apparent power output (VA)

Ps Wind generator active power output (W)

Qs Wind generator reactive power output (VAR)

Pdc Power stored in the dc-link elements (W)

xxxiii

Torque Quantities

TM Torque output of wind turbine (N.m)

Tm Mechanical input torque to wind generator (N.m)

Te Electromagnetic torque of wind generator (N.m)

T∗e Reference electromagnetic torque for wind generator (N.m)

RLC Quantities

Rg Internal resistance of grid-side inductive filter (Ω)

Rdc Internal resistance of dc inductive filter (Ω)

Lg Inductance of grid-side harmonic filter (H)

Ld,Lq d and q-axis generator inductance (H)

Ldc Inductance of dc filter (H)

Cdcj Capacitance of dc-link capacitors j = 1, 2, · · · (F) Cin Capacitance of input dc-link capacitor (F)

Frequency and Time Quantities

fg Grid frequency (Hz)

fs Generator frequency (Hz)

fsw Device switching frequency of power converter (Hz)

ωg Grid angular frequency (rad/s)

ωs Generator electrical angular frequency (rad/s)

ωm Generator mechanical angular frequency (rad/s)

θg Grid voltage angle (rad)

θm Generator mechanical position (rad)

Ts Controller sampling time (s)

Generator Quantities

J Moment of inertia (kg.m2)

H Inertia time constant (s)

PFs Power factor

PP Number of pole pairs

nm Generator speed (rpm)

xxxiv

Wind Turbine Quantities

Rgb Gearbox ratio

ρ Air density (kg.m2)

rT Turbine rotor radius (m)

Cp Turbine power coefficient

λT Turbine tip-speed ratio

nM Turbine speed (rpm)

vw Wind speed (m/s)

Predictive Controller Quantities

h Prediction horizon

g Cost function

s Laplace operator (when not used as a subscript)

k Discrete-time present sampling instant

k − 1 Discrete-time past sampling instant k + 1 Discrete-time future sampling instant

t Continuous-time

λdc Weighting factor for dc-link capacitor voltages balancing

λswc Weighting factor for switching frequency reduction

λcmv Weighting factor for common-mode voltage reduction d dt

Derivative operator

Sx Level of voltage vector of phase x = a,b,c

Sjx Switching states of phase x = a,b,c, j = 1, 2, · · · swcx Number of switch changes in inverter phase x = a,b,c

P,N Positive and negative dc bus of a power converter

Vector Quantities

vg Grid voltage vector [vag vbg vcg] T

ig Grid current vector [iag ibg icg] T

vi Inverter voltage vector [van vbn vcn] T

vs Generator voltage vector [vas vbs vcs] T

is Generator current vector [ias ibs ics] T

vc dc-link voltage vector [vc1 vc2 · · · ]T ic dc-link current vector [ic1 ic2 · · · ]T

xxxv

Base Quantities

vbg Grid-side base voltage (V)

ibg Grid-side base current (A)

vbgp Grid-side peak base voltage (V)

ibgp Grid-side peak base current (A)

Zbg Grid-side base impedance (Ω)

Lbg Grid-side base inductance (H)

Cbg Grid-side base capacitance (F)

vbs Generator-side base voltage (V)

ibs Generator-side base current (A)

vbsp Generator-side peak base voltage (V)

ibsp Generator-side peak base current (A)

Zbs Generator-side base impedance (Ω)

Lbs Generator-side base inductance (H)

Cbs Generator-side base capacitance (F)

Λbs Generator-side base flux-linkage (Wb)

Superscripts

p Predicted quantity

e Estimated quantity

x̂ Estimation of x

∗ Reference quantity

Subscripts

a,b,c Natural frame quantities

d,q Synchronous frame quantities

α,β Stationary frame quantities

R Rated quantity

op Optimal quantity

g Grid-side quantity

dc dc quantity

s,m Generator-side quantity

T,M Turbine quantity

xxxvi

Chapter 1

Introduction

Due to depleting fossil fuels and environmental concerns, electricity production from re-

newable energy sources has attracted great attention in recent years. By 2012, the power

production from renewable energy sources worldwide exceeded 1470 gigawatt (GW) rep-

resenting approximately 19 % of global energy consumption [1]. Among all the renewable

energy sources, wind energy is increasingly becoming mainstream and competitive with con-

ventional sources of energy. This success is mainly propelled by technological advancements,

cost reduction and government incentive programs [2]. As of 2012, approximately 83 coun-

tries are using wind energy on a commercial basis to generate electricity [1].

The electricity production from wind turbines started during the 1980’s. Over the past

three decades, the size of wind turbines has steadily increased and currently reached a level

of 7.5 megawatt (MW) per unit [3]. Due to the rapid integration of wind power into the

electric grid, many concerns emerged related to the stable and secure operation of the existing

electric power system. The grid codes have been updated and enforced in many countries

on the grid-connection of large-scale wind turbines or wind farms.

The power electronic converters have been used in commercial wind turbines since the

beginning of grid-connected operation, and this technology has changed dramatically over

the past 30 years [4]. Since the 1980’s, various combinations of wind generators and power

electronic converters have been developed in commercial wind turbines to achieve fixed-

speed, semi-variable and full-variable-speed operation. The latter has emerged as a successful

configuration to increase wind energy conversion efficiency, improve grid power quality and

to meet the grid codes. The power converter and its control are very crucial in the successful

and efficient operation of variable-speed wind turbines.

In this dissertation, two novel power converter topologies have been proposed aimed at

wind turbines rated at MW-level. The proposed power conversion systems were designed by

combining the best qualities of existing solutions from the commercial wind turbine manufac-

turers. A qualitative analysis in terms of cost, weight, complexity, reliability and efficiency

was carried out by comparing the proposed configurations with the existing technologies. To

achieve high performance operation for the proposed converters based variable-speed wind

turbines, an advanced control system founded on a finite control-set model predictive strategy

is proposed. The theoretical analysis, discrete-time modeling, control scheme development

and real-time implementation have been investigated in detail.

The organization of this Chapter is as follows: the overview of Wind Energy Conversion

System (WECS) is given in Section 1.1 and the motivation for the Dissertation research

is outlined in Section 1.2. The objectives of this Dissertation are presented in Section 1.3.

Finally, in Section 1.4, the outline of the Dissertation is summarized.

1.1 Overview of Wind Energy Conversion Systems

In this section, the installed wind power capacity, global perspectives of WECS, evolution

in the increase of turbine power rating, major components of grid-connected WECS, clas-

sification of WECS operating voltages, overview of grid code requirements and commercial

configurations of WECS are discussed in detail.

1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012

Year

Cumulative Annual

In st a ll ed

C a p a ci ty

(G W

)

100

150

200

250

300

6.1 7.6 10.2 13.6 17.4 23.9

31.1 39.4

47.6 59.1

73.9

93.9

120.6

158.9

198.0

238.1

282.6

Figure 1.1: Global annual and cumulative installed wind power from 1996 to 2012 [source: Global Wind Energy Council (GWEC)].

1.1.1 Installed Wind Power Capacity and Growth Rate

The annual and cumulative installed wind power capacity worldwide is shown in Fig.

1.1 [5]. The cumulative installed capacity increased exponentially from 6100 MW in 1996

to 282.6 GW by 2012. It was anticipated on a moderate scale that the cumulative wind

capacity would reach 760 GW by 2020 [1]. In 2012, approximately 45 GWs of new wind

power was installed which represents investments of about e56 billion [5]. The wind energy

industry demonstrated an excellent growth rate of more than 19 % by the end of 2012. The

technological advancements in terms of wind turbine design, generator and power converters

are some of the key reasons behind this impressive growth rate.

PR China 26.7 %

USA 21.2 %

Germany 11.1 %

Spain 8.1 %

India 6.5 %

UK 3.0 %

Italy 2.9 %

France 2.7 %

Canada 2.2 %

Portugal 1.6 %

Rest of the world 14.1 %

100 % = 282,587 MW

(a) Cumulative capacity (by Dec. 2012)

USA 29.3 %

PR China 28.9 %

Germany 5.4 %

India 5.2 %

UK 4.2 %

Italy 2.8 %

Spain 2.5 %

Brazil 2.4 %

Canada 2.1 %

Romania 2.1 %

Rest of the world 15 %

100 % = 44,799 MW

(b) New capacity (Jan.–Dec. 2012)

Figure 1.2: Top 10 countries in the installed wind power capacity.

1.1.2 Global Perspective of WECS

The top 10 countries in the cumulative and annual installed wind power capacity are

shown in Fig. 1.2 [1,5]. The Chinese market maintained its top position in global cumulative

installed wind power by tripling its capacity from 25.8 GW in 2009 to 75.3 GW by the end

of 2012. The USA gained the top spot in 2012 by adding approximately 13.1 GWs of new

wind power from 190 projects.

Approximately 24 countries have more than 1 GW cumulative installed wind power

capacity, including 16 in Europe, 4 in the Asia-Pacific area (China, India, Japan, Australia),

3 in North America (Canada, Mexico, US) and 1 in Latin America (Brazil) [5]. Some

countries have the highest penetration by wind power. For example, in Denmark more than

30 % of electricity consumption is covered from wind energy [4].

Canada is ranked top 9th in both cumulative and new installed capacity. The cumulative

installed wind power capacity in Canada steadily increased from 137 MW in 2000 to 6.2 GW

by the end of 2012. More than 2000 MW wind power has been installed in Ontario which

accounts for 3 % of the province’s electricity demand. Canada has ambitious plans to supply

20 % of net electricity consumption from wind by 2025.

1.1.3 Evolution of Megawatt WECS

The power output of a wind turbine is proportional to the square of a rotor diameter and

a cubic of wind speed (refer to B.7). The large turbines can capture higher wind power with

lower installation and maintenance costs compared to the group of small turbines. Owing

to this fact, the size of commercial wind turbines has exponentially increased over the past

30 years as demonstrated in Fig. 1.3. The turbine size increased from 50 kW in 1980 to 7.5

MW in 2010 [2,3,6]. It is anticipated that 10-15 MW turbines will be developed in the near

future with rotor diameters exceeding 150 m, which is approximately twice the length of a

Boeing 747 airplane. The off-shore wind turbines are also gaining more attention now-a-days

because the power production can be increased with the help of stronger and steady wind.

1980 50kW

Φ 15m

H 24m

1985 100kW

Φ 20m

H 43m

1990 500kW

Φ 40m

H 54m

1995 800kW

Φ 50m

H 80m

Statue of

Liberty H 92m

2000 2MW Φ 80m H 104m

2005 5MW Φ 124m H 114m

2010 7.5MW Φ 126m H 138m

London Gherkin

H 180m

2015 10MW Φ 145m H 180m

2020 15-20MW Φ 150-200m H 200-250m

Boeing 747

Figure 1.3: Evolution in the wind turbine size (Φ: rotor diameter, H: height).

1.1.4 Major Components of Grid-Connected WECS

The basic configuration of grid-connected MW-WECS is depicted in Fig. 1.4. The WECS

is composed of several components that convert wind kinetic-energy into electric-energy in a

controlled, reliable and efficient manner. The major components of a WECS can be broadly

classified as mechanical and electrical. The mechanical components include tower, nacelle,

rotor blades, rotor hub, gearbox, pitch drives, yaw drives, wind speed sensors, drive-train and

mechanical brakes. The electrical components include electric generator, power electronic

converter, generator-side harmonic filter, grid-side harmonic filter, step-up transformer and

three-phase grid (collection-point).

The wind kinetic-energy is first converted to mechanical-energy with the help of rotor

blades. The tower, nacelle and rotor hubs provide mechanical support to the rotor blades.

The kinetic to mechanical energy conversion efficiency depends on many factors such as the

shape of rotor blades, angle of blades, wind speed velocity, air density, etc. The wind velocity

and direction are measured with the help of sensors, and a yaw drive is used to move the

rotor blades along with nacelle towards the wind to extract the maximum possible energy.

When the wind speed is more than the rated value, the pitch drives are used to change the

angle of blades such that the electric power output is limited to the rated value. The MW

wind turbines usually run at very low speed (typically 6-20 rpm) and high torque [2,6].

An electric generator is used to convert rotational mechanical-energy into electric-energy.

Many different wind generators such as the squirrel-cage induction generator (SCIG), wound

rotor induction generator (WRIG), doubly-fed induction generator (DFIG), permanent mag-

net synchronous generator (PMSG) and wound rotor synchronous generator (WRSG) have

Wind Turbine

Gear Box

Wind Generator

SCIG WRIG/DFIG

PMSG

WRSG

Generator-side Harmonic Filter

Power Electronic Converter

Grid-side Harmonic Filter

Step-up Transformer

Three-Phase Grid

Figure 1.4: Basic configuration of a grid-connected WECS.

been developed over the past 30 years. The main features and disadvantages of each of these

generators is summarized in Table 1.1.

The IG’s usually operate at high rotational speeds, while the SG’s can operate at low,

medium or high speeds. To couple the low-speed, high-torque turbine shaft with the high-

speed, low-torque IG/SG-shaft, a multi-stage (usually three-stage) gearbox is used. The

gearbox presents with several serious issues such as high initial cost, high audible noise, ex-

tensive wear and tear, reduced life span, reduced efficiency and need for regular maintenance

[2,3].

The elimination of the gearbox (often referred to as gearless or direct-drive technology)

helps to overcome the aforementioned problems, especially in off-shore wind turbines [7]. In

recent years, many turbine manufacturers have used direct-drive technology in their com-

mercial products. By matching the generator speed with the wind turbine speed, the need

for the gearbox can be eliminated. In order to achieve lower operational speed, the generator

needs to be equipped with a large number of poles, which is a feasible solution with SG’s.

In accommodating the large number of poles, the stator radius becomes 6 times larger and

4.5 times heavier compared to the three-stage gearbox based SCIG/WRIG/DFIG [2,3,8,9].

To make a compromise between the high-speed and low-speed operation, a medium-speed

SG can be used with the help of single-stage gear box. The list of few commercial turbines

along with the gearbox details are given in Appendix A.

Table 1.1: Advantages and disadvantages of wind generators [source: J. A. Baroudi et. al. (2007)]

Generator Advantages Disadvantages

SCIG • Simple and rugged in construction • Requires reactive power compensation • Lower initial and maintenance cost • Large in-rush current during grid connection • Lower torque oscillations • Requires gearbox • Widely available for MW application • Increased losses and control complexity

WRIG/ • Reduced converter cost • High capital and maintenance cost DFIG • Reduced losses and improved efficiency • Sip rings are sensitive and need maintenance

• Flexible reactive power compensation • Susceptible to grid disturbances WRSG • Independent active and reactive power control • High capital and maintenance cost

• High torque operation can be achieved • Requires additional excitation circuit • Eliminates the need for gearbox • Huge weight if used as direct-drive

PMSG • High power density with simple design • High capital cost due to PMs • High torque operation can be achieved • Possible demagnetization of PMs • Eliminates the need for slip rings, • High weight if used as direct-drive

excitation and gearbox

• Lower maintenance cost • Lower rotor losses and high efficiency

The generator output voltage and frequency change with respect to the wind speed.

The generator can be directly coupled to the grid or it can be interfaced through a power

electronic converter. As shall be detailed in Section 1.1.7, different combinations of electric

generators and power electronic converters can be used to form a wide variety of WECS

configurations. The switching harmonics are inevitable when using power converters, and

to solve this issue, harmonic filters are used in generator- and grid-side converters. The

harmonic filter on the generator side helps to reduce harmonic distortion of the generator

currents and voltages. This leads to a reduction in harmonic losses incurred in the generator’s

magnetic core and winding. The harmonic filter in the grid-side converter helps to meet strict

harmonic requirements specified by the grid codes [2,10].

The output of the grid-side harmonic filter is connected to a three-phase grid (collection-

point) through a step-up transformer. The regional classification of WECS operating voltages

will be presented in Section 1.1.5. By operating the power electronic converter at collection-

point voltage level, the need for the step-up transformer can be avoided.

1.1.5 Classification of WECS Operating Voltages

The definition of WECS operating voltages in the North American and European market

is summarized in Table 1.2 [11]. These operating voltages are further classified according to

low voltage (LV) and medium voltage (MV) operation. Due to the participation of European

manufacturers in North America and vice versa, these regional classifications are becoming

less important [11]. The North American collection-points are rated at 6.9/12.47/13.8/34.5

kV, while European collection-points are designed for 6.6/11/22/33 kV. The commercial wind

turbines can be connected to the transmission lines through step-up transformers irrespective

of the regional voltage classes.

Table 1.2: Voltage classifications by region [source: NREL (2012)]

Region Standard Voltage Class

Low Voltage (< 1000 V)

• 220, 400, 690 V Europe IEC 60038 Medium Voltage (1 − 35 kV)

• 3.3, 6.6, 11, 22, 33 kV Low Voltage (< 600 V)

North • 208, 120/240, 480, 575 V America ANSI C84.1 Medium Voltage (600 V−35 kV)

• 2.4, 4.16, 6.9, 12.47, 13.8, 21, 34.5 kV

1.1.6 Grid Code Requirements

Due to the rapid development of wind power generation worldwide and its integration

into the existing electric power system, many specific technical requirements often called as

“grid codes” have been developed and regularly updated [4, 12–15]. The transmission and

distribution system operators (TSOs and DSOs) of various regions and countries have defined

grid codes based on the experience acquired through the operation of their power systems.

These grid codes are based on the regional and geographical conditions, and they vary from

one utility operator to another, and from one country to another [2]. These grid codes usually

refer to large-scale wind turbines/farms which are connected to MV transmission networks

[12]. These codes stipulate that despite the fluctuating and unpredictable nature of wind

energy, the large wind turbines/farms should behave as active power generation units similar

to the conventional power plants [4]. The main elements in grid codes include active/reactive

power regulation, frequency/voltage control, power factor control, power quality, low voltage

ride-through (LVRT) operation and system protection. The correct interpretation of these

codes is crucial for wind turbine manufacturers as well as utility operators [16].

The grid disturbances, such as three-phase short-circuit faults, cause severe voltage

drop/dips which might lead to disconnection of large-scale wind power generation units.

The sudden disconnection of generation units stimulates instability of the utility network.

The grid codes have dictated some special requirements such as LVRT operation to over-

come the aforementioned scenario. Among all the grid codes, the LVRT, also called fault

ride-through, is the major concern for the wind turbine/ power converter manufacturers.

According to LVRT requirements, during grid faults, the WECS should remain connected

to the grid regardless of the turbine/generator/converter configuration being used, and must

supply reactive power to help the grid to recover from the voltage dip.

The TSOs and DSOs of diverse countries issued different LVRT profiles [13] as shown in

Fig. 1.5. These profiles can be broadly classified into six different categories based on depth

and duration of the grid voltage dips as summarized in Table 1.3. Despite their different

shapes, they all share a common purpose and background, i.e., to keep the electric power

system stable and secure during the grid fault conditions. Among all the LVRT profiles,

the German Transmission and Distribution Utility (E.ON) regulation is likely to set the

standard [17]. According to this code, the LVRT function should start when the grid voltage

falls below 90 % of its nominal value. Recently considerable research has been carried out

addressing this issue [18–23].

Apart from the LVRT operation, another important requirement for WECS is that it

should perform “reactive power control” similar to the conventional power plant. Many

reactive power profiles are defined by diverse TSOs similar to the LVRT profiles [4,12–15].

As an example, according to Danish grid code, when the WECS delivers rated (1.0 p.u.)

active power, it should be able to supply ± 0.33 p.u. reactive power to support grid voltage. This case implies that the WECS should be able to adjust the grid power factor anywhere

from 0.95 lagging to 0.95 leading when it delivers rated active power. This requirement can

be easily fulfilled by properly designing the grid-side converter [2].

G ri d v o lt a g e %

0 tv5 tv4 tv3 tv2 tv1 tv0

Time (ms)

Figure 1.5: Overview of different LVRT profiles.

Table 1.3: Summary of national grid codes and different LVRT profiles

Grid voltages ( %) Time (ms)

Pattern Country v0 v1 v2 v3 v4 v5 tv5 tv4 tv3 tv2 tv1 tv0

Denmark 100 75 NA NA NA 25 100 NA NA NA 750 10000

TSO Ireland 100 90 NA NA NA 15 625 NA NA NA 2800 − E. ON Germany 100 90 NA NA NA 0 150 NA NA NA 1500 −

A USA 100 90 NA NA NA 15 625 NA NA NA 2800 − AESO Alberta (Canada) 100 90 NA NA NA 15 625 NA NA NA 3000 − IESO Ontario (Canada) 100 − NA NA NA 15 625 NA NA NA − −

B* Spain 100 95 80 NA NA 20 500 NA NA 1000 15000 − C Italy 100 90 75 NA NA 20 500 NA NA 800 2000 − D Great Britain 100 90 85 80 NA 15 140 NA 1200 2500 3000 − E DSO Ireland 100 90 80 30 NA 15 625 NA 1000 2600 2800 − F Hydro Quebec (Canada) 100 90 85 75 25 0 150 1000 NA 2000 3000 −

NA = Not applicable, − = Not available, * = same as A, but, with different slopes during tv5 to tv2, and tv2 to tv1

Wind Turbine

Gear Box

SCIG Bypass Switch

Soft Starter PF Compensator

Step-up Transformer

Three-Phase Grid

(a) Type-1: Fixed-speed (± 1 %) WECS with SCIG

Wind Turbine

Gear Box

WRIG Bypass Switch

Soft Starter PF

Compensator

Step-up Transformer

Three-Phase Grid

Variable Resistor

(b) Type-2: Semi variable-speed (± 10 %) WECS with WRIG

Wind Turbine

Gear Box

DFIG

Reduced Capacity Power Converter

Step-up Transformer

Three-Phase Grid

Wind Turbine

Gear Box

PMSG

WRSG

SCIG

100 % Capacity Power Converter

Step-up Transformer

Three-Phase Grid

(d) Type-4: Full variable-speed (0–100 %) WECS with SCIG or PMSG or WRSG

Figure 1.6: State-of-the-art electric generator and power converter configurations for the commercial WECS.

1.1.7 Commercial Configurations of WECS

The major electrical components in WECS are the generator and power electronic con-

verter. As shown in Fig. 1.6, using different designs and combinations with these two

components, a wide variety of WECS configurations can be achieved such as [6,8,24–26]:

• Type-1: SCIG based WECS with ± 1 % speed-range

• Type-2: WRIG based WECS with ± 10 % speed-range

• Type-3: DFIG based WECS with ± 30 % speed-range

• Type-4: PMSG/WRSG/SCIG based WECS with 0–100 % speed-range

A fixed-speed SCIG-based WECS without power converter interface (Type-1 turbine) is

illustrated in Fig. 1.6(a), where the generator is connected to the grid through a soft starter

and step-up transformer [6, 27]. The generator speed varies within 1 % range at different

wind speeds, and thus this configuration is called fixed-speed WECS. A gearbox is normally

required to match the speed difference between the turbine and generator. After the start-up

procedure, the soft-starter is bypassed by a switch, and the system essentially works without

any power converter. The SCIG draws reactive power from the grid and to compensate

for this, three-phase capacitor banks are usually employed [28]. This configuration features

simplicity, low initial costs, and reliable operation. The major drawbacks include: (i) lower

wind energy conversion efficiency, (ii) changes in the wind speed are reflected to the grid, and

(iii) the grid faults cause severe stress on the mechanical components of the wind turbine [29].

The fixed-speed wind turbines are equipped with additional hardware, such as STATCOM, to

comply with the grid codes [30]. Despite its drawbacks, this configuration has been accepted

by the wind industry and commercial solutions are available in MW range such as (i) Vestas

V82, 1.65 MW and (ii) Siemens SWT 2.3-101, 2.3 MW [2].

The variable-speed operation of the wind turbine increases the energy conversion effi-

ciency, and reduces mechanical stress caused by wind gusts, reduces the wear-and-tear of

gearbox and bearings, reduces the maintenance requirements, and increases the life cycle.

The semi variable-speed WECS using WRIG and partial rated (10 %) power converter is

shown in Fig. 1.6(b) (Type-2 turbine). The change in the rotor resistance affects the

torque/speed characteristic of the generator, enabling variable-speed operation of the tur-

bine, and this configuration is often called Optislip control [31]. The rotor resistance is

normally made adjustable by a power converter composed of a diode-rectifier and chopper

[32,33]. The speed adjustment range is typically limited to about ± 10 % of its rated speed. With variable-speed operation, the system can capture more power from the wind, but also

has energy losses in the rotor resistance. This configuration also requires a gearbox, soft

starter and reactive power compensation. The WRIG with variable rotor resistance has

been on the market since the mid 1990’s with a power rating up to a couple of megawatts.

A few examples of commercial solutions are: (i) Vestas V90-3.0 MW, and (ii) Suzlon Energy

S88-2.1 MW [2].

Another semi variable-speed WECS using DFIG is shown in Fig. 1.6(c) (Type-3 turbine)

[34]. As the name implies, the power from the generator is fed to the grid through both stator

and rotor windings [35,36]. A partial rated (30 %) power converter is employed in the rotor

circuit to process the slip power, which is approximately 30 % of the rated generator power.

Similar to those in Type-1 and 2 turbines, this configuration also uses the gearbox, but there

is no need for a soft starter and reactive power compensation [37]. The use of the converters

also allows bidirectional power flow in the rotor circuit and increases the speed range of

the generator. This system features improved overall power conversion efficiency, extended

speed range (± 30 %), enhanced dynamic performance and robustness against power system disturbances compared to the Type-1 and 2 turbines [38–40]. These features have made the

DFIG WECS one of the dominating technologies in today’s wind industry with a market

share of approximately 50 % [3]. A few high power DFIG turbines are: (i) Repower 6M, 6.0

MW, (ii) Bard 5.0, 5 MW, and (iii) Acconica AW-100/3000, 3 MW [20].

The performance of WECS can be greatly enhanced with the use of full-scale (100 %)

power converters as shown in Fig. 1.6(d) (Type-4 turbine) [41–46]. The PMSG, WRSG,

and SCIG have all found applications in this type of configuration with a power rating of

up to several megawatts [8, 26, 47, 48]. With the use of the power converter, the generator

is fully decoupled from the grid, and can operate at full speed range [49–51]. This also

enables the system to perform reactive power compensation and smooth grid connection

[18,21,23,50–52]. The main drawback is a more complex system with increased costs. The

need for the gearbox can be eliminated by using a high-pole number PMSG/WRSG. This

configuration is more robust against power system faults compared to the Type-1, 2 and 3

turbines [2,14,53,54]. The typical commercial turbines include: (i) Enercon E126, 7.5 MW,

(ii) Multibrid M5000, 5 MW, and (iii) Vestas V-112, 3 MW [2].

The top 10 wind turbine manufacturers as of Dec. 2012 and their main turbine config-

urations are summarized in Fig. 1.7. They account for approximately 77 % of the 45 GWs

installed wind power capacity in 2012 [1, 5]. The details about the turbine configurations

are obtained from the respective company product brochures and details from the previous

survey papers [3,20,55–59]. The Type-3 turbines (DFIG) hold the highest market share and

this technology has been used by 7 manufacturers among the top 10. Approximately 100

different DFIG turbine models are available from all the wind turbine manufacturers. The

Type-4 turbines are produced by 6 manufacturers, while 4 of them are offering direct-drive

solutions. This implies that the wind energy market is making progress towards full-scale

power converters based on variable-speed technology.

The summary of all four types of turbines is given in Table 1.4. They are compared using

power converters employed; speed-range achievable; requirement for soft-starter, gearbox and

external reactive power compensation needed; and maximum power point tracking (MPPT)

ability. Overall, the Type-4 turbines with gearless drive-train are most favorable for next

generation MW-level wind turbines.

GE (USA) 15.5 %

Vestas (Denmark) 14 %

Siemens (Germany) 9.5 %

Enercon (Germany) 8.2 %

Suzlon (India) 7.4 %

Gamesa (Spain) 6.1 %

Goldwind (China) 6.0 %

United Power (China) 4.7 %

Sinovel (China) 3.2 %

Mingyang (China) 2.7 %

Rest of the world 22.6 %

100 % = 44,799 MW

Type−3, 4 (3S, DD)

Type−3, 4 (3S)

Type−4 (3S, DD)

Type−4 (DD) Type−3 Type−3, 4 (2S)

Type−4 (DD)

Type−3

Type−1 to 4

Figure 1.7: Summary of top 10 wind turbine manufacturers and their market share by Dec. 2012. [source: REN21 and GWEC] (2S/3S = two-/three-stage gearbox, DD = direct-drive).

Table 1.4: Summary of four types of wind turbine configurations

Fixed-Speed, Semi-Variable Speed, Variable-Speed,

Type-1 Turbine Type-2 and 3 Turbines Type-4 Turbine

SCIG WRIG DFIG SCIG PMSG WRSG

Power Converter None Diode + Chopper AC/DC+DC/AC (or) AC/DC+DC/DC+DC/AC (or) AC/AC

Converter Capacity 0 % 10 % 30 % 100 % 100 %

Speed Range ± 1 % ± 10 % ± 30 % 0–100 % 0–100 % Soft Starter Required Required Not Required Not Required Not Required

Gear Box 3−stage 3−stage 3−stage 3−stage 3− or 2− or 1− or 0−stage Aerodynamic Active Stall, Pitch Pitch Pitch Pitch

Power Control Stall, Pitch

External Reactive Needed Needed Not Needed Not Needed Not Needed

Power Compensation

MPPT Operation Not applicable Limited Achievable Achievable Achievable

1.2 Motivation for Dissertation Research

The motivation for this dissertation research is to study the state-of-the-art power con-

verter configurations and control schemes, and to propose new technologies to: (1) absorb

the best features of the practical technologies, (2) mitigate the problems associated with

the current technologies, (3) decrease cost associated with the power converters, (4) im-

prove wind energy conversion efficiency, and (5) achieve high-performance operation. In this

section, both the power converters and control schemes are studied in detail.

1.2.1 Motivation from the Power Converters’ Perspective

To enable the grid connection of Type-4 wind turbines, the variable voltage/frequency

of the wind generator should be converted to fixed voltage/frequency. To accomplish this, a

wide variety of power conversion stages can be employed as summarized in Fig. 1.8. Some of

these configurations are adopted from the electric drives industry, while some other topologies

have been proposed in literature with promising features for future development. A detailed

discussion about these converters will be presented in Chapter 2. The most common full-

scale converters employed in the present PMSG wind turbines are summarized in Fig. 1.9.

This classification is carried out based on low voltage (LV) versus medium voltage (MV)

operation, and generator-side active (PWM) converters versus passive converters. A list of

the few commercial wind turbines employing these converters is given in Table 1.5.

Full-Scale Power Converters

AC/AC Converters

Cycloconverter Matrix Converter

Cascaded MC

DC/DC Converters

Buck Boost Parallel Boost

Multilevel Buck/Boost

AC/DC Converters

Passive Controlled

Hybrid Controlled

DC/AC Converters

Full Controlled

Current Source

LCI PWM

Voltage Source

MultilevelTwo-Level

Hybrid Diode-

Clamped Flying

Capacitor Cascaded H-Bridge

Figure 1.8: Classification of full-scale power converters used in Type-4 wind turbines.

LV- LV-

LV-LV-

MV-MV- PMSG PMSG

PMSG

GridGrid

Grid

3L-3L- 2L-2L-

2L-2L- Boost

VSR VSR

VSI VSI

VSI

Low Voltage (LV) Medium Voltage (MV)

G en er a to r- si d e

A ct iv e C o n v er te rs

P a ss iv e C o n v er te rs

Filter

(Topology-1) (Topology-2)

(Topology-3)

Not explored yet

Figure 1.9: Review of commercial power converters for PMSG-WECS.

Table 1.5: List of few commercial PMSG wind turbines

Manufacturer Model Rating Topology Enercon E126 7.5 MW, 690 V Gamesa G128 4.5 MW, 690 V Winwind WWD3 3.0 MW, 660 V 1

GE 2.5XL 2.5 MW, 690 V Avantis AV928 2.5 MW, 690 V Areva M5000 5.0 MW, 3300 V

Converteam• MV7000 7.0 MW, 3300 V 2 ABB• PCS6000 6.0 MW, 3300 V

Clipper† C89 2.5 MW, 690 V Vensys V70/77 1.5 MW, 690 V 3

Goldwind GW70/77 1.5 MW, 690 V

• = Converter suppliers, † = Without boost converter

The LV (typical rating is 690 V) two-level (2L) back-to-back (BTB) connected voltage

source converters (VSCs) [43] (Topology-1 of Fig. 1.9) configuration is very popular and this

technology is successfully applied by many manufacturers as summarized in Table 1.5. The

voltage source rectifier (VSR) and voltage source inverter (VSI) are linked through a dc-link

and thus decoupled operation can be achieved.

At higher power levels, the use of MV (typically 3-4 kV) converters offers many benefits

over LV converters: reduced voltage ratings for the switches, better grid code compliance and

higher efficiency [60, 61]. A detailed comparison between LV and MV operation of WECS

will be presented in Chapter 2. Currently only one MV turbine is operational, using BTB

3L-VSCs (most popularly known as neutral-point clamped (NPC) converters) (Topology-2

of Fig. 1.9) [45,62–67], but many manufacturers have announced their future projects based

on MV technology (refer to Appendix A).

In WECS, the power flow is always unidirectional, i.e., from the generator to grid. To de-

crease the cost and complexity of the system, passive converters can be used at the generator-

side instead of active converters, as shown in Topology 3 of Fig. 1.9. The passive converters

are more reliable and economical compared to the generator-side active converters [68].

These active and passive generator-side converters will be compared in more detail in Chap-

ter 2. The use of passive converters is feasible with the PMSG generation system as the

machine does not need magnetizing current [47]. This technology is also being used by many

manufacturers at the LV-level as summarized in Table 1.5.

As shown in Fig. 1.9, for MV-PMSG-WECS, the use of passive generator-side converters

have not been explored yet. This gap in the commercial power converters is the motivation

for the first direction explored by this dissertation research.

1.2.2 Motivation from the Control Schemes’ Perspective

As mentioned earlier, development of sophisticated control schemes is crucial in increasing

WECS efficiency and to comply with the grid code requirements. The development of control

techniques for the power converters is an ongoing research topic. A summary of the most

established control techniques is summarized in Fig. 1.10. The classical control methods

include hysteresis and linear control, while the sliding-mode, intelligent and predictive control

methods belong to the advanced control category.

The classical control techniques are widely accepted by the power electronics and wind

energy industry. Many scholarly works have been presented based on classical control

techniques for the multilevel converters based WECS [2, 14, 67, 69–73]. The classical con-

trol approach uses cascaded linear PI regulators and pulse width/ space vector modu-

lation (PWM/SVM). The favorable approach to using the classical control method with

PWM/SVM is fixed switching frequency. The lower switching frequency operation is an

important requirement at MW-level to minimize switching losses. During such a condition,

the classical control techniques impose several technical/operational challenges such as:

• Non-symmetrical performance characteristics due to the predominant nonlinear nature of power converters

Converter Control

Techniques

Classical Control Techniques Advanced Control Techniques

Hysteresis

Control

Current

Control

Direct Torque

Control (DTC)

Direct Power

Control (DPC)

Linear

Control

Current

Control

Field Oriented

Control (FOC)

Voltage Oriented

Control (VOC)

Sliding Mode

Control

Current

Control

Voltage

Control

Intelligent

Control

Fuzzy Logic

Control

Artificial Neural Network Based Control (ANN)

Fuzzy-ANN

Control

Predictive

Control

Deadbeat

Control

Hysteresis

Based Control

Trajectory

Based Control

Model Predictive

Control (MPC)

MPC With Continuous Control

Set (CCS)

MPC With Finite Control Set (FCS)

Figure 1.10: Classification of control techniques used for the power converters.

• Significant lower order harmonics which cause poor power quality and conflict to the grid codes [74]

• Sluggish transient response due to low-bandwidth modulation stage [75]

• Coupling of control variables such as d- and q-axis grid currents

• Degraded performance due to the grid voltage harmonics and control delay [76]

• Complicated approach to include system constraints in the design of controller [77]

The family of predictive control (PC) techniques includes deadbeat PC, hysteresis-based

PC, trajectory-based PC and model-based PC (MPC) [78]. Recently, a finite control-set

model predictive control (FCS-MPC) strategy appeared as an intuitive and promising alter-

native to control the power converters [75, 77, 79], and this method eliminates the need for

linear regulators and modulators. The FCS-MPC is a nonlinear control method and provides

a better suited approach to control the power converters while mitigating the aforementioned

disadvantages associated with the classical control method [80,81]. With an appropriate def-

inition of cost function, several constraints and technical requirements can be incorporated

in a straight-forward manner to the design and operation of the controller. The cost which

is paid to use FCS-MPC is a higher computational burden, but the modern digital signal

processors can perform large amount of calculations at low cost.

Most scholarly works on predictive control are related to the power electronics and motor

drive applications. The modeling, design and analysis of the FCS-MPC strategy for the

power converters employed in the MW-WECS have not been studied yet. Despite the simple

and attractive nature of FCS-MPC strategy, several challenges exist in the state-of-the-art

research which includes, but is not limited to: (1) accurate modeling of multilevel converters,

(2) appropriate selection of weighting factors, (3) control delay compensation, (4) accurate

extrapolation of references, (5) control of variable switching frequency nature, (6) prediction

of variables over two samples with reduced computational burden, and (7) enhancement

of robustness. All these issues have been motivations to investigate the high-performance

FCS-MPC strategy for megawatt wind energy systems.

1.3 Dissertation Objectives

The target application for this dissertation research is DD-PMSG based MV-MW wind

turbines. As summarized in Fig. 1.11, the research directions for this dissertation are

twofold: the first one is to investigate next generation power converters; and the second one

is to explore high-performance control schemes.

Dissertation

Directions/Objectives

DD-PMSG Based

MV-MW-WECS

Investigation of

Next-Generation

Power Converters

Investigation of

Next-Generation

Control Schemes

Figure 1.11: Summary of dissertation research directions and objectives.

1.3.1 Investigation of Next-Generation Power Converters

The first direction for the dissertation objectives is to investigate the next-generation

power converters. The initiative of this work is to combine the advantages of proven wind

turbine technologies (listed in Fig. 1.9) such as low-cost generator-side passive converters

and efficient grid-side multilevel converters.

MV-MV- PMSG Grid

3L-3L- Boost NPC

Filter

(a) Three-level converter-based PMSG-WECS

MV-MV- PMSG Grid

4L-4L- Boost DCC

Filter

(b) Four-level converter-based PMSG-WECS

Figure 1.12: Next-generation power converters for the MW-MV-PMSG-WECS.

The dissertation objectives in this regard are summarized as follows:

1) Investigation of novel power converters for 3–4 kV class WECS

As demonstrated in Fig. 1.12(a), a diode rectifier, three-level boost (TLB) converter

and neutral-point-clamped (NPC) inverter can be used for 3–4 kV class WECS without

connecting the switching devices in a series. This configuration would be very promising

if the dc-link capacitor voltages were balanced during all the operating conditions with

the help of a TLB converter. This feature would help to simplify the control system for

the NPC inverter while improving the grid current shape compared to the BTB-NPC

converters.

The first objective is to investigate the feasibility of applying this configuration in

megawatt wind energy systems, and to compare its performance with the BTB-NPC

converters. Further studies must be performed to investigate the performance of con-

verters during grid fault conditions. The maximum power point tracking (MPPT)

must also be investigated with this configuration.

2) Investigation of novel power converters for 4–10 kV class WECS

Unlike the MV drives, which are fed by standard utility voltages of 2.3, 3.3, 4.16, 6.0,

6.6, 6.9, 7.2, 10, 11 and 13.8 kV, there is no such standard for wind turbines. To meet

the future generation of 4–10 kV class WECS (as defined in [82]), four-level converters

can be used as shown in Fig. 1.12(b). The requirement for the step-up transformer

can be eliminated by directly connecting the wind turbine to 4–10 kV three-phase grid

(collection-point). Compared to the three-level converters, the requirement for the

grid-side filter is lower to achieve similar levels of grid power quality. Balancing the

dc-link capacitor voltages is difficult with the four-level converters compared to three-

level converters [83, 84]. However, similar to the TLB converter, the four-level boost

(FLB) converter can balance the dc-link capacitor voltages during all the operating

conditions.

In addition to the aforementioned objectives, the feasibility and performance of the

four-level converters should be analyzed for wind energy application. The objectives

are extended to compare the performance of four-level converters with the three-level

converters [Fig. 1.12(a)] and BTB-NPC converters.

1.3.2 Investigation of Next-Generation Control Schemes

The FCS-MPC method is anticipated to be one of the next generation control tools, and

thus is considered secondary subject matter for this dissertation. The main objectives with

respect to the development of control schemes for the megawatt WECS are summarized as

follows:

3) Continuous- and discrete-time modeling of power converters and WECS

The optimal control actions of the predictive control strategy are mainly based on the

model of the system. A poor modeling of the system will lead to an inferior control

performance. The continuous-time models should be converted to discrete-time with

a suitable method such that control delay and prediction horizon can be incorporated.

In this work, the third objective is set to accurately model different control variables

in terms of converter switching states.

4) Performance improvement of predictive control strategy

Despite many best features of FCS-MPC strategy, several challenges are reported in

the state-of-the-art literature. A few examples include: weighting factors selection,

control delay compensation, accurate extrapolation of reference control variables, vari-

able switching frequency nature, prediction of variables over two or more samples with

reduced computational burden, and enhancement of robustness against perturbations

in the system model.

In this dissertation, the next objective is defined to address the above challenges, and

to promote the FCS-MPC strategy as the one of the next generation control tools.

5) Development of generalized control strategy for multilevel diode-clamped con-

verters (MLDCCs)

In this work, 3L and 4L converters are proposed for the MW-WECS, and thus the

control scheme developed for one converter should work for the other, too. In classi-

cal control (which is a mature subject matter), many works have been presented to

generalize the control of load current, dc-link capacitor voltages and common-mode

voltage in MLDCCs. But in the current predictive control research area, this issue is

not addressed yet.

Development of a generalized approach for the predictive control of MLDCCs is defined

as the next objective. All the control goals must be treated in the modeling and design

of the controller.

6) Development of efficient controllers for the grid-tied MLDCCs

The grid-tied MLDCCs play a crucial role in dispatching wind power and also to meet

grid codes. The control techniques for the grid-side converter should perform multiple

tasks to ensure proper and reliable operation of WECS.

The next objective is specified to design efficient controllers such that grid-tied MLDCC

control requirements such as net dc-bus voltage/grid active power control, reactive

power generation to meet grid operator request, dc-link capacitor voltages balancing,

and lower switching frequency operation can be fulfilled simultaneously.

7) Design of decoupled control system for the PMSG-WECS

In order to achieve decoupled operation for the generator- and grid-side converters, the

control systems should be properly designed. In addition to the aforementioned grid-

side control requirements, the MPPT operation should be performed by the generator-

side converter. The control systems should generate reference control variables in order

for the WECS to operate at higher efficiency.

The next objective of this work is the design and implementation of sophisticated con-

trol systems for efficient operation of three-level and four-level converter-based WECS.

8) LVRT enhancement for the proposed WECS using FCS-MPC strategy

The state-of-the-art LVRT solutions for PMSG-WECS include pitch control system,

over sizing of dc-link capacitors, dissipation of surplus energy in dc-link crowbar (re-

sistor), storage of surplus energy in the battery banks and fly-wheel systems, use of

power quality conditioning devices. The surplus energy can be stored in the mechanical

system inertia during the grid voltage dips, and this issue is previously analyzed with

CSC and NPC converters, and with classical control techniques. The complete WECS

response with passive generator-side converters has not been explored yet.

The last objective is defined to develop a FCS-MPC control system such that the

power converters operate in a safe mode (by maintaining constant dc-bus voltage),

while meeting the grid code requirements.

1.4 Outline of Dissertation

The research presented in this dissertation is organized into 10 chapters. The outline of

the research is summarized in Fig. 1.13. The work carried out in each chapter is summarized

as follows:

DD-PMSG Based MV-MW-WECS

Chapters 2 and 3 Review of Full-Scale Power Converters and State-of-the-Art Control Schemes

Chapter 4 Generalized Approach for Predictive Control in Multilevel Diode-Clamped Converters

Chapters 5 and 6 Predictive Control of

Grid-Tied Multilevel Inverters

Chapters 7 and 8 Predictive Control of

3L and 4L Converter-based PMSG-WECS

Chapter 9 Predictive Control for LVRT Enhancement of

3L Converter-based PMSG-WECS

Figure 1.13: Organization of dissertation research.

Chapter–1: An overview of WECS is presented with additional details about major com-

ponents of wind turbines, regional classification of operating voltages, grid code re-

quirements and generator-converter configurations. Novel converters are investigated

by combining the generator-side passive converters and grid-side multilevel inverters.

Chapter–2: This chapter reviews the state-of-the-art full-scale power converters employed

in the Type-4 wind turbines. The BTB converters, passive generator-side converters,

and converters for six-phase and open winding generators are presented and analyzed

for megawatt application. The possible extensions to the proposed converters are also

presented in each category.

Chapter–3: An overview of state-of-the-art converter control schemes are presented in this

chapter and compared based on a simple example of load current control. The operating

principle, design procedure, cost function flexibility, delay compensation strategies and

extrapolation methods are presented for the FCS-MPC strategy.

Chapter–4: This chapter proposes a generalized approach based on FCS-MPC strategy for

the current control, dc-link capacitor voltages balancing, switching frequency reduction

and common-mode voltage mitigation in multilevel diode-clamped converters. The

feasibility of the proposed method is verified by simulations in 3L- to 6L-converters,

and by experiments in 3L- and 4L-converters.

Chapter–5: In this chapter, a model predictive control of MV, grid-tied 4L-inverter for use

in MW-WECS is presented, assuming that the MPPT is performed by the generator-

side converter. The regulation of net dc-bus voltage, reactive power generation to

meet the grid operator request, dc-link capacitor voltages balancing, and switching

frequency minimization, is discussed in detail.

Chapter–6: A FCS-MPC method is proposed in this chapter to directly control the active

and reactive grid powers assuming that the grid-tied inverter performs the MPPT

operation.

Chapter–7: This chapter introduces a three-level converter-based MV-MW-PMSG-WECS.

The discrete-time modeling and control scheme development are discussed. The pro-

posed topology and control strategy are verified through MATLAB simulations on 3

MW/3000 V/577 A system and dSPACE DS1103 based experiments on 3.6 kW/208

V/10 A prototype.

Chapter–8: The four-level converter-based WECS is presented in this chapter. The continuous-

and discrete-time modeling of the proposed power conversion system is presented and

analyzed. A two-step predictive scheme is developed to control the generator- and

grid-side converters independently.

Chapter–9: In this chapter, a predictive control scheme is proposed for LVRT enhancement

of DD-PMSG based MW-WECS. The power conversion system is realized using the

three-level converters introduced in Chapter-7. Simulation and experimental results

are presented to validate the proposed strategy.

Chapter–10: The main contributions of this dissertation are summarized. Possible exten-

sions to the research presented in this dissertation are suggested.

Chapter 2

Review of Power Converters for High

Power Wind Turbines

Many generator-converter configurations were developed over the past decades with the

aim of increasing WECS efficiency, decreasing production costs and complying with grid code

requirements. A summary of different power conversion stages has been previously analyzed

in Fig. 1.8. The classification of wind turbine power converters is a complex matter and it

is not possible to classify all the converters based on one parameter/operation. As shown

in Fig. 2.1, the converter configurations are classified here into four different groups to

facilitate easier discussion. Most of the power conversion stages have found commercial

applications, and some have been proposed in the literature with promising features for

future development. Based on the existing knowledge, new converter configurations are also

proposed in each category.

The power converters discussed in the Fig. 1.8 can be employed with the PMSG and

WRSG, but SCIG has restrictions on using passive generator-side converters. The gearbox

model is not shown in all the figures, but a 3-stage gearbox is mandatory for SCIG. The main

features and drawbacks of each configuration are also discussed in the following sections, with

important survey results tabulated.

Full-Scale Power Converters

Back-to-Back Connected Converters

Passive Generator-side Converters

Converters for Six-Phase Machines

Converters for Open-Winding

Machines

Figure 2.1: Classification employed in this chapter for full-scale power converters.

2.1 Back-to-Back Connected Converters

The power converters, which are identical on both the generator- and grid-side, and

linked through a dc-link, are classified as back-to-back (BTB) connected converters. Different

BTB converters which can be used in the commercial WECS are summarized in Fig. 2.2.

They perform a conversion of variable voltage/frequency output of the generator to dc, and

then dc to ac, with fixed voltage/frequency for the grid connection. The power flow is

bidirectional, and thus the BTB converters can be used with SCIG, PMSG and WRSG.

The BTB converters are classified as low voltage (< 1 kV) and medium voltage (1 − 35 kV) converters according to IEC 60038 standard given in Table 1.2. The most standard voltages

used by many commercial wind turbine manufacturers for the LV grid connection are 690 V

and 575 V.

Back-to-Back Connected Converters

Low Voltage Converters

Medium Voltage Converters

2L VSC

Parallel Switches

Parallel Modules

Current Source Converters

Voltage Source Converters

Series Switches

3L and 4L DCC

3L Active NPC

3L and 4L FC

Figure 2.2: Classification of back-to-back connected converters.

PMSG

WRSG

SCIG

(LV)

2L-VSR DC-link 2L-VSI

LCL

Step-up Transformer

Utility Grid

Figure 2.3: WECS with BTB connected 2L voltage source converters.

2.1.1 Low Voltage (LV) Converters

A typical WECS using BTB connected two-level (2L) voltage source converters (VSCs)

is shown in Fig. 2.3 [41,85]. The voltage source rectifier (VSR) and voltage source inverter

(VSI) are linked by a dc-link composed of series/parallel connected capacitors [86]. The dc-

link capacitors provide decoupling between the generator and grid, and thus the transients

in the generator do not appear on the grid-side [42,86]. The semiconductor switching devices

are realized using LV Insulated Gate Bipolar Transistors (LV-IGBTs). The PMSG, WRSG

[41, 85] and SCIG [87, 88] generators can be used with this configuration. This is the most

widely used topology for high power wind turbines rated below 0.75 MW [2].

The switching frequency of VSR and VSI is maintained at 1–3 kHz to achieve lower

switching losses [41,66]. The grid current contains higher total harmonic distortion, and to

meet the grid codes, LCL filters are used on the grid-side [10]. The generator-side harmonic

filter is not shown. Due to the mass production of three-phase converter modules, the cost

of these converters is low. One of the most widely used commercial VSC modules is SKiiP

by Semikron which is equipped with its own heat sink, semiconductor switching devices and

gate drivers, and thus they feature compact design with high power density [89,90].

PMSG

WRSG

SCIG

(LV)

(L V )

2L-VSR 2L-VSI Filter

Open Winding

Transformer

Figure 2.4: Parallel connected BTB 2L-VSCs and open winding transformer.

For power ratings greater than 0.75 MW, the current carrying capability can be in-

creased by connecting IGBT modules in parallel. Some manufacturers such as Semikron

provide IGBT modules for the parallel operation in order to reach megawatt-level [2, 90].

This configuration leads to derating of the power converter due to a mismatch in IGBT

characteristics and non-symmetrical layout of the converter circuits. To minimize the circu-

lating currents among the switches, many design considerations such as static and dynamic

sharing of IGBT’s, and physical layout of gate drivers, IGBT modules and dc-link capaci-

tors, should be properly treated. The circulating currents flow through the IGBT switches,

increase losses in them and perhaps damage them.

To avoid the above-mentioned problems, the three-phase VSC converters along with

harmonic filters can be connected in parallel instead of through IGBT modules. For example,

two BTB VSC modules can be connected in parallel to achieve a power rating of 1.5 MW. For

higher power ratings, more converter modules can be connected in parallel as shown in Fig.

2.4. The dc-link can also be configured as a common element for all the converters to reduce

cost and space [91]. This configuration offers energy efficiency and redundancy. For example,

when the wind speed is low, one or more converters can be turned-off leading to higher system

efficiency. When a converter fails, other converters can still deliver the power, but with

reduced capacity. Moreover, by operating converters in interleaving mode, the equivalent

converter switching frequency can be increased, therefore producing less total harmonic

distortion in generator- and grid-side currents. Due to a mismatch in converter and grid-side

filter parameters, the circulating currents exist in both the generator and grid-side converters

and this issue should be considered in the design of the controller. On the generator side,

L filters are connected between each converter to reduce the circulating currents. Another

alternative to reduce circulating currents is to use open-winding generators, which will be

discussed in Section 2.4. To minimize the circulating currents, open winding transformers

can also be used at the grid-side.

2.1.2 Medium Voltage (MV) Converters

The LV converters discussed before are efficient and cost effective at power levels lower

than 3 MW. As the power rating increases, the number of converter modules increases and as

a result, the size, cost and complexity of the system also increases. A summary is provided

between the LV and MV operation of a 6 MW wind turbine in Table 2.1, where it has been

noticed that the MV operation of WECS is the most suitable and economical approach for

power ratings greater than 3 MW. The MV operation is a mature technology in the electric

drive industry [92], but wind turbine manufacturers are reluctant to move from LV to MV

technology due to the limited availability of MV generators and less knowledge available for

the MV operation of turbines. In [11], a detailed cost analysis has been carried out between

the LV and MV operation of wind turbines, and the results show that the cost of energy

production can be decreased by 2-4 % with MV operation. Currently only a few MV turbines

are operational, but many manufacturers have announced their future projects based on MV

technology (refer to Appendix A).

The two-level VSC shown in Fig 2.3 can also be used for MV applications by connecting

the switching devices in a series. This is a simple solution for MV operation, but due to

the mismatch in IGBT characteristics, the converter capacity decreases. The grid current

quality does not improve compared to the standard two-level VSC, because the converter’s

output is essentially two-level.

Table 2.1: Summary of LV and MV operation for a 6 MW wind turbine

LV WECS MV WECS

Typical Converter BTB 2L-VSC BTB 3L-VSC

Recommended for [2] 0.5–3 MW 3–6 MW

Typical Voltage (V) 690 3000

Number of Converters 8 1

Active Switches 96 24

Switching Device [92] LV-IGBT MV-IGBT/IGCT

IGET/GCT/SGCT

Clamping Diodes 0 12

DC Voltage (V) [2] ≈1200 ≈5300 DC-link Capacitors∗ 8 5 Converter Complexity High Low

Controller Complexity Medium Low-Medium

Type of Generator LV MV

Cost of Generator Medium Medium-High

Rated Current (A) 5020 1155

Circulating Currents High None

Cable Type LV MV

Cable Size Very High Low

Cable Cost Very High Low

Transformer Size High Medium

Grid-Filter Size High Medium

Power Quality Medium Good

Grid Code Compliance Good Excellent

Converter Location [3] In Nacelle Bottom of Tower

Nacelle Weight [3] High Low

Converter Weight Very High Medium

Cost of Production [11] 100 % 96–98 %

Maintenance Cost [11] Low Low

Redundancy High Low

WECS Efficiency Medium High

Market Status Mature Available/

Emerging

Turbines Enercon Multibrid

E-126 M5000

* Based on 1200 V Rating

The neutral-point-clamped (NPC) converter has been widely studied in literature [45,61,

62, 64, 67, 93–95]. As shown in Fig. 2.5, the NPC converters are used in commercial wind

turbines, where the system power rating has reached 6 MW without connecting switching

devices in series or parallel [62]. The switching devices, such as HV-IGBT or Insulated

Gate-Commutated Thyristor (IGCT) with a voltage rating of 4.5–6.5 kV can be used. In

the commercial wind turbines, the NPC converters are reported to have been used with the

PMSG, but they can also be used with WRSG and SCIG. The switching actions of the

semiconductor switches lead to the drift in the capacitor voltages. If the capacitor voltages

are not balanced, it leads to higher stress on the semiconductor switches and damages them.

To ensure equal voltage among the dc-link capacitors, external hardware can be used [96].

It is also possible that the carrier-based pulse with modulation (PWM) with zero-sequence

voltage injection [97] or space vector modulation (SVM) with redundant switching states

selection [98–105] can be used to balance the capacitor voltages.

PMSG

WRSG

SCIG

(MV)

3L-VSR DC-link 3L-VSI

Figure 2.5: WECS with BTB connected 3L diode-clamped converters.

The NPC converters are most suitable for 3-4 kV class MV operation. To connect to

the MV collection point of 6.9 kV (North America Standard) or 6.6 kV (Europe Standard)

without using a step-up transformer, the switching devices in a NPC converter should be

connected in a series [84,106], but this approach leads to derating the converter. As shown

in Fig. 2.6, a four-level (4L) diode-clamped converter (DCC) is proposed in this work to

achieve higher levels of MV operation. In comparison to the three-level (3L) DCC (NPC

converter), the 4L-DCC offers added benefits such as: MV operation with greatly reduced

device voltage rating, increased equivalent switching frequency, lower values for the grid-

side filter, grid friendly waveforms, and better grid code compliance. However, the dc-link

capacitor voltages balancing becomes more complex and sophisticated, and therefore control

techniques or external hardware should be used [81, 107, 108]. The semiconductor device

count also increases. In particular, the clamping diodes increase from 12 to 36 in comparison

to the BTB NPC converters. The four-level converters are not commercialized yet, but the

basic power semiconductor switches are readily available in the market.

PMSG

WRSG

SCIG

(MV)

4L-VSR DC-link 4L-VSI

P ro p o se d T o p o lo g y

Figure 2.6: WECS with BTB connected 4L diode-clamped converters.

The semiconductor devices in the NPC converter operate with different switching fre-

quencies and thus cause uneven power losses and heat dissipation. This leads to a difficulty

in the design of the mechanical layout of the semiconductor switches. This problem can

be solved by using active neutral-point clamped (ANPC) converters as discussed in [109].

This configuration is successfully applied in the MV drives industry, but not yet studied for

WECS.

The clamped diodes in the BTB NPC converters can be replaced by the flying capaci-

tors (FC) as shown in Fig. 2.8. This configuration offers a simplified structure and more

redundant switching states in order to achieve easier control for the capacitor voltage bal-

ancing [110,111]. This configuration requires a large number of capacitors and each of them

requires pre-charging circuit. The diodes are more reliable than the capacitors, and thus this

configuration has not found its commercial application in the wind energy industry yet, even

though a successful topology in MV drives industry. The control scheme requires a greater

number of sensors to send feedback signals from the FC’s and these add cost and complexity

to the system.

PMSG

WRSG

SCIG

(MV)

3L-ANPCR DC-link 3L-ANPCI

Figure 2.7: WECS with BTB connected 3L active neutral point clamped converters.

PMSG

WRSG

SCIG

(MV)

3L-FCR DC-link 3L-FCI

Figure 2.8: WECS with BTB connected 3L flying capacitor converters.

The previously discussed topologies belong to voltage source converters. The current

source converters (CSC) can also be used in wind turbines as shown in Fig. 2.9. The

topology consists of PWM current source rectifier (CSR) and current source inverter (CSI).

The CSR and CSI are linked by a dc-choke and thus, similar to the VSCs, decoupling between

the generator and grid can be achieved [49]. Three-phase capacitor banks are used on the

ac-sides of CSR and CSI to assist the commutation of semiconductor devices and also to

mitigate the switching harmonics. This topology features a simple structure, low dv/dt at

the output terminals of the converter, and reliable short-circuit protection. In VSCs, the dc-

link capacitors are bulky components, whereas in CSC, the dc-choke is the bulky component.

The dynamic response of the CSC converters is slower compared to the VSC converters due

to bulky dc-choke and lower switching frequency operation. The cost of CSC production

is 1-2 % lower compared to the VSC converters [11]. The CSC technology is successfully

applied to the multi-megawatt MV drives [112], but it is not yet used in the MV-WECS.

PMSG

WRSG

SCIG

(MV)

CSR DC-link CSIFilter Filter

C o m m o n -m

o d e C h o k e

Figure 2.9: WECS with BTB connected current source converters.

Table 2.2: Comparison of BTB connected converters for megawatt wind turbines

2L-VSC 3L-DCC 3L-ANPC† 3L-FCC† 4L-DCC CSC†

(Fig. 2.4) (Fig. 2.5) (Fig. 2.7) (Fig. 2.8) (Fig. 2.6) (Fig. 2.9)

Number of Converters 4 1 1 1 1 1

Active Switches 48 24 24 24 36 24

Clamping Switches 0 0 12 0 0 0

Clamping Diodes 0 12 0 0 36 0

Clamping Capacitors 0 0 0 12 0 0

Voltage Stress vdc vdc 2

vdc 2

vdc 3

vdc 2

Operation Voltage (kV) 0.69 3–4 3–4 3–4 ≈3–7 3–4

Operation Power (MW) 3 3–6 ≈3–6 ≈3–6 ≈3–7 ≈3–10

Power Quality Med. Good Good Good Excellent Good

Converter Complexity High Med. Med.-High Low-Med. Med.-High Low

Controller Complexity Med. Med.-High Med.-High Med. Med.-High Med.-High

Reliability High Med. Med.-High Low-Med. Med. High

Switching Devices LV-IGBT MV-IGBT MV-IGBT MV-IGBT MV-IGBT GTO

IGCT IGCT IGCT IGCT SGCT

Commercial Products Enercon E126 PCS6000 PCS8000 VDM6000 – PF7000

Vestas V-112 MV7000

* denotes clamping devices, † denotes a product from electric drives industry, vdc is net dc-bus voltage.

2.2 Passive Generator-side Converters

The previously discussed BTB topologies enable a four-quadrant operation. But in the

WECS, the power flow is unidirectional i.e., from the generator to the grid. To decrease

the cost and complexity of the system, passive converters can be used at generator-side

instead of PWM active converters. The diode-rectifiers are inherently more reliable than the

PWM converters. It should be noted that the PMSG and WRSG do not need magnetizing

current, and thus passive converters can be used [68]. The summary of comparison between

the active and passive generator-side converters is given in Table 2.3. The control system

development for the MPPT is less complicated with the passive converters. Due to the

greatly reduced control complexity, a low cost control platform can be used. The cost and

complexity associated with the gate drivers also decrease as the active switches decrease from

6 to 1. The only disadvantage with the diode rectifiers is that the generator torque contains

higher ripples due to significant 5th and 7th harmonics in the generator current [113, 114].

However, due to decoupling offered by the dc-link, these ripples do not cause any conflict to

the grid-codes.

Table 2.3: Summary of active and passive generator-side converters for WECS

Active Generator-side Converters Passive Generator-side Converters

Typical Converter VSC/CSC Diodes

Cost High Low

Reliability Medium High

Converter Complexity High Low

Controller Complexity High Low

MPPT Achievable Achievable∗

Generator Size 100 % ≈105 % Gen. Torque Ripple Low Medium

Gen. Current Sinusoidal Non-Sinusoidal

Nacelle Weight High Low

Converter Weight High Medium

Maintenance Cost Low Very Low

Market Status Mature Available

Turbines Enercon Vensys

E-126 V70/77

* Using Boost Converter

The WECS with diode-rectifier, boost converter and PWM inverter is shown in Fig. 2.10.

The variable output voltage of the generator is converted to dc by the diode-rectifier and

the boost converter performs the maximum power point tracking, which increases the energy

capture and thus improves overall system efficiency [115,116]. The boost converter increases

the unregulated dc-link voltage to a higher level that is suitable for the PWM inverter. To

decrease the size of the dc choke, a two-channel boost converter [117] can be used as shown

in Fig. 2.11. By using interleaving operation for the two channels, the inductor current

ripple can be minimized. The voltage rating of the semiconductor switches is the same as

of the dc-link voltage, but the current carrying capacity becomes half. The three-channel

boost converters are also employed in commercial wind turbines (Vensys 70/77).

PMSG

WRSG

(LV)

2L-VSI2L-Boost Converter

Figure 2.10: WECS with diode rectifier, 2L boost converter and 2L-VSI.

PMSG

WRSG

(LV)

2L-VSI2-Channel Boost Converter

Figure 2.11: WECS with diode rectifier, two-channel boost converter and 2L-VSI.

The diode-rectifiers can also be used in MV WECS. As shown in Fig. 2.12, the generator-

side NPC rectifier can be replaced with a diode-rectifier to achieve lower cost compared to

the BTB NPC converters and to the parallel 2L-VSC converters. A standard two-level boost

converter can be included as an intermediate stage to improve the wind energy conversion

efficiency [94]. The voltage stress for the active switch and diodes used in the two-level

boost converter is the same as the net dc-bus voltage, and thus they should be connected in

a series.

Using the same number of active switches and diodes, the 2L-boost converter can be

modified to 3L-boost converter as shown in Fig. 2.13. With this topology, the advantages

of generator-side passive converters and grid-side multilevel converters are combined. The

voltage rating for the IGBT/IGCT switch and diode are half of the net dc-bus voltage.

PMSG

WRSG

(MV)

3L-VSI2L-Boost Converter

Figure 2.12: WECS with diode rectifier, 2L boost converter and 3L-VSI.

PMSG

WRSG

(MV)

3L-VSI3L-Boost Converter

P ro p o se d T o p o lo g y

Figure 2.13: WECS with diode rectifier, 3L-boost converter and 3L-VSI.

The three-level boost converter offers many befits compared to the standard boost con-

verter: reduced switching losses and reduced reverse recovery losses [118]. Compared to the

BTB NPC converters introduced in Fig. 2.5, the number of active switches in generator-side

converter decrease from 12 to 2, and it leads to a cost-effective solution for MV turbines. The

number of switching states also decrease from 27 to 4, and thus the control complexity and

computational burden greatly decreases. As described in [67], in the BTB NPC converter-

based WECS, both the generator- and grid-side converters should take precise switching

actions so that the dc capacitor voltages are balanced. However with the proposed configu-

ration, the dc capacitor voltages are controlled by the three-level boost converter during all

the operating conditions, and this gives control flexibility for the NPC inverter to effectively

track to the grid current references. This feature also leads to enhanced grid power quality

and better compliance to the grid codes.

PMSG

WRSG

(MV)

4L-VSI4L-Boost Converter P ro p o se d T o p o lo g y

Figure 2.14: WECS with diode rectifier, 4L-boost converter and 4L-VSI.

Similar to the 3L boost converter, a 4L-boost converter can be used in conjunction with

the four-level diode-clamped inverter as shown in Fig. 2.14. As mentioned earlier, the bal-

ancing of the dc-link capacitor voltages with the 4L-DCC is very complicated compared to

the NPC converter [83, 84]. But the intermediate 4L-boost converter ensures balancing of

the dc-link capacitor voltages during all the operating conditions. The 4L-boost converter

is composed of three active switches and four diodes. The voltage rating of these devices

is one third of those used in the standard boost converter. Thus the cost of this converter

is approximately the same as that of a standard boost converter [119]. In comparison to

the BTB 4L converters shown in Fig. 2.6, this configuration decreases the number of active

switches and clamping diodes significantly in the generator-side converter. Even with the

higher number of clamping diodes in the grid-side converter, the cost of this configuration

becomes approximately equal to the 3L BTB converters.

PMSG

WRSG

(MV)

3L-ANPCI3L-Boost Converter

P ro p o se d T o p o lo g y

Figure 2.15: WECS with diode rectifier, 3L-boost converter and 3L-ANPCI.

PMSG

WRSG

(MV)

CSI

CL Filter

3L-Buck Converter

P ro p o se d T o p o lo g y

Figure 2.16: WECS with diode rectifier, 3L-buck converter and CSI.

To overcome the problem of uneven power losses and heat dissipation associated with

the NPC converters, the grid-tied NPC converter can be replaced by the ANPC converter,

as shown in Fig. 2.15. Since the capacitor voltages are balanced by the 3L-boost converter,

the ANPC converter will have more control freedom in selecting the switching states which

leads to better even power losses and heat dissipation. The cost and complexity of this

configuration is much lower compared to the BTB-ANPC converters presented in Fig. 2.7.

The CSCs can also be designed with a passive generator-side converters as demonstrated

in [120–122]. In VSCs the dc-link voltage should be boosted, while in CSCs, the dc-link

current should be boosted. The duality of the proposed 3L-boost converter is a 3L-buck

converter. The configuration using 3L-buck converter and CSI is shown in Fig. 2.16.

The high grid current quality is more important to comply with the grid codes and to

achieve this 5L to 9L-ANPC converters can be used as demonstrated in [60, 123]. These

configurations lead to excellent power quality and a filterless grid connection. However, in

these configurations, the dc-link capacitor voltages need to be controlled by the grid-tied

inverter. As mentioned earlier, this leads to higher control complexity for the grid-tied in-

verter. To overcome this challenge, a 3L-boost converter can be employed to directly fit the

two dc-link capacitors of the grid-tied ANPC converter (shown in Fig. 2.17). In comparison

to the works presented in [60, 123], the proposed configuration leads to a less complicated

control scheme and grid-friendly waveforms.

PMSG

WRSG

(MV)

5L-ANPC 7L-ANPC

9L-ANPC

3L-Boost Converter

P ro p o se d T o p o lo g y

Figure 2.17: WECS with diode rectifier, 3L-boost converter and multilevel ANPC.

2.3 Converters for Six-Phase Machine Based WECS

The six-phase machines are also used in the commercial wind turbines. With the two sets

of windings, the insulation level for each winding decreases. The power handling capacity

can be improved two times as each set of winding carries half the rated current. A six-phase

WRSG (PMSG) based WECS is shown in Fig. 2.18. The stator windings are separated by

30◦ and thus the stator voltages are phase shifted by 30◦. This leads to cancelation of lower

order harmonics in the stator currents with which the torque ripples can be minimized.

Lower sized filters can then be used on the generator side. Since these two windings are

separated, no circulating current flows and thus the complexity of control system decreases.

PMSG

WRSG

SCIG

(LV)

2L VSR 2L-VSI

6-Phase Machine

3 0 ◦

Figure 2.18: Six-phase machine based WECS with parallel 2L-VSC modules.

PMSG

WRSG

(LV)

2L Boost Converter 2L-VSI

6-Phase Machine

3 0 ◦

Figure 2.19: Six-phase machine based WECS with parallel 2L-boost + 2L-VSC modules.

A similar six-phase configuration with a passive generator-side converters is shown in

Fig. 2.19 [124]. The disadvantage of high torque ripples with the diode rectifiers can be

mitigated by employing a six-phase configuration with 30◦ phase shift.

The MV operation of wind turbines is cost effective and a promising solution for megawatt

wind turbines. But, one of the shortcomings in the current wind energy industry is the lack

of availability of the MV generators. The use of LV converters at the generator-side and

MV converters at the grid side represents a very promising approach. A configuration with

series-connected LV converters on the generator-side and the NPC converter on the grid-side

is shown in Fig. 2.20 [73]. The LV outputs of the generator-side converters are connected in

a series to achieve higher dc-link voltage. The capacitor voltages are balanced by the NPC

converter. This configuration may not work during the whole wind speed range.

PMSG

WRSG

SCIG

(LV)

(MV)

Series 2L-VSRs DC-link 3L-VSI

3 0 ◦

Figure 2.20: Series connected 2L-VSRs at generator-side and 3L-VSI at grid-side.

PMSG

WRSG

(LV)

(MV)

3L-VSI

6-Phase Machine

Series 2L-Boost

3 0 ◦

Figure 2.21: Series connected 2L boost converters at generator-side and 3L-VSI at grid-side.

As shown in Fig. 2.21, a passive generator-side converters can also be used to decrease

the cost of the turbine and to operate during the whole wind speed range [125]. The torque

ripples can be minimized while performing LV-MV operation. This configuration is more

promising compared to the active generator-side converters because during low wind speed

operation, the boost converters can operate with a higher duty cycle. As discussed in [125],

the capacitor voltages are controlled by the boost converter and this leads to higher com-

plexity for the NPC converter.

To overcome the problem of dc-link capacitor voltages balancing while performing LV-

MV conversion, a new converter configuration is proposed as shown in Fig. 2.22. Instead of

a series connection of 2L-boost converters, the outputs of the diode-rectifiers are connected

in a series. The output voltage of the series-connected diode bridge rectifiers form the MV

input dc-link [126]. The 3L-boost converter performs the MPPT with additional freedom to

control the dc-link capacitor voltages with minimal switching and reverse recovery losses.

Similar to the VSC converters discussed, the LV to MV conversion can also be achieved

by CSC converters as shown in Fig. 2.23. The CSI configuration is much simpler and there

are no issues related to the balancing, unlike those in the NPC converters presented in Fig.

2.21. This configuration has already been introduced in the MV drives industry [127], and

it is very promising for high power wind turbines.

PMSG

WRSG

(LV)

(MV)

Series Diodes 3L-VSI

6-Phase Machine

3L-Boost

3 0 ◦

P ro p o se d T o p o lo g y

Figure 2.22: Series connected diode rectifiers, 3L-boost converter and 3L-VSI at grid-side.

PMSG

WRSG

(LV)

(MV)

CSI

6-Phase Machine

Series 2L-Buck

3 0 ◦

P ro p o se d T o p o lo g y

Figure 2.23: Series connected 2L-buck converters at generator-side and CSI at grid-side.

PMSG

WRSG

SCIG

(LV)

2L-VSR 2L-VSIDC-link Filter

Open Winding

Open Winding Machine

Transformer

Figure 2.24: Open winding machine based WECS with multiple 2L VSC modules.

PMSG

WRSG

SCIG

(LV)

(MV)

Phase-a Phase-b Phase-c

T o M a ch in e P h a se -b

T er m in a ls

T o M a ch in e P h a se -c

T er m in a ls

Open Winding Machine

Optional

Figure 2.25: Open winding machine based WECS with cascaded converters.

2.4 Converters for Open Winding Machine Based WECS

Wind generators with open-winding structure are also used in the present wind turbines.

The generator is equipped with more than one set of windings and offers new possibilities

to connect the converters in different configurations [8,128,129]. One of the practical wind

turbines, which use six sets of three-phase windings, is shown in Fig. 2.24. In comparison

to the parallel VSC modules discussed earlier, the circulating currents in the generator-side

converters can be eliminated. With zero circulating current, the power rating of the overall

system increases, in proportion to the number of channels employed. The megawatt wind

turbines can be realized using low power, mass produced VSC converters. The distributed

windings also provide insulation between the converters. These generators are specially

designed at a higher cost.

A higher power MV wind turbine using cascaded converters is shown in Fig. 2.25. The

converters are connected in a cascaded connection to increase the system voltage and power

rating. This configuration requires a generator with multiple sets of two-phase windings

with a phase displacement of 90◦. Each module can be realized using the power converters

introduced in Figs. 2.26 [128,129] to 2.27 [8]. The transformerless grid connection is possible

with this configurations as system voltages of 10-35 kV can be reached by connecting more

modules in the series. The modularity and redundancy are other added advantages of this

configuration.

M o d u le

In p u t

M o d u le

In p u t

3L-HBR 3L-HBI 5L-HBR 5L-HBI

M o d u le

O u tp u t

M o d u le

O u tp u t

(a) (b)

Figure 2.26: BTB connected 3L- and 5L-HB converters based module.

A three-level H-bridge converter is shown in Fig. 2.26(a). It is a simple structure and

its output contains three levels. This converter can be realized by mass produced two-level

VSCs. To achieve the higher system voltage operation with a lower number of modules, NPC

H-bridge modules can be used to form a 5L-HB converter as shown in Fig. 2.26(b). In this

case, the generator windings should also be designed for medium voltage operation. The cost

associated with the generator-side active converters can be decreased by using single-phase

diode-rectifier and boost converter similar to the topology presented in Fig. 2.10 [128].

Another possibility is to use medium frequency transformers (MFTs) in the BTB H-

bridge modules (Fig. 2.27). The transformer operates at several kHz to decrease its size

[8]. Due to the increase in the number of components, the reliability is lower with this

configuration.

As shown in Fig. 2.28, the module can also be realized using a single-phase diode bridge

rectifier, 3L-boost converter and 5L-HB converter to decrease the cost of the overall system.

Since several modules are used in cascaded connection, the overall cost of the converter be-

comes lower compared to the BTB converters shown in Fig. 2.26. Moreover, the dc-link

capacitor voltages are well regulated by the 3L-boost converter in each module, and thus the

control system complexity for 5L-HB becomes simplified.

M o d u le

In p u t

3L-HBR

MFT

3L-HBI M o d u le

O u tp u t

Figure 2.27: Back-to-back connected 3L H-bridge converters and MFT based module.

M o d u le

In p u t

3L-Boost Converter

M o d u le

O u tp u t

5L-HBI

P ro p o se d T o p o lo g y

Figure 2.28: Diode rectifier, 3L-boost and 5L-HB converter based module.

2.5 Conclusion

In this chapter, an overview on WECS is presented with the main focus on full-scale power

converters employed with a squirrel cage, permanent magnet and wound rotor synchronous

generators. With the combination of different types of generators and power converters, a

variety of WECS configurations have been investigated. The most common configurations

for practical and emerging wind turbines are discussed. Various technical issues related to

these configurations were discussed, including generator types, power converter topologies,

active power control, energy conversion efficiency, and grid-side reactive power compensation.

The back-to-back connected converters, passive generator-side converters, and converters for

six-phase and open winding generators are presented, and their features and drawbacks are

analyzed. In each category, new converter configurations are proposed based on the existing

literature and commercial technologies.

Chapter 3

Review of Control Techniques in

Power Converters

In efficient energy conversion, three main research areas play a crucial role: (1) semi-

conductor devices, (2) arrangement of these devices (called power converter configuration),

and proper turn on/off of these devices (called the control scheme). In Chapter 2, the

semiconductor devices and power converter configurations have been analyzed. The power

converters’ control is a very active research topic and is constantly evolving according to the

technological developments in semiconductor devices and control platforms, control require-

ments, power quality standards, and grid code requirements, etc. [3,4,8,9,16,24,26,28,61,

92, 106, 112, 130–148]. An overview of classical and advanced digital control techniques is

presented in Chapter 1.

In this chapter, the state-of-the-art converter control techniques, such as hysteresis con-

trol, linear control, sliding mode control, fuzzy logic control, artificial neural network (ANN)

based control, deadbeat predictive control and finite control-set model predictive control

(FCS-MPC) are discussed. The operating principle of these techniques is analyzed with an

intuitive example of load current control. Various classes of the predictive control techniques

are discussed along with their merits and demerits. The operating principle and design

procedure of FCS-MPC strategy is discussed with an example of first-order system. The

cost function flexibility to incorporate several primary and secondary control objectives is

discussed. The delay compensation and extrapolation methods are discussed along with

their advantages and disadvantages. The FCS-MPC method is compared with the classical

control approach, and important observations are tabulated.

3.1 The Past, Present and Future of Control Platforms

In a search to obtain the ideal characteristics of a switch, many semiconductor devices

have been developed [84,149–151]. The diode rectifiers which belong to the first generation

of semiconductor devices use natural commutation and do not need any control platform. In

the second generation semiconductor devices, the gating terminals have been incorporated

to turn on/off the switches according to the desired performance. As a result, many power

switches have been developed and one of the earlier developments is the thyristor.

During the 1960s, analog control platforms based on operational amplifiers and passive

components were developed to control the firing angles of thyristors in order for the out-

put voltage to be controlled [77]. With thyristors, the turn-on instant can be controlled,

but the turn-off instant is uncontrollable and is dependent on the line frequency. In an

effort to achieve controllable turn-off, insulated-gate bipolar transistors (IGBTs) have been

developed [84]. A simple example of using IGBT to achieve controllable performance is a

buck converter whose output voltage can be regulated by adjusting the duty cycle [152].

For this converter, analog control circuits have been used in the past, where a single-phase

pulse width modulator or hysteresis controller generates the gating signals. Analog control

platforms present several drawbacks such as a large number of components, reduced system

reliability and poor computational capability to name a few [153].

To achieve a high performance operation, digital control techniques were developed dur-

ing the 1970s which involve powerful calculations, complex strategies and math-intensive

algorithms [77,153]. Introduction of digital signal processors (DSPs) by Texas Instruments

in 1983 has brought the base to implement the digital control techniques. One example of

the earlier DSPs is TMS320C14 which features a 16-bit processor and operational power of

10 million instructions per second (MIPS) [153]. To date, the technological advancements

in semiconductor devices have resulted in many switching devices such as the power metal-

oxide semiconductor field effect transistor (MOSFET), emitter turn-off thyristor (ETO),

MOS-controlled thyristor (MCT), static induction thyristor (SIT), silicon-controlled recti-

fier (SCR), gate turn-off thyristor (GTO), insulated-gate bipolar transistor (IGBT), reverse

blocking (RB) IGBT, injection-enhanced gate transistor (IEGT), gate commutated thyris-

tor (GCT), insulated gate commutated thyristor (IGCT) and symmetrical gate commutated

thyristor (SGCT). The digital control platforms also evolved rapidly and revolutionized the

industrial control area by allowing the user to develop sophisticated control algorithms. A

few examples of modern real-time (RT) digital control platforms include: microcontrollers,

DSP, field programmable gate array (FPGA), rapid prototyping systems. These platforms

have been used widely in the control of various power electronic converters [153–159] and they

feature low cost, more reliability and high computational power. For example, rapid proto-

typing controller dSPACE DS1103 performs 2500 MIPS which is very powerful compared to

the earlier versions of DSP (TMS320C14).

It is anticipated that in the future more powerful digital control platforms will be devel-

oped leading to much lower costs and higher computational capacity. The user will not have

to worry about the computational power needed to develop more advanced control schemes,

and can incorporate many constraints to improve the system response.

In industry, fixed-point processors are used mainly due to cost considerations and compu-

tational power, but in academia, floating-point processors and rapid prototyping platforms

are used to achieve flexibility in programming and RT implementation. In this dissertation,

a DS1103 rapid prototyping platform is used to perform all the experimental tests. Since

this platform uses the same microprocessor of industrial products, the software programming

can be transferred to the industry “as is” or with slight modification [77,153].

3.2 Overview of Digital Control Techniques

The development of control techniques for the power electronic converters is an ongoing

research topic. A summary of the most established control techniques, and also those which

are promising for future development are shown in Fig. 1.10. The hysteresis and linear

controllers are widely accepted by the power electronics industry. The advanced control

techniques include sliding-mode, intelligent and predictive control techniques. The block

diagrams of these control techniques are shown in Figs. 3.1 to 3.8 to show their main

principle, but many other classes or variations are available in each category. A two-level

converter which is connected to the load/motor/grid is used as an example for the discussion

of control techniques. The harmonic filter on the load/motor/grid side is not shown to

simplify the diagrams 3.1 to 3.8. The control of variables is shown in natural frame (abc)

to better compare the different controllers, but as demonstrated in the literature, it is also

possible to control the variables in stationary (αβ) or synchronous (dq) reference frames.

3−φ L/M/G

i∗a(k)

ia(k) i∗b(k)

ib(k) i∗c(k)

ic(k)

Inverter Sa

Hysteresis

Controller

−

Figure 3.1: Hysteresis current control scheme for 3−φ load/motor/grid (L/M/G).

Carrier

Signal

Pulse Width/

Space Vector

Modulation

(PWM/SVM)

3−φ L/M/G

i∗(k)

i(k)

Inverter Sa

v∗(k)

vcr(k)

PI+−

Figure 3.2: Linear current control scheme using PI regulators and SVM.

Carrier

Signal

Pulse Width/

Space Vector

Modulation

(PWM/SVM)

3−φ L/M/G

i∗(k)

i(k)

Inverter Sa

v∗(k)

vcr(k)

Sliding Mode Controller

+−

Figure 3.3: Sliding mode current control scheme using SVM.

Carrier

Signal

Pulse Width/

Space Vector

Modulation

(PWM/SVM)

3−φ L/M/G

i∗(k)

i(k)

Inverter Sa

v∗(k)

vcr(k)

Fuzzy Controller

+− d dt

Figure 3.4: Fuzzy logic current control scheme using SVM.

3−φ L/M/G

i∗(k)

i(k)

Inverter Sa

ANN

K+−

Figure 3.5: ANN based current control scheme.

3−φ L/M/G

i∗(k)

i(k)

Inverter Sa

ANN based Modulator

Fuzzy Controller

+− d dt

Figure 3.6: Fuzzy logic current control scheme using ANN modulation.

Carrier

Signal

Pulse Width/

Space Vector

Modulation

(PWM/SVM)

3−φ L/M/G

i∗(k)

i(k)

Inverter Sa

v∗(k)

vcr(k)

Deadbeat Predictive Controller

Figure 3.7: Deadbeat predictive current control with SVM.

Extrapolation

Predictive

Model

Cost

Function

Minimization

3−φ L/M/G

i∗(k)

i(k)

Inverter Sa

i∗(k + 1)

ip(k + 1)

Figure 3.8: Finite control-set model predictive control (FCS-MPC) scheme.

3.2.1 Hysteresis Control Technique

A hysteresis current control scheme is shown in Fig. 3.1. This controller is recognized as a

nonlinear method [149,150,160–164]. The measured currents are compared to the reference

currents with the help of hysteresis (bang–bang) controllers, and the gating signals are

generated based on the reference tracking. The error in reference tracking can be reduced by

reducing the hysteresis band width. This is a simple concept and has been used since the era

of analog control platforms. It is important to note that no modulator is required with this

method and thus the converter’s switching frequency varies according to the filter parameters,

operating conditions and hysteresis band width [77]. The uncontrollable switching frequency

is one of the major drawbacks of this controller and many works have been presented in an

effort to improve this controller.

More advanced versions of this method include direct torque control (DTC) [84,149,150,

165] and direct power control (DPC) [70,71,156]. In the DTC method, the torque and flux

of the drive system are controlled, while in DPC the grid active and reactive power are

controlled directly. The hysteresis controllers produce error signals and a look-up generates

the switching signals to the converter based on the relative magnitudes of the error signals

(torque and flux in DTC; active and reactive powers in DPC). In order to implement these

methods on digital platforms, a very high-sampling frequency is needed to force the variables

within the hysteresis band limits. In addition, the switching losses are higher with this

method, and thus it is not suitable for high power applications [77].

3.2.2 Linear Control Technique

In an attempt to solve the major drawbacks of the hysteresis controller, linear control

techniques have been proposed which linearize the nonlinear converter. To achieve this,

cascaded linear regulators, usually proportional-integral (PI) controllers and a modulation

stage have been developed. The most commonly used modulation schemes are pulse width

modulation (PWM), space vector modulation (SVM) and selective harmonic elimination

(SHE) [97–105,108,166–195]. A linear current control technique using SVM is shown in Fig.

3.2. The load currents are compared to their references, and the error signal is processed

by the PI regulators, and the reference load voltage is generated accordingly. With PWM

modulation, the reference signal v∗(k) is compared with the triangular signal to generate the

gating signals for the converter [97,166–176]. The SVM is recognized as an efficient method

as it offers better harmonic performance and enhanced dc-bus voltage utilization compared

to the PWM [84,149]. With the SVM, the closest vectors to the reference voltage vector are

selected based on dwell time calculation and switching scheme design [98–105,108,177–190].

The SVM involves several design steps and complex modeling, which leads to a higher

computational burden compared to the PWM. The SHE is mainly based on switching angles

calculation such that specific lower order harmonics in the output current can be eliminated

[191–195].

The linear control scheme using PWM/SVM/SHE operates with fixed-switching fre-

quency, and this value is dictated by the carrier frequency. The error value is minimal

in dq frame compared to the αβ and abc frames. The PI parameters are designed for one

operating condition (usually rated condition), and if the converter operates at different op-

erating conditions, then the control performance deteriorates, and stability-related problems

arise [76,196]. Since the linear controller is applied to the power converter which is nonlinear

in nature, the performance obtained is unsymmetrical and it varies according to the oper-

ating condition [77]. The assumption of the linear model gives favorable performance only

if a high band-width modulation is used. This scenario leads to a high switching frequency

operation which consequently increases the switching losses. Moreover, when the converter

operates at lower switching frequency, the magnitude of the lower order harmonics increases

significantly and causes poor power quality [74]. Many research works have been carried out

to solve this issue, and research is ongoing.

The linear control techniques have been used widely used in the drives industry and

energy systems. To control the motor torque and flux in a decoupled manner, field oriented

control (FOC) is used. This involves reference frame transformations, several PI controllers,

low pass filters and modulation stage. Similar to the FOC, voltage oriented control (VOC)

is used to control the grid-connected converter [2,14,72]. Using the VOC scheme, decoupled

control of the net dc-bus voltage and grid reactive power can be achieved. In VOC, the grid

voltage harmonics deteriorate the control performance [76].

With both the hysteresis and linear control techniques, the system constraints and techni-

cal requirements such as maximum current, load voltage spectrum shaping, switching losses

reduction and total harmonic distortion (THD) minimization, cannot be incorporated easily

in the design of control scheme.

3.2.3 Sliding Mode Control Technique

The sliding mode control is an advanced power converter control technique and belongs

to the family of variable structure control and adaptive control [197–201]. This control

technique is nonlinear in nature and it can be applied to linear or nonlinear systems [197].

A sliding mode control method along with the PWM/SVM is shown in Fig. 3.2.3. The

load voltage references are generated through the sliding controller. As the name implies,

the control variable (load current) is forced to track or slide along the predefined trajectory

[202–204]. With this method, the structure of the controller is intentionally changed to

achieve robust and stable response even during the system parameter variations and load

disturbances [151]. This control method gives robust response compared to the classical

controllers discussed earlier.

3.2.4 Intelligent Control Techniques

The expert systems, fuzzy logic, artificial neutral network (ANN), and genetic algorithms

belong to the family of intelligent control techniques [151,205–207]. As demonstrated in Fig.

3.4, in this control approach, the PI controller is replaced by the fuzzy logic controller.

The load current reference tracking error and its derivative are used as the input to the

fuzzy controller. This controller embeds the experience, knowledge and intuition of the

converter operator/designer in the form of membership functions. Since the power converters

are nonlinear in nature, the robustness of the system during parameter variations can be

improved by using the fuzzy controller without knowing the exact converter model. It is also

a class of nonlinear control techniques, and positively the best among the adaptive controllers

[151,205–207].

The ANN represents the most generic form of the human thinking process compared to

the other intelligent controllers [151]. The ANN based load current regulation is shown in Fig.

3.5 [149,208]. The tracking error signals are given as inputs to the ANN through a suitable

gain or scaling factor (K), and the ANN controller produces switching signals to the power

converter. A constant switching frequency operation can be achieved with this approach.

The advantages of fuzzy and ANN can be combined as shown in Fig. 3.6 to achieve better

control performance [151, 205, 206]. Even though the intelligent controllers do not need a

converter model, they require precise knowledge about the converter operation/behavior.

3.2.5 Predictive Control Techniques

The predictive control (PC) uses the system model to predict the future responses of

a plant. These predictions are then used to generate the optimal control action [209–216].

This control philosophy emerged during the 1970s for the process control which are normally

very slow in nature [217]. With this approach, a systematic solution was provided to the

multivariable constrained control problems of the oil and chemical industries, and due to

its simplicity it was immediately welcomed by the industry [218–220]. The application of

predictive control in power electronics is a rather recent topic due to the fast processing time

required to control the electric variables [77]. With the evolution in DSPs, a wide range

of predictive controllers have been developed which includes deadbeat PC, hysteresis-based

PC, trajectory-based PC, and model-based PC (MPC) [78].

A deadbeat predictive control technique is shown in Fig. 3.7, where the PI regulators are

replaced by the predictive controller to make the tracking error close to zero [221–241]. This is

achievable by generating an appropriate reference load voltage during each sampling instant.

A PWM/SVM modulator is then used to generate the gating signals to the power converter.

This control strategy gives a better transient response compared to the classical controllers,

but the system parameter variations and perturbations deteriorates the control performance.

The system nonlinearities and constraints cannot be included in a straightforward way in the

design of this controller [78]. The hysteresis and trajectory-based PC techniques combine

hysteresis and sliding-mode controllers with the predictive controllers, and operate at variable

switching frequency [75,77,78]. The MPC with continuous control-set [76] is similar to the

deadbeat predictive control in terms of design and implementation [78].

The FCS-MPC is a simple and powerful control strategy that has been recently applied to

power converters. A FCS-MPC strategy for the load current regulation is shown in Fig. 3.8.

Compared to the classical control techniques, this scheme eliminates the need for linear PI

regulators and the modulation stage, and offers a conceptually different approach to control

the power converters. This is truly a model-based optimization control strategy, and involves

a large number of calculations [75,77,78,242–244]. However, the computational issue is not

prominent due to the advanced digital control platforms (DSPs and FPGAs) available in the

market. It is anticipated that this will be one of the next generation control tools, and thus

is considered in this dissertation as a subject to control the megawatt WECS.

3.3 Finite Control-Set Model Predictive Control

To design an efficient controller, one needs to know about the true nature/behavior of

the plant to be controlled. A power electronic converter exhibits the following properties,

constraints and requirements [75,77]:

• Nonlinear nature especially during low switching frequency

• Contains finite number of switching states, for example 8 switching states are available for 2L-VSC.

• Imposes restrictions on the maximum current, switching frequency, efficiency and THD, etc., to achieve safe and reliable operation

• Demands faster response for the electric control variables

• Favors discrete-time implementation using the industry standard digital control plat- forms

The FCS-MPC strategy has proved one of the best methods for treating all the above

properties and conditions. Recent scholarly works demonstrated that FCS-MPC can easily

be applied to a wide range of power converters, drives, power quality applications and energy

systems [79]. The main features and challenges of the FCS-MPC are summarized as follows:

Main Features of FCS-MPC:

• Uses simple concepts and is easy to understand • An intuitive approach for real-time implementation • Uses the inherent discrete nature of the power converters • Treats the power converter as a discontinuous and nonlinear model which is the closest approximation to the real-time scenario

• Optimizations are greatly simplified due to finite number of switching states • Can be applied to a wide variety of systems • Can handle multivariable control programs in a decoupled manner • System perturbations and dead times can be compensated

• System nonlinearities and limitations can be incorporated in a straight forward manner in the model

• Constraint handling is naturally accommodated by the method

• Many technical and control requirements can be fulfilled at the same time

• This methodology is open to include modifications and extensions depending on specific applications

Challenges of FCS-MPC:

• Requires a large number of calculations

• Operates with the variable switching frequency

• Selection of weighting factors is not analytical or numerical

• Control performance will be poor if the model of the system and prediction horizon is not formulated correctly

The first challenge can be surpassed with the commercially available fast processors

such as DSPs and FPGAs. The other control challenges are investigated rigorously in this

dissertation research, and many solutions have been developed to promote the FCS-MPC

strategy as the next generation high performance control tool.

3.3.1 Operating Principle and Design Procedure

Fig. 3.8 is considered here again to explain the operating principle and design procedure

of the FCS-MPC scheme. Note that the explanation given here for the FCS-MPC is described

in a broad sense, and not specific for the current control. It uses the system model to predict

the future behavior of the variables to be controlled. The controller uses this information to

obtain the optimal actuation, according to a predefined optimization criterion. A step-by-

step procedure for the implementation is given below, which is intuitive to understand and

easier to implement:

Design Step–1: Measurements

Obtain the feedback signals as per the requirement of predictive model or references

generation.

Design Step–2: References Generation

Generate the reference control variable x∗(k) according to the specific application.

Design Step–3: Extrapolation of References

Extrapolate the reference control variable to (k + 1) instant. Different extrapolation

methods will be discussed in the next section.

Design Step–4: Development of Continuous-Time Models

In this example, it is assumed that the power converter continuous-time model is of

first-order nature: dx

dt = Ax + B u (3.1)

where A and B denotes the parameters of the converter (filter inductance, load resis-

tance, dc-link capacitance, etc.), x represents the variable to be controlled (voltage,

current, power, torque, flux, etc.), and u is input variable (dc-voltage, grid voltage,

etc.).

Design Step–5: Development of Discrete-Time Models

The FCS-MPC is basically an optimization algorithm. To implement this strategy on

digital control platforms, the continuous-time models should be converted to discrete-

time. In the control theory, many discretization methods are available such as: forward

difference, backward difference, bilinear transformations (combination of forward and

backward difference), impulse-invariant and zero-order hold [245]. Due to the first

order nature of the state equations that describe the model in (3.1), a first-order ap-

proximation for the derivative can be obtained by forward or backward Euler method.

The forward Euler method considers the future sample (k + 1) and present sample (k)

as described bellow:

Forward Euler Method: dx

dt = x(k + 1) − x(k)

Ts (3.2)

where Ts is the discretization sampling time.

By substituting (3.2) into (3.1), the discrete-time model for the control variable can

be obtained as: x(k + 1) − x(k)

Ts = Ax(k) + B u(k)

x(k + 1) = (1 + ATs) x(k) + BTs u(k).

(3.3)

The backward Euler method provides approximation for the derivative by considering

present (k) and past (k − 1) samples:

Backward Euler Method: dx

dt = x(k) − x(k − 1)

Ts . (3.4)

Using the derivative approximation given in (3.4), the continuous-time system in (3.1)

can be converted to discrete-time as:

x(k) − x(k − 1) Ts

= Ax(k) + B u(k)

x(k) = 1

(1 − ATs) x(k − 1) + BTs

(1 − ATs) u(k).

(3.5)

By shifting the above variables into one future sample,

x(k + 1) = 1

(1 − ATs) x(k) +

BTs (1 − ATs)

u(k + 1) (3.6)

where u(k+1) is the extrapolated input. More details about the extrapolation methods

will be given in Section 3.3.4.

The forward Euler method presents a simple approach for the discrete-time conversion,

but stable poles in the s plane of continuous-time system may be mapped to unstable

poles in z plane of discrete-time system. In other words, the positive real continu-

ous system may be converted to non-positive real discrete-time system. However, the

backward Euler method can convert stable poles in s plane to stable poles in z plane,

and marginally stable poles to asymptotically stable poles. The non-positive real con-

tinuous system can also be transformed to a positive real discrete system with the

backward Euler method [245,246]. For this reason, in this dissertation, the backward

Euler method is considered to convert the continuous-time systems to discrete-time.

Design Step–6: Prediction of Variables

Using the discrete-time models, present sampling instant (k) measurements and past

sample optimal variable xpop(k), predict the future behavior of the control variables. The

operating principle for the prediction of variables using a one-step prediction horizon

is shown in Fig. 3.9, assuming that the converter possesses 5 switching states. The 5

possible switching states lead to 5 predictions for the variable to be controlled (refer to

equation [3.6)]. Compared to the classical control techniques which observe past and

present values of the variable, the FCS-MPC strategy observes the past, present and

future of the variable.

Design Step–7: Cost Function Minimization

As a final stage, the predicted variables x p 1(k + 1), x

p 2(k + 1), x

p 3(k + 1), x

p 4(k + 1) and

x p 5(k+1) are compared with their reference x

∗(k+1) using a cost function gk as follows:

gk = ||x∗(k + 1) − xp(k + 1)||. (3.7)

The goal of cost function optimization is to achieve g value close to zero. The switching

state which minimizes the cost function is chosen and then applied at the next sampling

instant. As shown in the next section, additional constraints can also be incorporated

into the cost function. During each sampling instant, the minimum value of g is selected

from the 5 function values. At the (kth) instant, the algorithm selects a switching state

which would minimize the cost function at the (k + 1) instant, and then applies this

optimal switching state during the whole (k + 1) period.

As a final note, the FCS-MPC method uses only the model of system. Unlike in

classical control schemes, this method does not require any internal current control

loops or a modulation stage.

tk−1 tk tk+1 tk+2 t

x∗

x p o p (k

− 1 )

Past Sample Ts

1st-Step Ts

2nd-Step Ts

S1S1 S2S2 S3S3 S4S4

S5 S5

xpop(k) x p 1(k + 1)

x p 2(k + 1)

x p 3(k + 1)

x p 4(k + 1)

x p 5(k + 1)

Figure 3.9: FCS-MPC strategy with one-step prediction horizon.

3.3.2 Cost Function Flexibility

One of the best features of FCS-MPC strategy is that several control objectives can

be fulfilled at the same time as long as they are a mathematical function of the converter

switching states. As demonstrated in Fig. 3.10, with an appropriate definition of cost

function, a better control flexibility can be obtained with the optimization of several control

goals. The control objectives for the power converter can be broadly classified as primary and

secondary goals. The primary objectives include, but are not limited to, load current/voltage

control, grid active/reactive power control, and machine torque/flux control. The fulfilment

Primary Objectives

Weighting Factors

Secondary Objectives

|P∗ − Pp| |Q∗ − Qp| |T∗e − Tpe | |ψ∗s − ψps|

λdc

λswc

λcmv

λss

λswl

λvdc

λlim

λr

Capacitor Voltages Balancing

λdc ∗ |vpc1 − vpc2| vpc = f(Sk+1)

Switching Frequency Reduction λswc ∗ nswc

nswc = f(Sk+1)

Common-Mode Voltage

Minimization λcmv ∗ cmv

cmv = f(Sk+1)

Spectrum Shaping

λss ∗ |F(i∗ − ip)| λss ∗ |DFT(i∗ − ip)|

ip = f(Sk+1)

Switching Losses

Reduction λswl ∗ Eswl

Eswl = f(Sk+1)

Net dc-bus Voltage Control

λvdc ∗ |v∗dc − vpdc| v p dc = f(Sk+1)

Peak Current

Limitation λlim ∗ |ip| < imax ip = f(Sk+1)

Filter Resonance Mitigation λr ∗ |W1ip| ip = f(Sk+1)

Figure 3.10: Overview of cost function definition with primary and secondary objectives.

of the primary objectives is essential to ensure the proper operation of a system involving

the power converter. The cost function is shown as an absolute minimization function, but

quadratic function can also be used to achieve over-proportionate control action against the

reference tracking [75].

To improve the performance of the converter or to meet particular control/technical

requirements, many secondary objectives such as the dc-link capacitor voltages balancing,

switching frequency reduction in one or all phases, common-mode voltage minimization, load

waveform spectrum shaping, switching losses reduction of any particular switch or whole

converter, net dc-bus voltage control in the grid-connected case, peak current limitation in

motor drives, and LC/LCL filter resonance mitigation can be easily included in the cost

function as demonstrated in Fig. 3.10 [75,77–79]. The relative importance of one objective

over the other can be set through the weighting factors. Since the control variables possess a

different physical nature (current, voltage, power, torque, flux, frequency, losses, etc.), they

lead to coupling effects, and thus the selection of suitable weighting factors becomes tedious.

The analytical or numerical procedure for the weighting factor selection is still an open topic

for research. In [247], some guidelines are presented for the selection of the weighting factor.

In this dissertation, a detailed empirical procedure for the selection of weighting factors is

presented to help the reader develop a similar strategy in his/her works.

3.3.3 Delay Compensation Methods

The cost function presented earlier in Fig. 3.9 considers the minimization at (k + 1)

sampling instant which is suitable for computer simulations. The FCS-MPC strategy uses

optimization algorithm and thus incurs a large number of online calculations. The computer

simulations represent an ideal case where the time taken to compute these online calculations

is zero [77]. According to this approach, the switching state which minimizes the error at the

(k + 1) instant is selected and applied at the (kth) instant. This method is most commonly

referred to as a one-step or one sample-ahead (h = 1) predictive controller.

In the real-time implementation of FCS-MPC algorithm, the large number of online

calculations introduce a considerable time delay in the actuation [77, 248–252]. The delay

caused by the digital signal processor is most significant and it must be compensated for. The

delays associated with the response of the gate drive circuitry, sensors and switching of the

devices can be disregarded due to their small magnitude, even for high sampling rates. The

tk−1 tk tk+1 tk+2 t

x∗

x p o p (k

− 1 )

Past Sample Ts

1st-Step Ts

2nd-Step Ts

S1 S1

S2 S2

S5S5

xpop(k) x̂(k + 1)

x p 1(k + 2)

x p 2(k + 2)

x p 3(k + 2)

x p 4(k + 2)

x p 5(k + 2)

Figure 3.11: Delay compensation method–1 using modified one-step prediction horizon.

tk−1 tk tk+1 tk+2 t

x∗

x p o p (k

− 1 )

Past Sample Ts

1st-Step Ts

2nd-Step Ts

S1S1 S2S2 S3S3 S4S4

S5 S5

xpop(k) x p 1(k + 2)

...

x p 25(k + 2)

S1,1

...

S5,4

S5,5

Figure 3.12: Delay compensation method–2 using standard two-step prediction horizon.

tk−1 tk tk+1 tk+2 t

x∗

x p o p (k

− 1 )

Past Sample Ts

1st-Step Ts

2nd-Step Ts

S1S1 S2S2 S3S3 S4S4

S5S5

xpop(k) x p 1(k + 2) x p 2(k + 2)

x p 3(k + 2)

x p 4(k + 2)

x p 5(k + 2)

Figure 3.13: Delay compensation method–3 using simplified two-step prediction horizon.

computational delay deteriorates the performance of the system if it is not considered in the

design of the controller. This delay can be compensated by calculating the cost function for

two-samples ahead (k + 2). This approach allows one sampling period (Ts) for the control

delay and another sampling period for the optimization algorithm. The selected optimal

switching state can be applied at (k + 1) sampling instant. To achieve this, three different

methods can be used as shown in Figs. 3.11, 3.12, and 3.13.

Delay Compensation Method–1: A modified one-step prediction as shown in Fig. 3.11

has been proposed in [248–252] to compensate the delay. According to this approach,

the optimal switching state from the previous iteration [xpop(k)] is used to estimate the

variables at (k + 1) instant [x̂(k + 1)], and all the possible switching states are used

to predict the variables at (k + 2) instant. The estimation of x̂(k + 1) leads to higher

number of calculations and thus increases the switching frequency of power converter.

Delay Compensation Method–2: A standard two-step predictive horizon-based FCS-

MPC strategy has been proposed in the literature [253–256] to achieve high control

performance. As given in Fig. 3.12, this approach can also be used to compensate the

delay, but with a higher computational burden. For example, if the converter has 5

switching states, then the number of (k + 2) predictions would become 25 (52). This

approach is suitable for converters having a lower number of switching states, but is

impractical for multilevel converters which have a large number of switching states.

For an NPC converter, 729 (272) different combinations exist and the current DSPs

cannot handle these large numbers of calculations.

Delay Compensation Method–3: A modification to the standard two-step prediction

horizon is proposed in this dissertation. As shown in Fig. 3.13, the proposed approach

minimizes the number of calculations while preserving the two-step prediction hori-

zon. The predictions are projected to (k + 2) sampling instant, meaning that the same

switching states are used in both (k + 1) and (k + 2) predictions. As shall be demon-

strated in the next chapters, this approach gives a better performance than Method

1, and a performance almost similar to that of Method 2. The switching frequency

obtained with the proposed approach is less than the one obtained with Methods 1

and 2. Even though the number of calculations is higher compared to Method 1, the

switching frequency is lower because the calculations are performed over two samples.

The computational requirement is only a few μs higher than Method 1, and thus this

approach can be implemented using the DSPs available in the market.

In the research being carried out over the past 5 years, both Methods 1 and 3 have

been used in the experimental validation of FCS-MPC algorithms. The works presented in

Chapters 5, 6 and 7 use Method 1, while the Chapters 4, 8 and 9 use Method 3.

3.3.4 Extrapolation Methods

One of the important requirements in the FCS-MPC strategy is reference tracking. The

switching state which minimizes the reference tracking error in (k + 1) or (k + 2) sampling

instant is selected and applied to the power electronic converter directly. When the sampling

time Ts is sufficiently small (< 20 μs), no extrapolation is required. This implies that the

sampling frequency is much higher than the fundamental frequency of the variables which

need to be controlled. When the FCS-MPC strategy works with higher sampling times (lower

sampling frequencies), the references should be extrapolated to (k + 1) or (k + 2) sampling

instant to effectively minimize the tracking error. In the dq frame, the variables are dc in

nature and thus no extrapolation is required during steady-state operation. However, during

transient operation, a delay occurs between the reference and variable to be controlled, and

to overcome this issue an extrapolation method should be used.

In the state-of-the-art FCS-MPC strategy, Lagrange and vector angle methods are used

for the extrapolation of variables [77,221,257–261]. A third-order Lagrange method for one

sample ahead (k + 1) extrapolation is given as follows [77, 221]. This method uses present

and two past sample values of the variable that needs to be extrapolated. The variable x

represents either voltage, current or power. The estimated quantity is noted as x̂.

x̂(k + 1) = 3 x(k) − 3 x(k − 1) + x(k − 2). (3.8)

For two-sample ahead (k+2) extrapolation, the following Lagrange method can be used:

x̂(k + 2) = 3 x̂(k + 1) − 3 x(k) + x(k − 1). (3.9)

By substituting (3.8) in (3.9), the future value can be estimated using present and past

sample values as demonstrated below:

x̂(k + 2) = 6 x(k) − 8 x(k − 1) + 3 x(k − 2). (3.10)

To increase the performance of FCS-MPC strategy, a higher-order extrapolation method

can be employed [257–260]. A fourth-order Lagrange method for (k + 1) and (k + 2) extrap-

olation is given as follows [258,259]:

x̂(k + 1) = 4 x(k) − 6 x(k − 1) + 4 x(k − 2) − x(k − 3) (3.11)

x̂(k + 2) = 10 x(k) − 20 x(k − 1) + 15 x(k − 2) − 4 x(k − 3). (3.12)

For two-samples ahead (k+2) extrapolation, the coefficients employed in two- and higher-

order Lagrange methods are summarized in Table 3.1 [260].

Table 3.1: Coefficients for two-samples ahead (k + 2) Lagrange extrapolation method

Order ax ax−1 ax−2 ax−3 ax−4 ax−5 ax−6

2 3 2 0 0 0 0 0

3 6 −8 3 0 0 0 0

4 10 −20 15 −4 0 0 0

5 15 −40 45 −24 5 0 0

6 21 −70 105 −84 35 −6 0

7 28 −112 210 −224 140 −48 7

Another possible approach for the extrapolation is the vector angle method. In this ap-

proach, during each sampling interval, the change in vector angle of the three-phase variables

is considered as the basis for extrapolation. A nth order vector angle extrapolation is given

as follows [77]:

x̂(k + h) = x(k) ej h ω Ts (3.13)

where ω is the angular frequency of three-phase variables, and h is prediction horizon length.

The x(k) in (3.13) can be a complex variable with real and imaginary quantities. This

approach is best suited for the stationary frame (αβ) variables [261]. This method cannot

be used in single-phase systems [77].

3.4 Comparison of FCS-MPC with Linear Control

A comparison between the classical and FCS-MPC strategy is performed based on the

research results presented in the literature and summarized as shown in Table 3.2. The

analysis suggests that the FCS-MPC strategy is an intuitive and powerful tool to control the

power converters compared to the classical linear methods.

Table 3.2: Comparison between classical linear control and FCS-MPC

Description Classical FCS-MPC

Control diagram Fig. 3.2 Fig. 3.8

Model [262] Linear load model for PI & Discrete-time model

Inverter model for SVM of the complete system

Controller design [75] PI adjustment (root locus) + Cost function definition

Modulator design

Nature of controller [78] Linear Nonlinear

Implementation platform [75] Analog or digital Digital

Modulation PWM/SVM/SHE Not required

Switching frequency [75] Fixed Variable (but controllable)

Multivariable [77] Coupled Decoupled

Constraints inclusion Not possible easy to include

Complexity of concept [263] High with SVM Simple and intuitive

Steady-state performance [77] Good in dq frame Good in abc, αβ and dq frames

Transient performance [264,265] Moderate Excellent

Computational burden High with SVM High

Robustness of controller [77,266] Poor Excellent

Stability of controller [260,267] Moderate Excellent

3.5 Conclusion

In this chapter, the state-of-the-art converter control techniques are reviewed, followed by

the explanation of different classes of the predictive control techniques. The implementation

of different control techniques for the output current control is presented along with their

main features and challenges. The operating principle of the FCS-MPC strategy is presented

for ideal and implementation cases. The cost function flexibility and potentiality in achieving

different control and technical requirements is discussed. The issues and challenges related to

the FCS-MPC strategy, such as the computational burden, development of control algorithm,

delay compensation, and extrapolation of reference variables is discussed in detail. The

analysis presented in this chapter favors the FCS-MPC strategy as the next generation

control tool to achieve high performance operation for the power converters.

Chapter 4

Generalized Approach for Predictive

Control in High-Performance

Multilevel Diode-Clamped Converters

Multilevel converters are recognized as among the most suitable and efficient candidates

to be used in high-power, medium-voltage (MV) industrial applications [8, 61]. They can

synthesize near sinusoidal voltages while increasing the number of levels, leading to good

power quality and smaller output filters. In addition, higher levels of MV operation can

be achieved without connecting the switching devices in a series. The most popular and

well-known multilevel topologies are flying capacitor, cascade H-bridge and diode-clamped

converters (DCCs) [84,106]. By using clamping diodes to divide the dc-link voltage among

several capacitors, different configurations, ranging from three-level (3L) to m-level (ML)

DCCs can be obtained.

This chapter proposes a generalized approach based on a finite control-set model predic-

tive strategy for the current control, dc-link capacitor voltages balancing, switching frequency

reduction and common-mode voltage mitigation in MLDCCs. The discrete-time model of

an m-level DCC is presented, where all the control objectives are formulated in terms of the

switching states. The control goals are expressed as a cost function and its minimization is

used as a criterion to choose the best switching state which would be applied to the converter

during the next sampling interval. The real-time digital control issues such as computational

burden and delay compensation are also discussed. The feasibility of the proposed method

is verified by simulations in 3- to 6-level converters and by experiments in 3- and 4-level

converters.

4.1 Control Requirements and Challenges

The MLDCCs are suitable for many industrial applications such as: STATCOM, train

traction, ship propulsion, regenerative conveyors, wind and photovoltaic energy systems,

and general MV motor drive applications (pumps, fans, etc.) [84,106]. In these applications,

current control is one of the most important issues and it has been widely studied in literature

[104,105,160,268,269]. The most popular classical methods as introduced in Chapter 3 are:

hysteresis control [160] and linear control (PI) with the space vector modulation (SVM) or

pulse width modulation (PWM) [104,105,268,269].

The SVM method gives the best harmonic profile compared to the PWM approach,

but its computational burden and complexity increases with the number of levels in DCC.

Especially when the number of levels in DCC increase, the switching actions in the MLDCCs

leads to an imbalance among the dc-link capacitor voltages [270]. In order to solve this issue,

many methods have been proposed in the literature which can be classified as: use of external

hardware [96], SVM with the redundant switching states selection [171], and PWM with zero

sequence voltage injection [97]. All of these methods have widely been studied for 3L- to

6L-DCCs as reported in [104,105,268,269] where a generalized classical approach to control

the MLDCCs have been proposed.

Another important challenge for MLDCCs is the operation at low switching frequency

in order to minimize the switching losses and to allow proper heat dissipation [271]. This

requirement can be accomplished with the PWM and SVM techniques by simply changing

the carrier frequency. Unfortunately, low order harmonics are produced by the PWM and

SVM techniques when operated below 1 kHZ leading to poor output current quality [74].

One more critical issue with the MLDCCs is that the fast switching actions of the semi-

conductor devices cause high dv/dt in the converter output voltages and this leads to higher

common-mode voltage (CMV). The CMV is undesirable when the MLDCC is used in mo-

tor drive and grid-connected applications [272–274]. The hardware (common-mode choke)

[275,276] and/or software reconfigurations are considered as possible solutions for the CMV

mitigation in MLDCCs. The latter process, with the improvement to PWM/SVM tech-

niques, is a cost effective and attractive solution, and it is widely studied for MLDCCs

[272–274, 277, 278]. The complexity of the improved SVM increases with the number of

levels in DCC.

As mentioned in Chapter 3, the finite control-set model predictive control (FCS-MPC)

takes over the functions of linear regulators and SVM/PWM modulators. To accomplish the

aforementioned control requirements, many works based on FCS-MPC have already been

reported for 3L-DCC [279,280], 4L-DCC [80,81,107,281], and 5L-DCC [282,283].

The state-of-the-art research work being carried out for high performance control in the

MLDCCs is summarized in Fig. 4.1. The software reconfiguration (changes to computer

program) to achieve the control goals in MLDCCs is a recommended solution than the

hardware reconfiguration (use of external hardware). The software reconfiguration using

classical control methods has been widely studied in literature [104,105,268,269]. Similar to

the classical methods, the predictive control for the MLDCCs can be generalized, but this

issue has not been addressed yet.

In this chapter, a generalized approach for the predictive control of MLDCCs is pro-

posed. The discrete-time model of the converters and dc-link capacitor currents estimation

is presented such that they can be applied to m-level DCC. The load/motor/grid current

control, dc-link capacitor voltages balancing, lower switching frequency operation, and CMV

reduction are expressed as a cost function. With the help of weighting factors, these control

goals are met simultaneously.

High- Performance MLDCCs

Control Requirement

Possible Solutions

Recommended Solution

Existing Solution

Proposed Solution

Load/Grid Current

Regulation

Balancing of DC-link Cap.

Voltages

Switching Frequency Reduction

Common-Mode Voltage

Minimization

Software SoftwareSoftware Software Reconfiguration ReconfigurationReconfiguration Reconfiguration

HardwareHardware ReconfigurationReconfiguration

Generalized Approach

Classical PWM/SVM

Generalized FCS-MPC

Figure 4.1: Overview of state-of-the-art and proposed solutions for high performance control in MLDCCs.

4.2 Review of Multilevel DCCs

To facilitate the discussions leading to the generalized modeling and control in this sec-

tion, a brief review of MLDCCs is presented. The per-phase diagram of 3L to 6L converters

is shown in Fig. 4.2. For a given dc-link voltage rating, the voltage rating of active switches,

clamping diodes and dc capacitors decreases with the increase in the number of levels. The

clamping diodes are connected in a series to withstand the different reverse blocking voltages

[84]. The component count and switching states of the MLDCCs are summarized in Table

4.1. As the number of converter voltage levels increase, the switching states increase pro-

portionately and this leads to higher computational burden with the classical or predictive

control method. The space vectors generated by an m-level converter is shown in Fig. 4.3

and it can be observed that the outer-most voltage vector contains only one redundancy.

The switching states and corresponding converter terminal voltages are given in Table 4.2,

where Sx represents the voltage level of the converter.

Table 4.1: Components, switching states and voltage vectors count for MLDCC

Voltage Active Clamping DC-link Neutral Switching Voltage

Levels Switches Diodes Capacitors Points States Vectors

3 12 6 2 1 27 19

4 18 18 3 2 64 37

5 24 36 4 3 125 61

6 30 60 5 4 216 91 ...

... ...

m 6(m − 1) 6(m − 1) (m − 2) m − 1 m − 2 m3 m3− (m − 1)3

Table 4.2: MLDCC terminal voltages versus switching states (x = a,b,c)

Sx S(m−1)x S(m−2)x S(m−3)x S(m−4)x S(m−5)x · · · vxN 0 0 0 0 0 0 · · · 0 1 1 0 0 0 0 · · · vc1 2 1 1 0 0 0 · · · vc1 + vc2 3 1 1 1 0 0 · · · vc1 + vc2 + vc3 4 1 1 1 1 0 · · · vc1 + vc2 + vc3 + vc4 5 1 1 1 1 1 · · · vc1 + vc2 + vc3 + vc4 + vc5 ...

... ...

...

S1a

S2a

S1a

S2a

vc1

vc2

vdc ia

vaN

− −

−

(2)

(1)

(0)

(a) Three-level (m = 3) DCC

S1a

S2a

S3a

S1a

S2a

S3a

vc1

vc2

vc3

vdc ia

vaN

− −

−

(3)

(2)

(1)

(0)

(b) Four-level (m = 4) DCC

S1a

S2a

S3a

S4a

S1a

S2a

S3a

S4a vc1

vc2

vc3

vc4

vdc ia

vaN

− −

−

(4)

(3)

(2)

(1)

(0)

S1a

S2a

S3a

S4a

S5a

S1a

S2a

S3a

S4a

S5a vc1

vc2

vc3

vc4

vc5

vdc ia

vaN

− −

−

(5)

(4)

(3)

(2)

(1)

(0)

(d) Six-level (m = 6) DCC

Figure 4.2: Per-phase diagram of multi-level diode-clamped converters.

4.3 Generalized Model of Multilevel DCCs

The FCS-MPC approach works on a different conceptual approach to control the power

converters, and eliminates the need for linear regulators and SVM/PWM modulators. This

approach is basically an optimization algorithm whose actions mainly depend on the discrete-

time model of the converter, load/grid and dc-link. In this section, a generalized discrete-time

model of the MLDCC is formulated.

4.3.1 Model of Load/Motor/Grid Currents

One of the important requirements for the MLDCCs is regulation of converter output

current. Most of the applications, such as motor drives and grid-connected systems, can be

simply represented as a RLE load. A MLDCC with such a load is shown in Fig. 4.4, where,

Lf and Rf represents the load filter inductance and its leakage resistance, respectively. Load

resistance and back emf are represented as R and e respectively. To reduce the number of

calculations, load current modeling is carried out in a stationary reference frame (αβ) [77].

jβ Number of Redundancies = m

= m − 1 = m − 2

= m − 3 = m − 4 = 1

Figure 4.3: Space vectors generated by the multilevel diode-clamped converter.

S1a

S2a

S3a

S(m−1)a

S1a

S2a

S3a

S(m−1)a vc1

vc(m−4)

vc(m−3)

vc(m−2)

vc(m−1)

Cdc1

Cdc(m−4)

Cdc(m−3)

Cdc(m−2)

Cdc(m−1)

P h a se – b

P h a se – c

Phase–a

z(m−4)

z(m−3)

z(m−2)

vdc

− −

−

(m − 1)

(m − 2)

(m − 3)

(m − 4)

(1)

(0)

×1

×(m − 4)

×( m

− 3 )

×( m

− 2 )

×1

×( m

− 4 )

×( m

− 3 )

×( m

− 2 )

Rfa,Lfa

Rfb,Lfb

Rfc,Lfc

Back emf/ Grid

Figure 4.4: Topology of multi-level diode-clamped converter with RLE load.

The load currents can be represented as follows by applying the Kirchhoff’s law to the

Fig. 4.4 [262,279]: diα dt

= 1

Lf [vα − eα − (Rf + R) iα]

diβ dt

= 1

Lf [vβ − eβ − (Rf + R) iβ] .

(4.1)

In (4.1), the three-phase measured load currents (ia, ib, ic) and back emf (ea,eb,ec) are

converted to αβ frame. For the motor drives application, the back emf can be estimated

using the guidelines given in [262,279]. vα and vβ are stationary frame inverter voltages and

they are obtained from the transformation of three-phase voltages (with respect to negative

dc-rail N) given as follows:

⎡ ⎢⎣ vaN

vbN

vcN

⎤ ⎥⎦ = [vc1]

⎡ ⎢⎣ Sa == 1

Sb == 1

Sc == 1

⎤ ⎥⎦ + · · · + [vc1 + · · · + vc(m−1)]

⎡ ⎢⎣ Sa == (m − 1) Sb == (m − 1) Sc == (m − 1)

⎤ ⎥⎦ (4.2)

where vc1 and vc(m−1) are dc capacitor voltages. Sa, Sb and Sc represents the voltage levels

of a three-phase converter. For a 5L-DCC, the relation between the Sx and switching states

can be summarized as: Sx == 0 if S1x S2x S3x S4x = 1

Sx == 1 if S1x S2x S3x S4x = 1

Sx == 2 if S1x S2x S3x S4x = 1

Sx == 3 if S1x S2x S3x S4x = 1

Sx == 4 if S1x S2x S3x S4x = 1

(4.3)

where S1x, S2x, S3x and S4x are the switching signals of the phase x = a,b,c. The switching

pairs (S1x, S1x), (S2x, S2x), (S3x, S3x) and (S4x, S4x) are complementary in nature. Similar

analysis can be carried out for other MLDCCs.

The continuous-time model can be converted to discrete-time by approximating the

derivative using the backward Euler method [258,262,279]:

dt = x(k) − x(k − 1)

Ts (4.4)

where Ts is the sampling time used in the discrete-time conversion and control.

By substituting (4.4) in (4.1), the discrete-time model for the load currents can be ob-

tained as [77,258]:

iα(k) − iα(k − 1) Ts

= 1

Lf [vα(k) − eα(k) − (Rf + R) iα(k)]

iβ(k) − iβ(k − 1) Ts

= 1

Lf [vβ(k) − eβ(k) − (Rf + R) iβ(k)] .

(4.5)

The above expression can be simplified as,

iα(k) = Kv [vα(k) − eα(k)] − Ki iα(k − 1) iβ(k) = Kv [vβ(k) − eβ(k)] − Ki iβ(k − 1)

(4.6)

where Kv and Ki are defined as [258]:

Kv = Ts

Lf + (Rf + R)Ts

Ki = Lf

Lf + (Rf + R)Ts .

(4.7)

By shifting the variables in (4.6) one-sample forward, the following system can be ob-

tained: iα(k + 1) = Kv [vα(k + 1) − eα(k + 1)] − Ki iα(k) iβ(k + 1) = Kv [vβ(k + 1) − eβ(k + 1)] − Ki iβ(k)

(4.8)

where eα(k + 1) and eβ(k + 1) are extrapolated back emf values [77].

The variables in (4.8) can be expressed for a prediction horizon h as:

iα(k + h) = Kv [vα(k + h) − eα(k + h)] − Ki iα(k + h − 1) iβ(k + h) = Kv [vβ(k + h) − eβ(k + h)] − Ki iβ(k + h − 1).

(4.9)

The models in (4.1) to (4.9) correlate the output currents to the switching signals, and

with the appropriate selection of switching signals, the converter output currents can be

regulated precisely. Note that the model given in (4.7) and (4.9) can be used for grid

connection as well, where the load inductor and resistor are replaced by the inductive grid

filter and its internal resistance, and the back emf by the grid voltage (which is usually

measured for synchronization).

idc i4

ic1

ic2

ic3

ic4

P(4)

(3)

(2)

(1)

N(0)

Sa == 4Sa == 3

S a = =

S b = =

Sb == 3

Sb == 2

S b = =

S c = =

Sc == 3

Sc == 2

Sc == 1

S c = =

Figure 4.5: Simplified representation of the power circuit model for a 5L-DCC.

4.3.2 Model of DC-link Capacitor Voltages

Another important requirement in the MLDCCs is to balance the dc-link capacitor volt-

ages; otherwise the semiconductor device voltage stress increases. To facilitate the discussion,

a 5L-DCC is considered and its simplified dc-link model is represented in Fig. 4.5. The rela-

tionship between inverter branch currents (i1, i2, i3, i4) and capacitor currents (ic1, ic2, ic3, ic4)

can be expressed as follows considering the representation given in Fig. 4.5:

ic4 = idc − i4, ic3 = ic4 − i3 ic2 = ic3 − i2, ic1 = ic2 − i1.

(4.10)

By solving the system in (4.10), the capacitor current can be given as:

ic4 = idc − i4 ic3 = idc − i4 − i3 ic2 = idc − i4 − i3 − i2 ic1 = idc − i4 − i3 − i2 − i1.

(4.11)

The common current idc does not contribute to the voltage drift of the capacitors, there-

fore, (4.11) can be simplified as:

ic4 = −i4 ic3 = −i4 − i3 ic2 = −i4 − i3 − i2 ic1 = −i4 − i3 − i2 − i1.

(4.12)

The inverter branch currents (i1, i2, i3, i4) can be expressed in terms of load currents (ia,

ib, ic) and MLDCC switching states as follows:

i4 = (Sa == 4) ia + (Sb == 4) ib + (Sc == 4) ic

i3 = (Sa == 3) ia + (Sb == 3) ib + (Sc == 3) ic

i2 = (Sa == 2) ia + (Sb == 2) ib + (Sc == 2) ic

i1 = (Sa == 1) ia + (Sb == 1) ib + (Sc == 1) ic.

(4.13)

By substituting (4.13) in (4.12), the capacitor currents can be related to the load currents

as: ic4 = K4a ia + K4b ib + K4c ic

ic3 = K3a ia + K3b ib + K3c ic

ic2 = K2a ia + K2b ib + K2c ic

ic1 = K1a ia + K1b ib + K1c ic.

(4.14)

The gains K4x,K3x,K2x,K1x are a function of voltage level of the phase x = a,b,c as

shown in Table 4.3. This approach can be summarized for an m-level DCC as follows:

icj = ∑

x=a,b,c

Kjx ix. j = 1, · · · ,m − 1. (4.15)

The gains Kjx for phase x = a,b,c can be generalized as:

K1x = sgn (0 − Sx) K2x = sgn (1 − Sx) sgn (Sx) K3x = sgn (2 − Sx) sgn (Sx) sgn (Sx − 1) ...

...

K(m−2)x = sgn ((m − 3) − Sx) sgn (Sx) sgn (Sx − 1) · · ·sgn (Sx − (m − 4)) K(m−1)x = sgn ((m − 2) − Sx) sgn (Sx) sgn (Sx − 1) · · ·sgn (Sx − (m − 3))

(4.16)

where sgn(.) is a signum function:

sgn (x) =

⎧⎪⎪⎪⎨ ⎪⎪⎪⎩ −1 if x < 0 0 if x = 0

1 if x > 0.

(4.17)

Table 4.3: Relationship between switching states and coefficients of capacitor currents for a 5L-DCC (x = a,b,c)

Sx S1x S2x S3x S4x vxN K1x K2x K3x K4x

4 1 1 1 1 vc4 + vc3 + vc2 + vc1 -1 -1 -1 -1

3 0 1 1 1 vc3 + vc2 + vc1 -1 -1 -1 0

2 0 0 1 1 vc2 + vc1 -1 -1 0 0

1 0 0 0 1 vc1 -1 0 0 0

0 0 0 0 0 0 0 0 0 0

The relation between the dc-link capacitor voltages and currents can be expressed in

continuous time as: vc1 dt

= 1

C1 ic1

... ...

...

vc(m−1) dt

= 1

C(m − 1) ic(m−1)

(4.18)

where ic1 and ic(m−1) are the currents through the capacitors C1 and C(m−1), respectively.

The above model can be expressed in discrete time as [81,279,281]:

vc1(k) = vc1(k − 1) + Ts C1

ic1(k)

... ...

...

vc(m−1)(k) = vc(m−1)(k − 1) + Ts

C(m−1) ic(m−1)(k)

(4.19)

and,

vc1(k + 1) = vc1(k) + Ts C1

ic1(k + 1)

... ...

...

vc(m−1)(k + 1) = vc(m−1)(k) + Ts

C(m−1) ic(m−1)(k + 1)

(4.20)

The above expression can be generalized for a prediction horizon h as:

vc1(k + h) = vc1(k + h − 1) + Ts C1

ic1(k + h)

... ...

...

vc(m−1)(k + h) = vc(m−1)(k + h − 1) + Ts

C(m−1) ic(m−1)(k + h)

(4.21)

These currents ic1 and ic(m−1) can be estimated using the measured load/grid currents

(ia, ib, ic) and switching states of the converter [81,279,281]. The generalized calculation for

an m-level DCC is as follows:

icj(k + h) = ∑

x=a,b,c

Kjx(k + h) ix(k + h). j = 1, · · · ,m − 1. (4.22)

The dynamics in (4.16)-(4.22) suggests that the dc-link capacitor voltages are also a

function of switching signals. The proper selection of switching signal leads to accurate

balancing of the capacitor voltages.

4.3.3 Model of Common-Mode Voltage

The modeling of common-mode voltage (CMV) is different for odd-level (3L and 5L) and

even-level (4L and 6L) DCCs. In odd-level DCCs, the CMV exists between the neutral-point

of the load/motor/grid (n) and the mid-point of dc-link capacitors (o) [274,277]. The CMV

in odd-level DCC can be expressed in terms of switching states as follows:

vcm = vno = 1

m − 1 m−1∑ 1

vcj 1

∑ x=a,b,c

Sx − m + 1 2

. (4.23)

For a 3L-DCC, the above expression can be simplified as:

vcm = vno = vc1 + vc2

(Sa − 2) + (Sb − 2) + (Sc − 2) 6

. (4.24)

In even-level DCCs, the number of dc-link capacitors is odd and there exists no mid-

point. The CMV is measured between the neutral-point of the load/motor/grid (n) and the

negative dc-rail (N) [276]:

vcm = vnN = vaN + vbN + vcN

3 (4.25)

where vaN, vbN and vcN are inverter terminal voltages [refer to Eq.(4.2)].

The systems in (4.2), (4.23) and (4.25) depict that the CMV is related to the switching

signals. In odd-level DCCs, the CMV can be reduced to zero value with the proper selection

of switching signals. In the even-level DCCs, there exists no switching state which would

achieve a zero CMV value [276], but it can be reduced to some extent with the optimal

selection of switching states. Additional hardware such as common-mode choke is required

in even-level DCCs to reduce the CMV to zero.

4.4 Predictive Control of Multilevel Diode-Clamped

Converters

Based on the generalized model discussed before, a predictive control approach is pre-

sented in this section for an m-level converter. The proposed predictive control scheme is

shown in Fig. 4.6. As displayed, no PI controllers or modulators are used in the control

loop. The main parts of the predictive control are discussed as follows:

4.4.1 Definition of Cost Function

All the control objectives are expressed as cost functions. By minimizing the cost func-

tions during each sampling interval, the control goals can be met.

vc1

vc(m−3)

vc(m−2)

vc(m−1)

v d c

6 × (m − 1)

ia(k)

ib(k)

ic(k)

S(k)

Rfa,Lfa

Rfb,Lfb

Rfc,Lfc

vc1(k)... vc(m−1)(k)

vc1(k + 2)... vc(m−1)(k + 2) i∗α(k)

i∗β(k)

iα(k + 2)

iβ(k + 2)

iα(k)

iβ(k)

i∗α(k + 2)

i∗β(k + 2)Cost function

Minimization Extrapolation

Predictive

Controller

MLDCC

Back emf/

Grid

Figure 4.6: FCS-MPC scheme for multilevel diode-clamped converter.

The main objective for the DCC is to regulate the load/motor/grid current which is

expressed as:

gtrack(k) = [i ∗ α(k + h) − iα(k + h)]2 +

[ i∗β(k + h) − iβ(k + h)

]2 (4.26)

where i∗α(k + h) and i ∗ β(k + h) are the extrapolated references to the h-state. This can be

performed using Lagrange or vector angle extrapolation [77,258].

The dc-link capacitor voltages balancing objective is expressed as another cost function:

gdc(k) = λdc ∑

j=1,···,m−1 [vcj(k + h) − vcj+1(k + h)]2 (4.27)

where λdc is the weighting factor for the dc capacitor voltages balancing task.

The switching frequency minimization can be achieved by penalizing the cost function

as:

gswc(k) = λswc ∑

x=a,b,c

swcx (4.28)

where λswc is the weighting factor for the switching frequency minimization. swcx represents

the number of switch changes involved in phase x = a,b,c, and they can be calculated as

shown in Table 4.4. Sx,op(k) is the optimal voltage vector in the previous sample.

Table 4.4: Calculation of number of switch changes for MLDCC (x = a,b,c)

Sx(k + 1)

swcx 0 1 2 3 4 5 · · · (m − 1) Sx,op(k) = 0 0 2 4 6 8 10 · · · 2(m − 1) Sx,op(k) = 1 2 0 2 4 6 8 · · · 2(m − 2) Sx,op(k) = 2 4 2 0 2 4 6 · · · 2(m − 3) Sx,op(k) = 3 6 4 2 0 2 4 · · · 2(m − 4) Sx,op(k) = 4 8 6 4 2 0 2 · · · 2(m − 5) Sx,op(k) = 5 10 8 6 4 2 0 · · · 2(m − 6)

... ...

...

Sx,op(k) = (m − 1) 2(m − 1) 2(m − 2) 2(m − 3) 2(m − 4) 2(m − 5) 2(m − 6) · · · 0

The CMV minimization objective can be expressed as:

gcmv(k) = λcmv |vcm| (4.29)

where λcmv is the weighting factor for CMV reduction.

The final cost function combining (4.26)-(4.29) is given as:

g(k) = gtrack(k) + gdc(k) + gswc(k) + gcmv(k). (4.30)

4.4.2 Selection of Weighting Factors

The selection of values for the weighting factors is very important. Unfortunately, in

state-of-the-art predictive control, no analytical or numerical formulas are available for the

calculation of weighting factor values, but the guidelines given in [247] can be used. The

main objective of the controller is to regulate the load current, and thus the λtrack value can

be set to 1 [262,279].

The second requirement is balancing the dc-link capacitor voltages. A very high value

for λdc will create perfect balance in the capacitor voltages, but with higher tracking errors

and THD for the load currents. Similarly, a low value for λdc leads to a drift in the capacitor

voltages, but very good regulation of load currents. A good compromise is to select λdc such

that the drift in capacitor voltages is around 2 % of nominal dc-link voltage.

The selection of λswc is specific to the applications involving the MLDCCs. For megawatt-

level applications, the device switching frequency should be maintained below 1 kHZ to allow

proper heat dissipation [271]. From Table 4.4, it can be discerned that the number of switch

changes increase with the increase in number of levels in the DCCs. To achieve a switching

frequency value, the weighting factor λswc decreases with the increase in number of levels. In

odd-level MLDCCs, a minimal value of λcmv should be selected such that the CMV becomes

zero. In even-level MLDCCs, the selection criteria for λcmv should consider the load current

tracking error and THD limit imposed by the application.

4.4.3 Selection of Prediction Horizon −h Many FCS-MPC applications are reported to use the one-step prediction horizon (h = 1)

[shown in Fig. 4.7(a)] along with the delay compensation method introduced in Fig. 3.11,

as this approach involves a lower computational burden [77, 279, 281–283]. To compensate

the computational delay caused by the digital signal processor, another approach based on

a simplified two-step prediction horizon (h = 2) can be used, and this method is given in

Fig. 4.7(b). With this approach, the switching state which minimizes the cost function at

the (k + 2) instant is selected and applied at the sampling instant (k). As shown in Fig.

4.7(b), the same voltage vectors are used in the (k + 1) and (k + 2) predictions to reduce the

number of calculations: vα(k + 2) = vα(k)

vβ(k + 2) = vβ(k)

Kjx(k + 2) = Kjx(k).

(4.31)

To facilitate the two-step predictive strategy, the control variable behavior at the (k + 2)

instant should be predicted using all the possible switching states of the converter. The

model in (4.9) is used to predict the future load/grid currents, iα(k + 2) and iβ(k + 2). The

inverter voltages vα(k) and vβ(k) are obtained by converting the natural frame variables

given in Eq.(4.2). The (k + 2) instant dc-link capacitor voltages [vc1(k + 2) · · ·vc(m−1)(k + 2)] are obtained according to the discrete-time models given in (4.21) and (4.22).

k k + 1 k + 2

(a) Classical one-step prediction

k k + 1 k + 2

(b) Proposed two-step prediction

Figure 4.7: Prediction of control variables for a 4L-DCC.

4.4.4 Control Algorithm

The control algorithm with the two-step prediction is shown in Fig. 4.8. The measured

load/grid currents and dc-link capacitor voltages are used by the predictive controller. The

algorithm is initialized by setting the switching state number i to 0 and optimal g value to

∞. Then the algorithm enters the loop. The variables at the (k + 1) and (k + 2) instant are predicted using all the possible switching states of the converter. The predicted variables at

the (k + 2) instant are evaluated by a cost function g(k). The optimal voltage vector in the

previous sampling instant is used by the sub-cost function gswc(k). The switching state which

produces a minimal value of gop is chosen and applied to the converter directly. It should be

emphasized that the proposed method can be applied to any level DCC without any change

in the software configuration, except the switching states definition in the initialization file.

Measurement: ia(k), ib(k), ic(k), vc1(k), · · · vc(m−1)(k)

Obtain: i∗α, β(k + 2), iα, β(k), eα, β(k), eα, β(k + 1)

i = 0, gop = ∞

i = i + 1

Prediction of (k + 1) variables using (4.9) and (4.21)

Prediction of (k + 2) variables using (4.9) and (4.21)

Minimization of cost function, g(k) using (4.30)

i ≥ m3 No

Yes

gop = min {gi}i=1...m3 iop = i |gop

Generate optimal gating signals

S1a, S1b, S1c, · · · S(m−1)a, S(m−1)b, S(m−1)c

Figure 4.8: Two-step predictive control algorithm for an m-level DCC.

4.5 Simulation Results

To validate the proposed method, simulations are carried using MATLAB/Simulink soft-

ware with the parameters as indicated in Table 4.5. To be able to validate experimental

results under same conditions, low power converter parameters are used. The proposed

approach can also be used for megawatt-level systems without any software modification.

The sampling time is considered as Ts = 100 μs. A two-step prediction horizon (h = 2)

is used and the control delay is ignored. The simulation results are presented for 3L- to

6L-DCCs under the same operating conditions. The load/grid current tracking error (ei),

total harmonic distortion (THD) and average device switching frequency (fsw) are calculated

according to the guidelines given in Appendix C.

Table 4.5: Parameters of the MLDCC and controller

Variable Description Value

C dc-link capacitors value 1000 (μF) Rf Filter leakage resistance 0.045 (Ω) Lf Filter inductance 10 (mH) i∗ Nominal reference load current 10 (A rms) f∗ Nominal reference frequency 60 (Hz) R Nominal load resistance 10 (Ω) Ts Sampling time 100 (μs) h Prediction horizon 2 λdc Weighting factor 0.1

4.5.1 Transient Analysis

The transient response with a step-change in load currents is studied for 3L- to 6L-DCCs

and presented in Fig. 4.9. The switching frequency reduction and CMV suppression are not

included in the cost function. The dc-link voltage vdc is set to 300 V. At time t = 0.0458 s,

a step change in i∗α is applied from 10 to 5 A (rms). The load currents show good response in

reference tracking. The iβ is continued to track to its reference and it is not affected by the

changes in iα. The dc capacitor voltages are well balanced before and after the step-change in

load current. Due to the unbalanced load currents, the dc capacitor currents oscillate [refer

to (4.22)], and as a consequence the dc capacitor voltages also oscillate [refer to (4.21)]. But

the magnitude of the oscillations is very small and can be ignored.

−10 −20 0

140

145

150

155

160

0 1/60 2/60 3/60

iα

i∗α

iβ

i∗β

vc1 vc2

Time (s)

(a) 3L-DCC

−10 −20 0

100

105

110

0 1/60 2/60 3/60

iα

i∗α

iβ

i∗β

vc1

vc2

vc3

Time (s)

(b) 4L-DCC

−10 −20 0

0 1/60 2/60 3/60

iα

i∗α

iβ

i∗β

vc1

vc2 vc3

vc4

Time (s)

−10 −20 0

0 1/60 2/60 3/60

iα

i∗α

iβ

i∗β

vc1

vc2

vc3

vc4

vc5

Time (s)

(d) 6L-DCC

Figure 4.9: Simulation results during step-change in reference load current.

4.5.2 Robustness against DC-link Perturbations

In order to evaluate the performance of the controller, a resistor Rx (200 Ω) is connected

in parallel with the top dc-link capacitor of 3L- to 6L-DCCs and the results are presented in

Fig. 4.10. The weighting factors associated with the switching frequency and CMV reduction

are set to zero. The vdc and i ∗ are set to 300 V and 15 A (rms), respectively. Compared to the

results presented in Fig. 4.9, the dc-link capacitor voltages contain a low frequency ripple

due to the Rx. Even with the perturbation in the dc-link model, the controller chooses

an optimal switching state leading to the minimum value of the cost function gdc(k) and

thus accurate balancing of the dc-link capacitor voltages. As demonstrated in Fig. 4.10(a)

for 3L-DCC, when the weighting factor is deactivated (means λdc = 0), the voltage across

the top capacitor starts to discharge through the resistor Rx, while the bottom capacitor

voltage starts to rise. At t = 0.4 s, the weighting factor is activated again (λdc = 0.1),

and the dc-link capacitor voltages become balanced within a short interval. Similar analysis

150

300

100

200

150

120 vc1

vc1

vc2

vc3

vc4

vc5

0 0.1 0.2 0.3 0.4 0.5

Time (s)

λdc = 0.1λdc = 0.1 λdc = 0

(a) 3L-DCC

(b) 4L-DCC

(d) 6L-DCC

Figure 4.10: Simulation results for dc-link capacitor voltages behavior with and without the weighting factor λdc.

can be carried out for 4L- to 6L-DCCs. It should be noted that the recovery time from

an unbalanced to a balanced condition is approximately the same for all the DCCs. This

test verifies that similar to the classical controls, the predictive control method can also be

generalized and can be applied to any level DCC.

4.5.3 Switching Frequency Reduction

The switching frequency versus the weighting factor λswc is studied for 3L- to 6L-DCCs

and presented in Fig. 4.11. In order to facilitate the discussion of fsw minimization and its

impact on the converter output current quality among different DCCs, the dc-link voltages

are assumed to be balanced (by external hardware) and thus λdc = 0. The CMV reduction

is also not considered. The vdc and i ∗ are set to 300 V and 10 A (rms), respectively. At time

t = 2/60 s, the weighting factor λswc is changed from 0 to a value suitable for each DCC.

Referring to Table 4.4, the cumulative number of switch changes (swcx) increase with the

number of levels in DCC.

For this reason, the weighting factors used for each DCC are different. The performance

of the DCC before and after switching frequency minimization is summarized in Table 4.6.

It can be seen from Fig. 4.11, as the number of levels increases, the fsw decreases along with

the ei and THD. For all DCCs, as the weighting factor λswc increases, the fsw decreases,

with a slight increase in ei and THD.

−400

−200

200

400

−20

−10

0 1/60 2/60 3/60 4/60

vab

v a b (V

) v a b (V

)

i∗a

i a (A

) i a

(A )

i a (A

) i a

(A )

Time (s)

λswc Deactivated λswc Activated

(a) 3L-DCC

(b) 4L-DCC

(d) 6L-DCC

Figure 4.11: Simulation results for switching frequency minimization using the weighting factor λswc.

Table 4.6: Simulation analysis during fsw minimization

DCC Level λswc ei (%) THD (%) fsw(Hz)

3L 0 2.71 2.11 938

0.5 3.47 3.29 442

4L 0 2.35 1.41 657

0.2 2.79 2.07 364

5L 0 2.17 1.14 421

0.1 2.44 1.51 239

6L 0 2.02 1.01 266

0.05 2.12 1.24 134

4.5.4 Common-Mode Voltage Mitigation

The CMV mitigation with odd-level (3L and 5L) DCCs are shown in Fig. 4.12, where it

has been demonstrated that the CMV can be reduced to zero by choosing a best switching

state. The dc supply voltage and load current references are set as 400 V and 10 A (rms),

respectively.

At t = 2/60 s, the λcmv is changed from 0 to 0.12 and the CMV is dramatically decreased.

At t = 4/60 s, the λcmv is further increased to 0.24 and zero values for the CMV is achieved

with 3L and 5L DCCs. The phase-a load current is shown, where it can be observed that the

reference tracking is good even with zero CMV. The THD in load currents increase slightly

due to the additional weighting term λcmv. The capacitor voltages are affected due to the

CMV reduction, and to maintain them within the ± 5 V range, the weighting factor λdc is changed from 0.1 to 0.2 at t = 4/60 s.

The CMV issue with even-level (4L and 6L) DCCs are presented in Fig. 4.13. The

CMV is reduced to some extent with the help of λcmv. This helps to minimize the rating of

additional CMV hardware circuitry (choke). It should be noted that non-zero CMV is the

inherent property of even-level DCCs.

−20 −10 0

190

195

200

205

210

−200 −100

100

200

0 1/60 2/60 3/60 4/60 5/60 6/60

i∗a

vc1

vc2

Time (s)

λcmv = 0 λcmv = 0.12 λcmv = 0.24

(a) Common-mode voltage, vcm

(b) Load current and its reference

(a) 3L-DCC

−20 −10 0

100

105

110

−200 −100

100

200

0 1/60 2/60 3/60 4/60 5/60 6/60

i∗a

vc1

vc2 vc3

vc4

Time (s)

λcmv = 0 λcmv = 0.12 λcmv = 0.24

(a) Common-mode voltage, vcm

(b) Load current and its reference

(b) 5L-DCC

Figure 4.12: Simulation results for common-mode voltage minimization of odd-level convert- ers using the weighting factor λcmv.

−20 −10 0

123.3

128.3

133.3

138.3

143.3

−100 0

100 200

300

400

0 1/60 2/60 3/60 4/60 5/60 6/60

i∗a

vc1

vc2

vc3

Time (s)

λcmv = 0 λcmv = 0.02 λcmv = 0.05

(a) Common-mode voltage, vcm

(b) Load current and its reference

(a) 4L-DCC

−20 −10 0

−100 0

100 200

300

400

0 1/60 2/60 3/60 4/60 5/60 6/60

i∗a

vc1

vc2

vc3

vc4

vc5

Time (s)

λcmv = 0 λcmv = 0.02 λcmv = 0.05

(a) Common-mode voltage, vcm

(b) Load current and its reference

(b) 6L-DCC

Figure 4.13: Simulation results for common-mode voltage minimization of even-level con- verters using the weighting factor λcmv.

4.6 Experimental Results

The experimental tests are carried out with one odd-level DCC (3L) and one even-level

DCC (4L). The complete system parameters are indicated in Table 4.5 which are the same

as the ones used in simulation tests. As in the simulations, a two-step prediction horizon

(h = 2) is used. As the number of levels in the DCCs increase, the computational burden

increases. The minimum sampling time (Ts) required to implement the proposed algorithm

for 3L- to 6L-DCCs is noted and summarized in Table 4.7. The analysis also shows that the

current DSPs can handle the computational requirement, even for 6L-DCC.

Table 4.7: Computational burden with MLDCCs

DCC Level Number of Switching States Minimum Ts (μs)

3L 27 18 4L 64 44 5L 125 93 6L 216 221

The experimental results with a step-change in i∗α from 10 to 5 A (rms) are presented for

3L- and 4L-DCCs in Figs. 4.14(a) and 4.14(b). Again, as in the simulations, load currents

track their references accurately. The dc-link capacitor voltages are also balanced with small

oscillation (due to unbalanced load currents) after the step-change. The tracking error and

load current THD are found to be a little higher than in simulations. This is due to the

dead-time caused by the voltage and current transducers, IGBT gate drivers, and ADC units.

These results validate the theory and simulation results presented earlier.

The robustness of the predictive controller in overcoming the system perturbations is

experimentally validated for 3L- and 4L-DCCs, and presented in Figs. 4.15(a) and 4.15(b).

A resistor of 200 Ω can be deliberately connected in parallel with the top dc-link capacitor

to modify the system model. Even with the changes to the system model, the predictive

controller works on the selection of best switching state which leads to the minimal value of

the cost function. With this phenomenon, the load currents follow their references, and the

dc-link capacitor voltages are balanced within set limits. When the controller deactivates, the

capacitor voltages diverge similar to the results presented in Fig. 4.10. When the controller

is activated, they become balanced with a small recovery time. This test validates that the

proposed algorithm is robust and can be applied for any-level DCC.

i∗α

iα

i∗β

iβ

vc1 vc2

Ch1 to Ch4: 10 A/div, t=5 ms/div

Ch1 to Ch2: 50 V/div, t=5 ms/div

(a) 3L-DCC

i∗α

iα

i∗β

iβ

vc1 vc2 vc3

Ch1 to Ch4: 10 A/div, t=5 ms/div

Ch1 to Ch3: 50 V/div, t=5 ms/div

(b) 4L-DCC

Figure 4.14: Experimental results during step-change in reference to load current.

The switching frequency minimization algorithm is experimentally validated with the

3L- and 4L-DCCs and the results are presented in Figs. 4.16(a) and 4.16(b). The dc-link

capacitor voltages are externally controlled and the weighting factor λdc is set to zero. With

the increase in λswc, the switching frequency decreases with a slight increase in the ei and

%THD in converter output current. The analysis with 3L- and 4L-DCCs is summarized in

Table 4.8. These results are in a close relation to the simulation analysis presented in Table

4.6.

Table 4.8: Experimental analysis during fsw minimization

DCC Level λswc ei (%) THD (%) fsw(Hz)

3L 0 3.2 3.0 817 0.5 4.3 4.0 417

4L 0 2.83 2.25 612 0.2 3.41 3.18 306

vc1

vc2

λdc = 0.1λdc = 0.1 λdc = 0

Ch1 to Ch2: 50 V/div, t=50 ms/div

(a) 3L-DCC

vc1

vc2vc3

λdc = 0.1λdc = 0.1 λdc = 0

Ch1 to Ch3: 50 V/div, t=50 ms/div

(b) 4L-DCC

Figure 4.15: Experimental results for dc-link capacitor voltages behavior with and without the weighting factor λdc.

The CMV suppression for 3L-DCC is presented in Fig. 4.17(a), where, with the help of

the weighting factor λcmv, the CMV is reduced to zero. The value of the weighting factor

and the system parameters are exactly the same as in simulation tests. While minimizing

the CMV, the ei, %THD and drift in capacitor voltages increased slightly. The experimental

results with 4L-DCC are presented in Fig. 4.17(b) and thus, it is demonstrated that the CMV

can be reduced to some lower value. These results validate the proposed CMV algorithm.

i∗a

vab

λswc = 0 λswc = 0.5

Ch1 to Ch2: 10 A/div, Ch4: 200 V/div, t=5 ms/div

(a) 3L-DCC

i∗a

vab

λswc = 0 λswc = 0.2

Ch1 to Ch2: 10 A/div, Ch4: 200 V/div, t=5 ms/div

(b) 4L-DCC

Figure 4.16: Experimental results for switching frequency minimization using the weighting factor λswc.

vcm

i∗α iα

vc1 vc2

λcmv = 0 λcmv = 0.12 λcmv = 0.24

Ch1: 100 V/div, Ch2 to Ch3: 10 A/div, t=10 ms/div

Ch1 to Ch2: 50 V/div, t=10 ms/div

(a) 3L-DCC

vcm

i∗α iα

vc1 vc2

λcmv = 0 λcmv = 0.02 λcmv = 0.05

vc3

Ch1: 100 V/div, Ch2 to Ch3: 10 A/div, t=10 ms/div

Ch1 to Ch2: 50 V/div, t=10 ms/div

(b) 4L-DCC

Figure 4.17: Experimental results for common-mode voltage reduction using the weighting factor λcmv.

4.7 Conclusion

In this chapter, a generalized approach based on finite control set model predictive

strategy has been presented for multilevel diode-clamped converters. The dynamics of the

load/motor/grid currents, dc-link capacitor voltages, switching frequency and common-mode

voltage are formulated in terms of switching states and the mathematical model of the con-

verter. A proper selection of switching state leads to a minimum value of cost function and

with this, all four control objectives are accomplished simultaneously. The common-mode

voltage is completely suppressed in odd-level converters by just adding a constraint to the

cost function. The proposed method shows an intuitive and promising approach to bal-

ance the dc-link capacitor voltages, even with the perturbations in the system model and

parameters.

Chapter 5

Predictive Current Control of

Grid-Tied Diode-Clamped Inverters

In the Chapter 4, a generalized method for the predictive control of multilevel (ML)

diode-clamped converters was presented. In this chapter, the predictive control approach

is extended to the grid-tied diode-clamped inverters (DCIs). As discussed in Chapter 2,

the three-level (3L) and four-level (4L) DCIs are the most suitable candidates for the grid

connection of a medium voltage (MV) wind energy conversion systems (WECS). The im-

plementation of predictive control is the same for 3L and 4L-DCIs as discussed in Chapter

4, and this is true for the grid-tied case as well. In comparison to the 3L-DCI [62, 72], the

4L-DCI for high power WECS offers added benefits such as: MV operation with greatly

reduced device voltage rating [106], increased equivalent switching frequency [84], lower val-

ues for the grid-side filter, grid friendly waveforms, and grid code compliance. However, the

complexity of control system increases compared to the 3L-DCI.

In this chapter, predictive control of a grid-tied 4L-DCI is presented. The control objec-

tives, such as regulation of net dc-bus voltage, reactive power generation, dc-link capacitor

voltages balancing, and switching frequency minimization are included in the cost function.

During different operating conditions, the switching frequency is regulated between 750 and

850 Hz with the help of a lookup table based on the weighting factor. To validate the pro-

posed method, MATLAB simulations are carried out on 4 MVA/4000 V system and dSPACE

DS1103 based experiments are performed on 5 kVA/208 V prototype.

5.1 Overview of Grid-Tied Inverters

The configuration of Type-4 variable-speed WECS with full-scale power converters (two-

level or multilevel) is shown in Fig. 5.1. The generator-side ac/dc converter is used to

harvest more energy from wind, while the grid-tied dc/ac inverter is employed to deliver

the generated power to a three-phase grid/collection point. The ac/dc power conversion

can be achieved by active or passive generator-side converters as discussed in Chapter 2.

The grid connection is usually performed through a harmonic filter Lg to reduce the grid

current distortion, and a step-up transformer (not shown to simplify the figure) to increase

the inverter output voltage to transmission level. In commercial wind turbines, the harmonic

filter Lg value (combined with the leakage inductance of the transformer, if any) is chosen

to be in the range of 0.1-0.25 p.u. [2, 10, 14]. The internal resistance of the harmonic

filter is represented as Rg. The grid-tied inverter is a crucial element in wind turbines to

comply with the stringent grid-codes. In this chapter, a detailed analysis is given related to

the operation of grid-tied inverters. The analysis presented here is valid for two-level and

multilevel converters.

In a complete WECS composed of full-scale power converters, the following variables

needs to be regulated to achieve high-performance operation:

• Active power control • Grid reactive power control • Net dc-bus voltage control • Balancing of dc-link capacitor voltages (in multilevel converters)

As shown in Fig. 5.1, the generator-side ac/dc converter performs the maximum power

point tracking (MPPT) to harvest more energy from the wind. This operation is called active

power control. More details about the MPPT algorithms can be found in [2,6,14,47,51,284–

289]. The grid reactive power and net dc-bus voltage are controlled by the grid-tied dc/ac

inverter. The dc-link capacitor voltages are controlled by both ac/dc and dc/ac converters if

back-to-back connected converters are employed [67]. If the generator-side power conversion

is realized by a diode-rectifier, then the capacitor voltages control is performed by the dc/ac

inverter alone. In this chapter, the analysis has been carried out assuming that the dc/ac

inverter is responsible solely for balancing of dc-link capacitor voltages.

100

Wind Turbine

Gear Box

PMSG

WRSG

SCIG

AC/DC Converter

DC/AC Inverter

Three-Phase Grid

Harmonic Filter

DC-link

A ct iv e/ P a ss iv e

C o n v er te rs

Active Power Control

DC-Cap. Control∗

Net dc Voltage Control

Reactive Power Control

DC-Cap. Control∗

∗ = in Multilevel Converters only

vdc

Figure 5.1: Configuration of Type-4 WECS with full-scale power converters.

DC/AC Inverter

Three-Phase Grid

Harmonic Filter

DC-link

WECS with

Active Power

Control (MPPT)

Net dc Voltage Control

Reactive Power Control

DC-Cap. Control∗

Rdc

idc

vdcE

∗ = in Multilevel Converters only

Figure 5.2: Simplified representation of Type-4 WECS.

In order to perform detailed analysis on the grid-tied inverter, a simplified Type-4 WECS

is developed as shown in Fig. 5.2. In the complete WECS as represented in Fig. 5.1,

the generator-side ac/dc converter, along with the active power control, injects current idc

according to the maximum energy harvested from the wind. When the wind turbine operates

below cut-in wind speed, the idc supplied by the generator-side converter is zero. Similarly,

when the turbine operates at rated wind speed, the idc is rated. In order to simulate such a

variable-speed wind energy system, a variable dc-current source is generated with the help

of battery supply E and a resistor Rdc [2,14]. The amount of active power injected into the

grid can be varied by changing the value of idc. When the battery voltage E > vdc, the idc

[=(E − vdc)/Rdc] becomes positive and power flows from the inverter to the grid, which is the usual case in WECS. For a given value of Rdc, by adjusting E value, the active power

generation can be adjusted. During different active power levels, the grid-tied inverter should

control the net dc-bus voltage and grid reactive power.

101

5.1.1 Definition of Grid-side Control Variables

In this section, the selection of grid-tied inverter control variables is discussed:

• Definition of dc-link Voltage Reference: To ensure the proper operation of the grid-tied inverter, the dc-bus voltage should be higher than the grid line-line voltage.

In this work, the dc-bus voltage reference v∗dc is selected such that the inverter operates

with a 0.8 modulation index, leaving a 20 % margin for adjustment during transients

and grid voltage variations. Following this discussion, the v∗dc is defined as,

v∗dc =

√ 6 vg ma

√ 6vg 0.8

= 3.062 × vg (5.1)

where vg is rms value of the grid phase voltage, and ma is the modulation index of

the inverter. The control scheme for the grid-tied inverter should ensure that the vdc

is maintained at its reference value during all the operating conditions.

• Definition of Grid Power Factor: The power flow is bidirectional for the grid-tied inverter, but in WECS the power flow is unidirectional (from the dc-link to the grid).

The active and reactive powers delivered to the grid can be calculated as:

Pg = 3 Vg Ig cosφg

Qg = 3 Vg Ig sinφg (5.2)

where φg is the grid power factor angle. The angle between the grid voltage and current

vectors is measured as φg. The grid power factor can be unity, lagging or leading based

on the power factor angle:

Unity Power Factor: if φg = 0 ◦

Lagging Power Factor: if φg = 0 − 90◦ lagging Leading Power Factor: if φg = 0 − 90◦ leading

Following this assumption, the reference grid reactive power Q∗g can be set as follows:

Unity Power Factor: if Q∗g = 0

Lagging Power Factor: if Q∗g = positive

Leading Power Factor: if Q∗g = negative

102

5.1.2 Classical Control Schemes for Grid-Tied Inverters

The well-established classical control techniques for grid-tied inverters are the virtual

flux-oriented control [69], direct power control [70, 71] and decoupled voltage-oriented con-

trol (VOC) [2, 14, 72]. The decoupled VOC has been widely adopted by the wind energy

industry. The above-mentioned control techniques use PI regulators in their internal current

control loop and a modulation stage to generate the gating signals. A complex modulation

technique along with the dc-link capacitor voltages balancing [96, 290] is required to apply

these techniques to multilevel inverters. The most common modulation techniques for the

four-level inverters are: carrier-based pulse width modulation (PWM) [169, 269] and space

vector modulation (SVM) [108, 270]. The device switching frequency reduction to below 1

kHz is another important issue at the megawatt-level to minimize the switching losses and

to allow proper heat dissipation [271]. The PWM and SVM techniques produce significantly

lower order harmonics when operated below 1 kHz and this causes poor power quality [74].

Moreover, the grid voltage harmonics and control delay will degrade the performance of the

PWM/SVM-based controller [76]. The main idea of this work is to replace the PI controllers

and modulation stage by predictive controller to achieve high performance operation. The

reference control variables are generated similar to the classical VOC scheme.

5.1.3 Grid Voltage Orientation

In order to achieve grid voltage orientation as in VOC, the d-axis of the synchronous

reference frame (SRF) is aligned with the grid voltage vector and as a result q-axis grid

voltage becomes zero [2]. With this approach, the decoupled control for the grid active and

reactive powers can be achieved. Moreover, the calculation of grid active and reactive powers

becomes easier as demonstrated below:

Pg = 3

2 (vdg idg + vqg iqg) = +

2 vdg idg

Qg = 3

2 (vqg idg − vdg iqg) = −

2 vdg iqg

⎫⎪⎬ ⎪⎭ vqg = 0 (5.3)

where vdg and vqg are d- and q-axis grid voltages, respectively. idg and iqg are d- and q-axis

grid currents, respectively.

103

5.2 Grid-Tied Four-Level Inverter Model

A simplified configuration of grid-tied 4L-DCI is shown in Fig. 5.3. The inverter is

composed of 18 active switches and 18 clamping diodes. The clamping diodes withstand

different reverse blocking voltages, and if the voltage rating for all the clamping diodes is

selected to be same as the active switches, then a series connection of two diodes is necessary

[84] as shown in Fig. 5.3. To simplify the analysis, the following assumptions are made:

Rag = Rbg = Rcg = Rg, Lag = Lbg = Lcg = Lg,

vag + vbg + vcg = 0, iag + ibg + icg = 0. (5.4)

The switching states and the corresponding inverter terminal voltages are shown in Table

5.1, where it can be noted that: (a) only three switches conduct at any time, and (b) switch

pairs (S1x, S1x), (S2x, S2x) and (S3x, S3x) operate in a complementary manner [84]. As shown

in Fig. 5.4, for a 4L-DCI, 64 switching combinations and 37 voltage vectors are available.

S1a

S2a

S3a

S1a

S2a

S3a

S1b

S2b

S3b

S1b

S2b

S3b

S1c

S2c

S3c

S1c

S2c

S3c

a b c

P(3)

N(0)

z2(2)

z1(1)

idc

Rdc

vdc

vc3

vc2

vc1

ic3

ic2

ic1

cdc3

cdc2

cdc1

iag

vag vbg vcg

Rag Rbg Rcg

Lag Lbg Lcg

+++

−−−

−

ibg icg

Figure 5.3: Topology of grid-tied 4L-DCI in MV-WECS.

104

Table 5.1: Switching states and inverter terminal voltages

Sx S1x S2x S3x S1x S2x S3x vxN

3 1 1 1 0 0 0 vc1 + vc2 + vc3

2 0 1 1 1 0 0 vc1 + vc2

1 0 0 1 1 1 0 vc1

0 0 0 0 1 1 1 0

003 103 203 303

302

301

300

310

320

330230130030

031

032

033

023

013 002113 102 213

202 313

201 312

311 200

321 210

331 220

231 120

131 020

132 021

133 022

012 123

001 112 223

101 212 323

322

211

211 100

332

110

232 121 010

233 122 011

000 111 222 333 α

jβ

vaN

vbN

vcN

v0 v1

v2v3

v5 v6

v9v10v11

v12

v13

v14

v15 v16 v17

v18

v19

v20

v21

v22v23v24v25

v26

v27

v28

v29

v30

v31 v32 v33 v34

v35

v36

Figure 5.4: Space vector diagram and switching states for a four-level inverter.

As given in Table. 5.1, the voltage in any phase-x of the inverter, measured from the

negative point of the dc-link (N), can be expressed in terms of switching signals and dc-link

capacitor voltages as follows [108]:

vxN = (Sx == 0) (0) + (Sx == 1) (vc1)

+ (Sx == 2) (vc1 + vc2) + (Sx == 3) (vc1 + vc2 + vc3). x = a, b, c. (5.5)

With respect to the grid neutral (n) these inverter voltages can be expressed as [77]:

van = + 2

3 vaN −

3 vbN −

3 vcN

vbn = − 1

3 vaN +

3 vbN −

3 vcN

vcn = − 1

3 vaN −

3 vbN +

3 vcN.

(5.6)

105

5.2.1 Modeling of Grid Currents in Synchronous Frame

The grid currents can be expressed in terms of inverter voltages, grid voltages and filter

inductance in a natural frame (abc) as [291]:

d ig dt

= 1

Lg [vi − vg − Rg ig]. (5.7)

In order to facilitate easier design and control, the measured natural frame grid voltages

and currents are converted to synchronous frame. The above natural frame currents can be

converted to synchronous frame (dq) and expressed in state-space form as follows [14]:

[ idg

iqg

] = A

[ idg

iqg

] + Bi

[ vdi

vqi

] + Bg

[ vdg

vqg

] (5.8)

where

A =

[ −Rg Lg

ωg

−ωg −RgLg

]

Bi =

[ 1 Lg

0 1 Lg

]

Bg =

[ − 1

Lg 0

0 − 1 Lg

] .

(5.9)

vdi and vqi are the estimated d- and q-axis inverter voltages, respectively. They are

obtained by applying abc/dq transformation (for more details refer to Appendix B.2) to the

natural frame inverter voltages, van, vbn, and vcn given in (5.6).

The discrete-time model for d and q-axis grid currents can be obtained from (5.8) for a

one-step prediction as follows:

[ idg(k + 1)

iqg(k + 1)

] = Φ

[ idg(k)

iqg(k)

] + Γi

[ vdi(k)

vqi(k)

] + Γg

[ vdg(k)

vqg(k)

] (5.10)

where Φ = eATs

Γi =

∫ Ts 0

eATsBidτ =A −1(Φ − I2x2)Bi

Γg =

∫ Ts 0

eATsBgdτ =A −1(Φ − I2x2)Bg.

(5.11)

106

5.2.2 Modeling of DC-link Capacitor Voltages

From the modeling presented in the Chapter 4, the discrete-time model for dc-link ca-

pacitor voltages can be obtained for j = 1, 2, 3 as:

vcj(k + 1) = vcj(k) + Ts Cdcj

icj(k + 1) (5.12)

where Ts is sampling time, and Cdc corresponds to the capacitance of dc-capacitors. The

current through the dc-capacitors is denoted as icj. The dc-link capacitor currents can be

expressed in terms of three-phase grid currents and gains K1x, K2x, and K3x as follows:

ic3(k + 1) = ∑

x=a,b,c

K3x(k + 1) ixg(k + 1)

ic2(k + 1) = ∑

x=a,b,c

K2x(k + 1) ixg(k + 1)

ic1(k + 1) = ∑

x=a,b,c

K1x(k + 1) ixg(k + 1).

(5.13)

The gains K1x, K2x, and K3x are based on the inverter switching states as demonstrated

below: K1x = sgn(0 − Sx) K2x = sgn(1 − Sx) sgn(Sx − 0) K3x = sgn(2 − Sx) sgn(Sx − 0) sgn(Sx − 1)

(5.14)

where sgn is a Signum function whose output value corresponds to −1 or 0 or +1.

The performance of the model in [281] and the model presented here are the same in

terms of the dc-link capacitor voltages balancing, but the number of online calculations can

be reduced with the presented method. The reason is that the gains K1x, K2x, and K3x can

be defined off-line along with the switching states.

From (5.10), it can be noticed that, the grid d and q-axis currents are a function of

inverter voltages, vdi and vqi. These inverter voltages (in natural frame) are related to the

switching signals as described in (5.5). Similarly, the models in (5.12)-(5.14) demonstrate

that the dc-link capacitor voltages are related to the switching signals. From the modeling

presented in this section, it can be concluded that, the grid currents and capacitor voltages

can be controlled by properly choosing a switching state.

107

5.3 Model Predictive Control

The proposed model predictive control scheme as represented in Fig. 5.5 is very easy and

intuitive to understand. The implementation procedure is presented as follows:

• Measure grid voltages, vag(k) and vbg(k), [vcg(k) = −vag(k) − vbg(k)]; grid currents iag(k) and ibg(k), [icg(k) = −iag(k) − ibg(k)]; and dc-link capacitor voltages vc1(k), vc2(k), vc3(k). In total 5 voltage sensors and two current sensors are required for a

three-phase balanced system (symmetrical grid voltages).

• Obtain grid voltage angle, θg(k) using synchronous reference frame phase-locked loop (SRF-PLL) [14] (for details refer to Appendix B.4).

• Convert grid voltages and currents from natural (abc) frame to synchronous (dq) frame, vdg(k), vqg(k), idg(k), iqg(k).

• Obtain q-axis reference current i∗qg(k) from Q∗g(k). By referring to (5.3), the i∗qg(k) can be calculated as:

i∗qg(k) = Q∗g(k)

−1.5 vdg(k) . (5.15)

• Obtain d-axis reference current i∗dg(k) which represents the active power of the system. Neglecting losses in the inverter, the active power Pg on ac-side equals dc-power and

it is expressed as follows [2]:

Pg = 3

2 vdg idg = vdc idc. (5.16)

During steady-state, the net dc-bus voltage, vdc is maintained at its reference value

v∗dc by the PI controller. The i ∗ dg(k) is generated by this PI controller according to the

operating conditions.

• Extrapolate reference currents from kth state to (k + 1) state. The fourth-order La- grange extrapolation method introduced in Section 3.3.4 is considered:

i∗dg(k + 1) = 4 i ∗ dg(k) − 6 i∗dg(k − 1) + 4 i∗dg(k − 2) − i∗dg(k − 3)

i∗qg(k + 1) = 4 i ∗ qg(k) − 6 i∗qg(k − 1) + 4 i∗qg(k − 2) − i∗qg(k − 3).

(5.17)

108

Q ∗ g( k )

S j x (k )

S j x (k

− 1 )

1 8

θ g (k )

v ∗ dc (k ) p .u .

v c 1 (k

+ 1 )

v c 2 (k

+ 1 )

v c 3 (k

+ 1 )

i q g (k

+ 1 )

i d g (k

+ 1 )

i d g (k )

i q g (k )

i∗ d g (k )

i∗ q g (k )

i∗ d g (k

+ 1 )

i∗ d g (k

+ 1 )

i∗ q g (k

+ 1 )

i∗ q g (k

+ 1 )

v d g (k )

v q g (k )

−1 .5 v d g (k )

i d c

R d c

v c 1 (k ) p .u .

v c 2 (k ) p .u .

v c 3 (k ) p .u .

v c 3 (k )

v c 2 (k )

v c 1 (k )

+++ −−−

− + +++

i a g (k )

i b g (k )

v a g (k ) v b g (k )

i a g

i b g

i c g

v a g

v b g

v c g

R a g

R b g

R c g

L a g

L b g

L c g

v ia v ib

v ic

λ d c

λ s w c

P I

P o w er

fl o w

P o w er

fl o w

C o st

F u n ct io n

M in im

iz a ti o n

L a g ra n g e

E x tr a p o la ti o n

P re d ic ti v e

M o d el

a bc / d q

T ra n sf o rm

a ti o n

S R F -P L L

F o u r- le v el

In v er te r

L o o k -U

p T a b le

F ig u re

5 .5 : P ro p o se d m o d el

p re d ic ti v e co n tr o l a lg o ri th m

fo r g ri d -t ie d fo u r- le v el

in v er te r.

109

• Predict the future behavior of the d and q-axis grid currents and dc-link capacitor voltages for all the possible switching states of the inverter using (5.10) and (5.12).

• Estimate λswc based on extrapolated reference currents i∗dg(k + 1) and i∗qg(k + 1).

• The predicted variables idg(k + 1), iqg(k + 1), vc1(k + 1), vc2(k + 1), vc3(k + 1), which are a function of switching signals, are used in the cost function. The gating signal

Sjx(k) (j = 1, 2, 3, x = a,b,c) which minimizes the cost function is chosen and applied

to the inverter directly. It should be noted that any additional modulation stage is not

required, unlike in the classical control techniques [2,14,69–71,94,292].

The control objectives of the proposed method are: (i) regulation of active power for

which the d-axis current is controlled; (ii) regulation of reactive power for which q-axis

current is controlled; (iii) balancing of dc-link capacitor voltages; and (iv) minimization

of switching frequency for which the number of switch changes are penalized.

All these goals are included in a quadratic cost function for one-step prediction as

follows: ggrid(k) = (i

∗ dg(k + 1) − idg(k + 1))2

+ (i∗qg(k + 1) − iqg(k + 1))2

+ λdc ∗ [vc1(k + 1) − vc2(k + 1)]2

+ λdc ∗ [vc2(k + 1) − vc3(k + 1)]2

+ λdc ∗ [vc1(k + 1) − vc3(k + 1)]2

+ λswc ∗ ∑

x=a,b,c

swcx

(5.18)

where λdc, and λswc are weighting factors for the dc-link capacitor voltages balancing

and switching frequency reduction, respectively. The swcx is the number of semicon-

ductor commutations involved in phase-x, which can be calculated as follows [77]:

swcx =| Sjx(k) − Sjx,op(k) |, j = 1, 2, 3, x = a, b, c (5.19)

where Sjx(k) is the predicted gating signal of phase-x, and Sjx,op(k) = Sjx(k−1) is the optimal gating signal of phase-x in the previous sample. When λswc > 0, the switching

frequency reduction can be achieved. In a similar manner, the dc-link capacitor voltages

balancing can be accomplished with λdc > 0.

110

5.4 Simulation Results

To validate the proposed control scheme, simulations are carried out using Simulink

software for different operating conditions with the parameters as indicated in Table 5.2. A

one-step prediction horizon is considered in all the simulation tests. Unless otherwise stated,

the cost function includes all four variables as mentioned in (5.18).

Table 5.2: Grid-tied four-level inverter and controller parameters

Simulation Experimental

Variable Description SI p.u. SI p.u.

Sg Apparent Power (kVA) 4000 1.0 5 1.0

vg Grid L-L rms Voltage (V) 4000 – 208 –

ig Grid rms Current (A) 577.35 1.0 13.88 1.0

fg Grid Frequency (Hz) 60 1.0 60 1.0

Rg Filter Resistance (Ω) 0.042 0.0105 0.091 0.0105

Lg Filter Inductance (mH) 2.1 0.2 4.6 0.2

Cdc DC-link Capacitance (μF) 2596 3.914 1200 3.914

v∗dc Ref dc-bus Voltage (V) 7071 3.062 368.0 3.062 Rdc DC-link Resistance (Ω) 0.4624 0.1156 1 0.1156

Rx External Resistance (Ω) 46.24 11.56 100 11.56

λdc Weight Factor 0.5 – 0.25 –

kP , kI PI Parameters 1&200 – 1&200 –

Ts Sampling Time (s) 90 μ – 90 μ –

Base Values

vbg Base rms Voltage (V) 2309.4 1.0 120 1.0

ibg Base rms Current (A) 577.35 1.0 13.88 1.0

Zbg Base Impedance (Ω) 4.0 1.0 8.6528 1.0

Lbg Base Inductance (mH) 10.6 1.0 23.0 1.0

Cbg Base Capacitance (μF) 663.15 1.0 306.56 1.0

Table 5.3: Summary of simulation steady-state analysis

Case i∗dg(p.u.) Q ∗ g(p.u.) %eig %THD %evc fsw(Hz)

A1 1.0 0 3.26 3.20 1.02 798

A2 0.8 −0.6 3.68 3.88 1.41 799 A3 0.8 0.6 3.09 2.92 1.39 804

A4 0 0 −− −− 0.03 798 A5 0 −1 2.18 2.07 0.96 804 A6 0 1 4.19 3.15 1.78 800

111

5.4.1 Steady-state Analysis

The steady-state analysis has been carried out for different d and q-axis reference currents

as summarized in Table 5.3. The performance assessment parameters %eig, %THD, %evc

and fsw are calculated according to the guidelines given in Appendix C. The battery voltage

E is adjusted as follows to obtain different d-axis reference currents:

E = v∗dc + [i ∗ dg(p.u.) × ibg × Rdc]. (5.20)

With the grid voltage orientation, the vdg equals to the peak grid voltage and vqg becomes

zero during all operating conditions as shown in Fig. 5.6. The inverter phase voltage [refer

to (5.5)] is also shown where it contains four levels: 0, vdc/3, 2vdc/3 and vdc. The operating

condition A1 corresponds to the pure active power injection into the grid, which is the

most common scenario in WECS [2]. The grid current is maintained in phase with the grid

voltage as shown in Fig. 5.6(a)-(i). The active power component of the grid current, idg

equals peak grid current and the reactive power component of grid current, iqg becomes zero

as demonstrated in Fig. 5.6(a)-(i). With Qg = 0, the grid apparent power, Sg becomes

equal to the grid active power, Pg as shown in Fig. 5.6(a)-(ii). The net dc-bus voltage, vdc

is maintained at its reference value with the perfect balancing of the capacitor voltages as

shown in Fig. 5.6(a)-(iii). The dc-link capacitor voltage deviation can be further reduced

by increasing the λdc, but at the expense of higher %eig and %THD. With λswc = 0, the

switching frequency is found to be 1338 Hz. By using λswc = 1280 (obtained from look-up

table), the switching frequency, fsw is reduced to 798 Hz. The reduced active power delivery

with leading and lagging power factors are analyzed in Case A2 and A3, respectively. Case

A4 corresponds to the operation of the WECS below the cut-in wind speed, where the active

power generated and delivered to the grid is zero.

The fault ride-through capability of the proposed inverter is shown in Case A5. According

to the grid codes [12,17], the high power WECS should remain connected to the grid during

the grid faults and inject pure leading reactive power to help the grid recover from the fault

[293]. The detection of grid fault and generation of corresponding current references [67] is

beyond the scope of this paper. For simplicity, the current references are set by the user. The

grid current leads the voltage by 90◦ as shown in Fig. 5.6(b)-(i). The idg becomes zero and

the iqg becomes equal to the peak grid current. The active power is maintained at zero as

112

shown in Fig. 5.6(b)-(ii), and the grid apparent power becomes equal to the absolute reactive

power. The dc-link capacitor voltages are well-balanced, as shown in Fig. 5.6(b)(iii). This

demonstrates the effectiveness of the proposed method to meet the grid codes. The injection

of pure lagging reactive power, although rare in WECS, has been studied in A6. The inverter

switching frequency fsw variation is maintained in the range of 750-850 Hz during all the

operating conditions while maintaining acceptable power quality and reference tracking.

vag

iag i∗ag

vdg

vqg

idg

iqg

vaN

vdc 2vdc/3

vdc/3

φg=0 ◦

SgPg

Q∗g Qg

v∗dc vdc

vc1 vc2 vc3

(i)

(ii)

(iii)

+2kV

−2kV

+ 1 k A

0 −1

k A

+2M

+4M

−2M −4M

2kV

4kV

6kV

8kV

0 0.5T T 1.5T 2T 2.5T 3T Time (s)

Scale: k=103, M=106, T=1/60

(a) case-A1: i∗dg = 1.0 p.u. and Q ∗ g = 0 p.u.

vag

iagi∗ag

vdg

vqg

idg

iqg

vaN

vdc 2vdc/3

vdc/3

φg=90 ◦ lead

Sg Pg

Q∗g Qg

v∗dc vdc

vc1 vc2 vc3

(i)

(ii)

(iii)

+2kV

−2kV

+ 1 k A

−1 k A

+2M

+4M

−2M −4M

2kV

4kV

6kV

8kV

0 0.5T T 1.5T 2T 2.5T 3T Time (s)

Scale: k=103, M=106, T=1/60

(b) case-A5: i∗dg = 0 p.u. and Q ∗ g = −1.0 p.u.

Figure 5.6: Simulation results during steady-state operation.

113

5.4.2 Transient Analysis

To analyze the decoupled nature of the d and q-axis currents, transient analysis has been

carried out with trapezoidal changes in the Q∗g. The d-axis reference current is set to 0.8

p.u. As shown in Fig. 5.7(a), the grid power factor changes in the order of: unity-leading-

unity-lagging. The grid reactive power tracks to its reference within small interval and no

overshoots. The decoupled control for active and reactive powers (thus for d and q-axis

currents, respectively) has been achieved, as shown in 5.7(b). The net dc-bus voltage control

and dc-link capacitor voltages balancing have been achieved as shown in 5.7(c).

vag

iag

i∗ag

vdg

vqg

idg

iqg

vaN

vdc 2vdc/3

vdc/3

φg=36.8 ◦ lead φg=36.8◦ lag

φg=0 ◦

SgPg

Q∗g Qg

v∗dc vdc

vc1 vc2 vc3

(a)

(b)

(c)

+2kV

−2kV

+ 1 k A

−1 k A

+2M

+4M

−2M −4M

2kV

4kV

6kV

8kV

0 0.5T T 1.5T 2T 2.5T 3T Time (s)

Scale: k=103, M=106, T=1/60

Figure 5.7: Simulation results during transient operation.

114

5.4.3 DC-link Dynamics

The dc-link dynamics are studied and presented in Fig. 5.8. In order to verify the

proposed dc-link capacitor voltages balancing algorithm, an external resistor Rx (11.46 p.u.)

is deliberately connected across the dc-link capacitor Cdc3 at time t = 1/60 s. The d and

q-axis current references are the same as in the Case A1. Even with the step-connection of

the resistor, the controller takes action in a few sampling instants, and thus the capacitor

voltages continue to be balanced as shown in Fig. 5.8(a). The current through the resistor,

iRx is found to be 11.33 % of the base current. It is important to note that the grid currents

continue to track to their references during this process.

As shown in Fig. 5.8(b), another test has been conducted where the weighting factor

λdc is suddenly changed from 0.5 to zero at t = 0.2 s. With no penalty to the dc-link

capacitor voltages balancing, the vc1 and vc3 gradually increases and vc2 gradually decreases

and becomes zero at t = 0.24 s. At the time t = 0.5 s, the weighting factor has been changed

to 0.5 and the dc-link capacitor voltages become balanced, with an acceptable recovery time

of 0.06 s. These results validate the proposed dc-link modeling and control.

iRx

v∗dcvdc

vc1 vc2 vc3

2kV

4kV

6kV

8kV

20A

40A

60A

0 0.5T T 1.5T 2T 2.5T 3T Time (s)

(a) With a resistor across Cdc3

v∗dcvdc

vc1

vc2

vc3

2kV

4kV

6kV

8kV

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 Time (s)

(b) With and without the weighting factor λdc

Figure 5.8: Simulation analysis for dc-link capacitor voltages balancing.

115

5.4.4 Switching Frequency Regulation

The variable switching frequency nature of the predictive control is studied with respect

to the i∗dg and Q ∗ g, and presented in Fig. 5.9. The switching frequency increases linearly with

the d-axis grid current. The fsw becomes greater with the negative reactive power compared

to the positive reactive power. Without the weight factor λswc, the switching frequency is

found to vary in a range of 1800-900 Hz as shown in Fig. 5.9(a). To overcome this issue,

weighting factors are designed as shown in Fig. 5.9(c). The knowledge for the design has

been obtained from the Fig. 5.9(a) and guidelines given in [247]. Observation demonstrates

that these values hold a linear relation to the active and reactive powers. These values are

stored in a lookup table, for online use, and as a result the switching frequency has been

maintained within the 750-850 Hz range, during all the operating conditions, as shown in Fig.

5.9(b). It should be noted that the previously discussed steady-state results are obtained by

including this online look-up table, and thus the switching frequency is maintained in the

range of 750-850 Hz during all operating conditions as summarized in Table 5.3.

The %THD performance of a four-level inverter with respect to the switching frequency

for the proposed grid-tied and resistive load [281] cases are investigated and presented in Fig.

5.10. The case-A1 is considered for grid-tied application. For a resistive load, the controller

is implemented in a stationary reference frame (αβ) with the parameters as provided in Table

5.2. The load resistance value is set as a base impedance (Zbg) of the system. For the grid-

tied case, the weighting factor λswc is changed from 0-20000 and the switching frequency is

reduced from 1338 to 105 Hz and the THD is increased from 2.27 % to 14 %. For the resistive

load case, the λswc is changed from 0-10000. The fsw is reduced from 1333 to 102 Hz with

the increase in THD from 2.18 % to 14 %. The difference between both cases is found to be

small during the entire switching frequency range. It should be noted, for both the cases,

that a significant reduction in switching frequency from 1330 to 600 Hz has been achieved,

with a slight increase in THD from 2.2 % to 4.1 %.

116

− 1.0

− 0.8

− 0.6

− 0.4

− 0.2

1.00.80.60.40.2

0 1. 0 0. 8 0. 6 0. 4 0. 2

Q ∗ g (p.

u.)

f s w (H

500

1000

1500

2000

i ∗ dg (p.u.)

(a) Without λswc

− 1.0

− 0.8

− 0.6

− 0.4

− 0.2

1.00.80.60.40.2

0 1. 0 0. 8 0. 6 0. 4 0. 2

Q ∗ g (p.

u.)

f s w (H

500

1000

1500

2000

i ∗ dg (p.u.)

(b) With λswc

− 1.0

− 0.8

− 0.6

− 0.4

− 0.2

1.00.80.60.40.2

0 1. 0 0. 8 0. 6 0. 4 0. 2

Q ∗ g (p.

u.)

λ s w c

500

1000

1500

2000

i ∗ dg (p.u.) (c) Weighting factor λswc

Figure 5.9: Simulation results for switching frequency variation with respect to i∗dg and Q ∗ g.

Switching Frequency, fsw

With Resistive Load

With Grid Connection

% T H D

1400 1200 1000 800 600 400 200

Figure 5.10: Comparison of %THD for 4L-inverter with grid-tied and resistive load cases.

117

5.5 Experimental Implementation and Validation

5.5.1 Experimental Setup

The experimental setup for the grid-tied four-level inverter is shown in Fig. 5.11 with the

parameters as indicated in Table 5.2. The control algorithm has been implemented using

a host PC running with MATLAB-Simulink 2006a software through Real-Time Interface

(RTI). The dSPACE DS1103 controller is used to handle the control processes such as grid

current prediction, dc-link capacitor voltages balancing and cost function minimization. The

grid currents and dc-link voltages are measured by LEM LA55-P and LV25-P transducers,

respectively. Feedback from the sensors has been sent to the controller through the CP1103

I/O connector. The prototype has been built by Semikron SKM75GB123D dual-pack IGBT

modules. The IGBT gate drivers are based on four SKHI22B dual cores which are powered

with a 0/15 V supply. An interface board with MC14504BCP and TLP521-4 is used between

the dSPACE and SKHI22B gate drivers for TTL to CMOS logic conversion and signal

isolation, respectively. The dc power supply (E) has been obtained by Xantrex XDC-600-

20. The inverter is connected to the grid through an isolation transformer and its impedance

is added to the filter values.

4-Level Inverter

Interface Board

DC Power Supply

Host PC

DS1103 R&D controller

CP1103

Sensors

Oscilloscopes

3-Phase Grid

L Filter

Isolation Transformer

Figure 5.11: Photograph of experimental setup.

118

5.5.2 Delay Compensation

To verify the predictive control algorithm through MATLAB simulations [281], one-step

prediction can be used as shown in Fig. 5.12(a). This is ideal case where the delay is

zero between the instant measurements are made and the instant new switching state is

applied [77]. The switching state which minimizes the error at (k+1) instant is selected and

applied at (k) instant. In the experimental verification, the delay provided by the digital

signal processor, gate drivers, and switching devices is inevitable. The computational delay

provided by the digital signal processor is most significant, and this must be compensated for.

This delay can easily be compensated for by calculating the cost function with a modified

one-step prediction [248,249] as shown in Fig. 5.12(b). The optimal switching state from the

previous iteration is used to “estimate” the variables at (k + 1) instant and all the possible

switching states are used to “predict” the variables at (k + 2) instant. The switching state

which minimizes the error at the (k + 2) instant is selected and applied at sampling instant

(k + 1). With this approach, one sampling period will be available for calculations.

k k + 1 k + 2

(a) Without delay compensation [281]

k k + 1 k + 2

6464

(b) With delay compensation [248,249]

Figure 5.12: Prediction of four-level inverter control variables.

The control algorithm with this approach of control delay compensation is shown in Fig.

5.13. The measured grid and dc-link signals, along with the optimal gating signals, are used

by the predictive controller. The variables at (k+1) instant are estimated using the optimal

values obtained from the previous iteration. This is demonstrated as follows:

119

Measurement

vc(k), vg(k), ig(k)

Estimate

θg(k), vdg(k), vqg(k)

idg(k), iqg(k)

Apply

Sjx,op(k), j = 1, 2, 3, x = a,b,c

K1x,op(k), K2x,op(k), K3x,op(k)

vdi,op(k), vqi,op(k)

Estimation of Variables at (k + 1) Instant

îdg(k + 1), îqg(k + 1), v̂c(k + 1)

Using (5.21) and (5.22)

i = 0

gop = ∞

i = i + 1

Predictive Variables at (k + 2) Instant

idg(k + 2), iqg(k + 2), vc(k + 2)

Using (5.23) and (5.24)

Calculation of Cost Function

ggrid(k + 1)

Using (5.25)

i = 64? No

Yes

Select iop

gop = min {gi}i=1...64 iop = i |gop

Figure 5.13: Predictive current control and dc-link capacitor voltages balancing algorithm with delay compensation.

120

[ îdg(k + 1)

îqg(k + 1)

] = Φ

[ idg(k)

iqg(k)

] + Γi

[ vdi,op(k)

vqi,op(k)

] + Γg

[ vdg(k)

vqg(k)

] (5.21)

v̂cj(k + 1) = vcj(k) + Ts Cdcj

∑ x=a,b,c

Kjx,op ixg. (5.22)

The algorithm is initialized by setting the switching state number i to 0 and optimal g

value to ∞. The algorithm then enters the loop. The predictive variables at (k + 2) instant are calculated as follows:[

idg(k + 2)

iqg(k + 2)

] = Φ

[ îdg(k + 1)

îqg(k + 1)

] + Γi

[ vdi(k + 1)

vqi(k + 1)

] + Γg

[ vdg(k + 1)

vqg(k + 1)

] (5.23)

vcj(k + 2) = v̂cj(k + 1) + Ts Cdcj

∑ x=a,b,c

Kjx ixg. (5.24)

In (5.23), vdg(k+1) and vqg(k+1) are extrapolated grid voltages and they can be obtained

similar to (5.17). For stiff-grid, vdg(k) = vdg(k + 1) and vqg(k) = vqg(k + 1) and thus no

extrapolation is needed. The predicted variables at (k +2) instant are evaluated 64 times by

a cost function ggrid(k + 1). The switching state, which produces a minimal value of gop, is

chosen and applied to the inverter directly. The cost function ggrid(k + 1) can be calculated

by shifting the variable in (5.19) one-step forward as follows:

ggrid(k + 1) = (i ∗ dg(k + 2) − idg(k + 2))2

+ (i∗qg(k + 2) − iqg(k + 2))2

+ λdc ∗ [vc1(k + 2) − vc2(k + 2)]2

+ λdc ∗ [vc2(k + 2) − vc3(k + 2)]2

+ λdc ∗ [vc1(k + 2) − vc3(k + 2)]2

+ λswc ∗ ∑

x=a,b,c

swcx.

(5.25)

The reference currents at (k + 2) instant can be obtained by the Lagrange extrapolation

as follows [259]:

i∗dg(k + 2) = 10 i ∗ dg(k) − 20 i∗dg(k − 1) + 15 i∗dg(k − 2) − 4 i∗dg(k − 3)

i∗qg(k + 2) = 10 i ∗ qg(k) − 20 i∗qg(k − 1) + 15 i∗qg(k − 2) − 4 i∗qg(k − 3).

(5.26)

121

5.5.3 Selection of Sampling Time

For a four-level inverter, 64 switching states are available and the proposed predictive

control method incurs a large number of calculations to predict the future behavior of grid

currents and dc-link capacitor voltages. The execution times for a two-level inverter with

8 switching states [262] and three-level inverter with 27 switching states [279] are reported

as 7 μs and 52 μs, respectively. The minimum execution time of 63 μs is achieved for the

proposed control system. It is observed that the predictive control algorithm as shown in

Fig. 5.13 took 31 μs only. The tasks such as measurement of signals, grid voltage orientation,

detection of grid voltage angle, online estimation of weighting factors, calculation of reference

currents, and online performance assessment took 32 μs. The authors in [294] suggested that

the weighting factor-based switching frequency reduction is more efficient compared to the

selection of higher sampling times. With this recommendation, and considering a high power

application, the sampling time (Ts) of 90 μs or 11.11 kHz sampling frequency is selected.

5.5.4 Experimental Results

The experimental results are obtained with the modified one-step prediction [Fig. 5.12(b)].

Since the predictive controller uses the SI parameters, the weighting factors used in the ex-

periments are different from the simulations, but their impact on the controller remains

the same. The steady-state analysis has been carried out similar to the simulations and

summarized in Table. 5.4.

Table 5.4: Summary of experimental steady-state analysis

Case i∗dg(p.u.) Q ∗ g(p.u.) %eig %THD %evc fsw(Hz)

A1 1.0 0 4.83 4.16 0.58 804

A2 0.8 −0.6 4.55 4.41 0.71 796 A3 0.8 0.6 3.76 3.74 0.59 811

A4 0 0 −− −− 0.13 800 A5 0 −1 3.35 3.58 0.29 808 A6 0 1 4.97 4.03 0.79 807

Due to the modified one-step prediction, the number of calculations are increased, and

as a result, the switching frequency is increased in all the cases [248]. For instance, for Case

A1 with λswc = 0, the fsw through simulation studies is 1338 Hz and in the experimental

122

implementation it is found to be 1736 Hz. By using λswc = 1.9 (obtained through the look-

up table) in experiments, the switching frequency is reduced to 804 Hz. The higher current

tracking error in experiments can be attributed to the delay provided by the sensors and

IGBT gate drivers and losses in the system. The experimental results presented in Figs.

5.14(a), 5.14(b), and 5.15 are similar to the simulation results with the perfect regulation of

the dc-link voltages and grid currents.

vag

iag

idg

iqg φg=0

◦

Sg Pg Qg

vaN

vdc

vc1 vc2 vc3

(i)

(ii)

(iii)

Ch1: 50 V/div, Ch2 to Ch4: 20 A/div, t=5 ms/div

Ch1 to Ch3: 2500 V/div, Ch4: 200 V/div, t=5 ms/div

Ch1 to Ch3: 50 V/div, Ch4: 100 V/div, t=5 ms/div

(a) Case-A1: i∗dg = 1.0 p.u. and Q ∗ g = 0 p.u.

vag

iagidg

iqg

φg=90 ◦ lead

Sg Pg

Qg vaN

vdc

vc1 vc2 vc3

(i)

(ii)

(iii)

Ch1: 50 V/div, Ch2 to Ch4: 20 A/div, t=5 ms/div

Ch1 to Ch3: 2500 V/div, Ch4: 200 V/div, t=5 ms/div

Ch1 to Ch3: 50 V/div, Ch4: 100 V/div, t=5 ms/div

(b) Case-A5: i∗dg = 0 p.u. and Q ∗ g = −1.0 p.u.

Figure 5.14: Experimental results during steady-state operation.

123

vag

iag

idgiqg

φg=36.8 o lead

φg=0 o

φg=36.8 o lag

Sg Pg

Qg vaN

vdc

vc1 vc2 vc3

(i)

(ii)

(iii)

Ch1: 50 V/div, Ch2 to Ch4: 20 A/div, t=5 ms/div

Ch1 to Ch3: 2500 V/div, Ch4: 200 V/div, t=5 ms/div

Ch1 to Ch3: 50 V/div, Ch4: 100 V/div, t=5 ms/div

Figure 5.15: Experimental results during transient operation.

The dc-link dynamics, with the external resistor Rx across Cdc1, is shown in Fig. 5.16(a).

Similar to the simulations, the balancing of the dc-link capacitor voltages have been main-

tained even with the step-connection of the resistor. During the step change, transients can

be noticed by looking into the current waveform iRx. The dc-link voltage drops slightly and

recovers back to normal within 1 ms. Similar to the simulations, the current iRx is found to

be 11.33 % of the base current.

124

iRx

vc1 vc2 vc3

Ch1 to Ch3: 50 V/div, Ch4: 200 mA/div, t=5 ms/div

(a) With a resistor across Cdc3

vdc

vc1

vc2

vc3

Ch1 to Ch3: 50 V/div, Ch4: 100 V/div, t=80 ms/div

(b) With and without the weighting factor λdc

Figure 5.16: Experimental results for dc-link capacitor voltages balancing.

− 1.0

− 0.8

− 0.6

− 0.4

− 0.2

1.00.80.60.40.2

0 1. 0 0. 8 0. 6 0. 4 0. 2

Q ∗ g (p.

u.)

f s w (H

1000

2000

3000

4000

i ∗ dg (p.u.)

(a) Without λswc

− 1.0

− 0.8

− 0.6

− 0.4

− 0.2

1.00.80.60.40.2

0 1. 0 0. 8 0. 6 0. 4 0. 2

Q ∗ g (p.

u.)

f s w (H

500

1000

1500

2000

i ∗ dg (p.u.)

(b) With λswc

− 1.0

− 0.8

− 0.6

− 0.4

− 0.2

1.00.80.60.40.2

0 1. 0 0. 8 0. 6 0. 4 0. 2

Q ∗ g (p.

u.)

λ s w c

i ∗ dg (p.u.) (c) Weighting factor λswc

Figure 5.17: Experimental results for switching frequency variation with respect to i∗dg and Q∗g.

125

The relation between the λdc and the capacitors balancing have been verified experimen-

tally and presented in Fig. 5.16(b). The divergence and convergence of capacitor voltages

are similar to the simulation results. The settling time of capacitor voltages is found to be

the same as those of the simulations.

The switching frequency variation with respect to the i∗dg and Q ∗ g is presented in Fig.

5.17(a) and it is noticed to vary in the range of 1000-2580 Hz. To deal with the lower power

prototype, a scaling has been done to evaluate the weighting factor λswc as presented in Fig.

5.17(c). Similar to the simulations, the switching frequency is maintained in the range of

750-850 Hz as shown in Fig. 5.17(b).

5.6 Conclusion

In this chapter, a voltage-oriented FCS-MPC strategy is proposed for the grid-tied 4L-

inverter for use in high power WECS. The proposed methodology can be simply extended

for any level grid-tied inverter. The future behavior of the control variables for each of

the 64 possible switching states has been predicted. The switching state which minimizes

the cost function is selected and then applied directly to the inverter gating terminals. The

simulation and experimental results are in a close relationship and thus validate the proposed

methodology. The major contributions of this work are summarized as follows:

• The d and q-axis grid currents are tightly regulated during different active and reactive power conditions using an intuitive approach. The internal current PI controllers and

modulation stage are eliminated and as a result, a good dynamic response has been

achieved.

• An intuitive modeling and control for the dc-link capacitor voltages balancing is pre- sented and verified.

• A lookup table based weighting factor design is proposed by which the switching fre- quency is regulated between 750 and 850 Hz during different active and reactive power

references, and this has been achieved without any software or hardware reconfigura-

tion.

126

Chapter 6

Model Predictive Decoupled Active

and Reactive Power Control for

Grid-Tied Diode-Clamped Inverters

In the Chapter 5, the predictive current control of grid-tied diode-clamped inverters

(DCIs) was presented. In this chapter, another approach is proposed to directly control the

grid active and reactive powers, assuming that the generator-side converter regulates the net

dc-bus voltage. A 4L-DCI is considered to present the analysis and results, and the proposed

concept can easily be extended to any-level DCI using the guidelines given in Chapter 4. To

predict the future behavior of active and reactive grid powers, dc-link capacitor voltages, and

number of switch changes, a discrete-time model of the inverter is developed in synchronous

reference frame (SRF). The controller uses all the possible switching states of the inverter

for the prediction and evaluates them using a cost function.

During a step change in reference control variables, the vector angle extrapolation method

[261] exhibits better performance than the Lagrange extrapolation method [221]. However

it is not suitable for the SRF references. In this chapter, a novel extrapolation method is

presented to deal with the extrapolation of SRF references. This method is analyzed during

step-changes in grid active and reactive power references. The performance of the proposed

method is investigated with the perturbations in the grid-side filter and dc-link parameters.

The feasibility of the proposed method is verified through simulation and experimental results

showing good dynamic and steady-state performance.

127

6.1 Proposed Control Strategy

The proposed model predictive decoupled active and reactive power control scheme is

shown in Fig. 6.1. The wind turbine, generator, and rectifier with the net dc-bus voltage

control are represented by a constant dc-voltage source (battery). A diode is inserted between

the battery and dc-link to perform isolation and unidirectional power flow. In commercial

wind turbines, there is no need to incorporate the diode in the circuit. The top capacitor

voltage corresponds to vc1 which is a different notation from the works presented in the

Chapters 4 and 5. The reference reactive power command (Q∗g) is provided by the grid

operator, and the active power reference (P∗g ) is obtained by the maximum power point

tracking (MPPT) algorithm. In commercial wind turbines, the MPPT is performed using

the wind turbine characteristics and measured (using Anemometer) wind speed.

P∗g (k)

vw(k)

Q∗g(k) Pg(k + 1)

Qg(k + 1)

P∗g (k + 1)

Q∗g(k + 1)

S(k)

vc1(k)

vc2(k)

vc3(k)

vc1(k + 1)

vc2(k + 1)

vc3(k + 1)

idg(k)

iqg(k)

vdg(k) vqg(k)

vdg(k + 1)

vqg(k + 1)

vdg(k)

vqg(k)

D vc1(k)

vc2(k)

vc3(k)

ig(k) vg(k)

Lga,b,c

Cost Function

Minimization Extrapolation

Discrete-time

Predictive

Controller

abc/dq θg(k)

θg(k)

SRF

PLL

MV Grid

Grid

Anemometer

Operator MPPT

G en er a to r- si d e C o n v er te r w it h

N et

d c- b u s V o lt a g e C o n tr o l

Figure 6.1: Proposed decoupled active and reactive power control with dc-link capacitor voltages balancing for a grid-tied 4L-DCI.

128

To simplify the analysis, the per-unit (p.u.) P∗g is considered to be a cubic of per-unit

wind speed [2]:

p.u. P∗g (k) ∝ p.u. v3w(k). (6.1)

From the continuous time models given for the grid active and reactive powers in eq.(5.3),

the discrete-time models can be derived for a one-step horizon time (k + 1) as demonstrated

below:

Pg(k + 1) = 3

2 [vdg(k + 1) idg(k + 1)]

Qg(k + 1) = 3

2 [vdg(k + 1) iqg(k + 1)]

(6.2)

where vdg(k+1) and vqg(k+1) are the extrapolated grid voltages. For a stiff grid, vdg(k+1) =

vdg(k) and vqg(k + 1) = vqg(k), and thus no extrapolation is needed. For weak grids the

fourth-order Lagrange extrapolation method given in eq.(5.17) can be used. idg(k + 1) and

iqg(k + 1) are the predicted dq-axis grid currents:[ idg(k + 1)

iqg(k + 1)

] = Φ

[ idg(k)

iqg(k)

] + Γi

[ vdi(k + 1)

vqi(k + 1)

] + Γg

[ vdg(k)

vqg(k)

] (6.3)

where vdi(k + 1) and vqi(k + 1) are the predicted inverter voltages in (k + 1) state using the

64 possible switching states. The Φ, Γi and Γg are discrete-time parameter matrices which

can be computed off-line as given in (5.11). The calculation of three-phase inverter voltages

is presented below for the capacitor voltages notation used in this work:

vaN = vc1S1a + vc2S2a + vc3S3a

vbN = vc1S1b + vc2S2b + vc3S3b

vcN = vc1S1c + vc2S2c + vc3S3c.

(6.4)

The above natural frame (abc) inverter voltages can be converted to synchronous frame

(dq) using the transformation matrix given in Appendix B.2.

The discrete-time model for dc-link voltages is given as follows:

vc1(k + 1) = vc1(k) + Ts Cdc1

ic1(k + 1)

vc2(k + 1) = vc2(k) + Ts Cdc2

ic2(k + 1)

vc3(k + 1) = vc3(k) + Ts Cdc3

ic3(k + 1)

(6.5)

129

where ic1(k + 1), ic2(k + 1), and ic3(k + 1) are predicted dc-link currents which can be

calculated as follows: ic1 = K1d idg + K1q iqg

ic2 = K2d idg + K2q iqg

ic3 = K3d idg + K3q iqg

(6.6)

where K1d, K1q, K2d, K2q, K3d, and K3q are variables in SRF and they can be obtained

from natural frame gains and grid voltage angle, θg. It should be noted that the capacitor

currents are mean values. The natural frame gains can be expressed in terms of switching

states as follows: K1x = sgn(3 − Sx) K2x = sgn(2 − Sx) K3x = sgn(1 − Sx)

(6.7)

where x = a,b,c. K1x, K2x, K3x ∈ {−1, 0, 1} and sgn is a Signum function. The modeling of dc-link voltages in SRF gives flexibility in digital implementation. This will be further

discussed in Section 6.3.

The control objectives, such as regulation of active and reactive powers, dc-link capacitor

voltages balancing and switching frequency minimization are included in a cost function as

follows:

ggrid(k + 1) = ||P∗g (k + 1) − Ppg (k + 1)|| + ||Q∗g(k + 1) − Qpg(k + 1)|| + λdc ∗ ([vpc1(k + 1) − vpc2(k + 1)]2

+ [v p c2(k + 1) − vpc3(k + 1)]2

+ [v p c3(k + 1) − vpc1(k + 1)]2)

+ λswc ∗ (swca + swcb + swcc)

(6.8)

where λdc and λswc are weighting factors for the capacitor voltages balancing and switching

frequency reduction, respectively. The swcx is the number of semiconductor commutations

involved in phase-x, which can be calculated as given in Table. 4.4.

The cost function requires reference powers in the (k+1) state. When the sampling time

Ts is sufficiently small (< 20 μs), no extrapolation is required. In this work, a sampling time

of 100 μs is used to deal with the 64 switching states. At this higher sampling time, the

130

reference powers should be extrapolated to the (k + 1) state for high performance control.

During the steady-state operation, no extrapolation is required, as the reference powers are

dc quantities. In practical WECS, the wind speed, and thus the active power reference,

changes dynamically and as a result an extrapolation method should be used.

The Lagrange extrapolation [221, 257] can be used. However, this method produces

unnecessary spikes during the step changes [77]. The vector angle extrapolation [261] method

overcomes this issue [77]. But this method is based on real and imaginary (stationary frame,

α,β) quantities. To use vector angle extrapolation to manage active and reactive powers,

the following procedure should be used:

• Estimate i∗dg(k) and i∗qg(k) from P∗g (k) and Q∗g(k) using (5.3)

• Estimate i∗αg(k) and i∗βg(k) from i∗dg(k) and i∗qg(k)

• Extrapolate i∗αg(k) and i∗βg(k) to i∗αg(k + 1) and i∗βg(k + 1) using vector angle method

• Estimate i∗dg(k + 1) and i∗qg(k + 1) from i∗αg(k + 1) and i∗βg(k + 1), and

• Estimate P∗g (k + 1) and Q∗g(k + 1) from i∗dg(k + 1) and i∗qg(k + 1) using (5.3)

As shown in the above example, this is a complex approach and increases the computa-

tional burden. To overcome this issue, a simplified extrapolation method is proposed. Since

the reference active and reactive powers are of dc quantities, they can be simply extrapolated

to the (k + 1) state as follows:

P∗g (k + 1) = P ∗ g (k − 1)

Q∗g(k + 1) = Q ∗ g(k − 1)

(6.9)

Comparing the proposed approach with the Lagrange extrapolation given in (5.17), this

uses only one a past value, which can be simply implemented using the “Variable Time

Delay” block in the MATLAB/Simulink environment. This approach gives the same result

as the vector angle extrapolation, but with a lower computational burden, especially in SRF.

131

6.2 Simulation Results

To validate the proposed control scheme, simulations are carried out using MATLAB/-

Simulink software with the parameters as indicated in Table 6.1. The dc-link diode (D) is

assumed to be ideal with the zero forward voltage drop. Unless otherwise stated, the cost

function includes all four variables as mentioned in (6.8).

Table 6.1: Grid-tied four-level inverter parameters

Simulation Experimental

Variable Description SI p.u. SI p.u.

Sg Apparent Power (kVA) 4000 1.0 5 1.0

vg Grid L-L rms Voltage (V) 4000 – 208 –

ig Grid rms Current (A) 577.35 1.0 13.88 1.0

fg Grid Frequency (Hz) 60 1.0 60 1.0

Rg Filter Resistance (Ω) 0.042 0.0105 0.091 0.0105

Lg Filter Inductance (mH) 2.1 0.2 4.6 0.2

Cdc DC-link Capacitance (μF) 10200 15.33 4700 15.33

v∗dc Ref dc-link Voltage (V) 7071 3.062 367 3.062 E Battery Voltage (V) 7071 3.062 373 3.108

Rx External Resistance (Ω) 46.24 11.56 100 11.56

Cx External Capacitance (μF) 10200 15.33 4700 15.33

λdc Weight Factor 500 – 150 –

λswc Weight Factor 30000 – 5 –

Ts Sampling Time (s) 100 μ – 100 μ –

Base Values

vbg Base rms Voltage (V) 2309.4 1.0 120 1.0

Zbg Base Impedance (Ω) 4.0 1.0 8.6528 1.0

Lbg Base Inductance (mH) 10.6 1.0 23.0 1.0

Cbg Base Capacitance (μF) 663.15 1.0 306.56 1.0

6.2.1 Transient Analysis

The simulation results with different active and reactive power references are shown in

Fig. 6.2. The wind speed (vw) profile is shown in Fig. 6.2(a), and it increases linearly from

a cut-in wind speed of 3 m/s (0.25 p.u.) and reaches the rated value of 12 m/s (1 p.u.) at

t = 0.6 s. A step change in wind speed from 12 to 10.12 m/s (0.8434 p.u.) is applied at

t = 0.8 s.

132

The reference active power P∗g and measured active power Pg are shown in Fig. 6.2(b).

The P∗g is proportional to the wind speed and changes from 4 MW (1 p.u.) to 2.4 MW (0.6

p.u.) at t = 0.8 s. The active power tracks to its reference very well during the transient and

steady-state conditions. The reference and grid reactive powers are depicted in Fig. 6.2(c).

A step change in Q∗g from 0 to 1.2 MVAR (0.3 p.u.) is applied at t = 1.0 s. At t = 1.5

s, another step change in Q∗g is applied from 0 to -2.8 MVAR (-0.7 p.u.). During the time

intervals, (1 to 1.3s) and (1.5 to 1.8s), the grid apparent power, Sg is found to be 2.6833

MVA (0.671 p.u.) and 3.6878 MVA (0.922 p.u.), respectively. The phase-a grid current, iag

magnitude is proportional to the Sg as shown in Fig. 6.2(d).

The net dc-bus voltage, vdc is maintained at its reference value by the battery supply as

shown in Fig. 6.2(e). The balancing of capacitor voltages has been achieved during different

active and reactive power references as demonstrated in Fig. 6.2(f). From these results, it

can be established that the grid active and reactive powers can be controlled in a decoupled

manner, similar to the classical control schemes, but with a simpler approach.

v w (m

/ s) SS1

SS2

−5 0

(a) Wind speed profile

Pg P ∗ g

P ∗ g ,P

g (M

W )

−2 0

(b) Active power and its reference

Qg Q ∗ g

SS3

SS4

Q ∗ g, Q

g (M

V A R )

−4 −2 0

iag

i a g (k A )

−1 −0.5

0.5

(d) Phase-a grid current

vdc v ∗ dc

v ∗ dc ,v

d c (k V )

6.5

7.5

0 0.4 0.8 1.2 1.6 2.0 Time (s)

(e) Net dc-bus voltage and its reference

vc3 vc2

vc1

v c 1 ,v

c 2 ,v

c 3 (k V )

0.6

1.2

1.8

2.4

3.0

0 0.4 0.8 1.2 1.6 2.0 Time (s)

(f) dc-link capacitor voltages

Figure 6.2: Simulation results with dynamic active and reactive power references.

133

6.2.2 Steady-state Analysis

The performance of the proposed controller during four steady-state operating conditions

(denoted as SS1-SS4 in Fig. 6.2) is summarized in Table 6.2. The performance assessment

parameters are defined in Appendix C. The reference tracking errors, epg and eqg are main-

tained below 5 %, and thus they validate the proposed control scheme. The capacitor voltages

are well balanced with an error magnitude of less than 1 %. This facilitates the reduced volt-

age stress on the semiconductor switches. The THD is maintained below 5 % except for SS3,

where the switching frequency is much lower (776 Hz) than the other operating conditions.

The switching frequency is maintained below 1 kHZ and this enhances the reliability of the

switches.

Table 6.2: Steady-state analysis with simulation results

Case P ∗g (p.u.) Q ∗ g(p.u.) %epg %eqg %evc %THD fsw(Hz)

SS1 1.0 0 4.90 1.63 0.45 3.41 854

SS2 0.6 0 3.91 1.37 0.75 4.80 886

SS3 0.6 0.3 4.85 2.98 0.66 5.36 776

SS4 0.6 −0.7 3.45 3.20 0.38 3.29 991

6.2.3 Comparison to Classical VOC

The proposed predictive control method is compared with the classical decoupled voltage

oriented control [2,144] in steady-state and the results are presented in Figs. 6.3 to 6.8. The

active and reactive power references are considered to be 1.0 p.u. (4 MW) and 0 p.u.,

respectively (case SS1). The dc-link capacitor voltages are assumed to be balanced and thus

the weighting factor λdc is set to zero. With this assumption, the number of calculations

for the predictive control decreased and as a result, the device switching frequency fsw is

decreased from 854 to 680 Hz. In addition, no weighting factor is used for the switching

frequency minimization. The in-phase disposition (IPD) modulation, which gives the best

harmonic profile [84] is used in the decoupled voltage-oriented control. In order to make the

device switching frequency the same as the predictive control, the carrier frequency is set to

2040 Hz (= 680 Hz × 3).

134

The comparison between the classical and proposed method in terms of reference track-

ing is presented in Figs. 6.3 and 6.4. The proposed method exhibits better performance

compared to the classical method. The epg and eqg for the classical method are 1.1 %, and

0.8 %, whereas, for the proposed method they are 0.98 %, and 0.75 %, respectively.

The inverter line-line voltage, viab and its Fast Fourier Transform (FFT) with the classical

and proposed method are shown in Figs. 6.5 and 6.6. The classical method produces

harmonics around the carrier frequency and its multiples, whereas the proposed method

produces harmonics spread over the whole FFT window. But, the magnitude of harmonics

with the proposed method is less compared to the classical, and as a result less THD is

observed.

The phase-a grid current, iag and its FFT are depicted in Figs. 6.7 and 6.8, where the

THD is found to be lower for the proposed method in contrast to the classical controller.

Despite the lower switching frequency compared to the operating condition SS1 depicted in

Table 6.2, the THD is lower, because the cost function includes only reference tracking.

P ∗ g ,P

g (M

W )

Q ∗ g, Q

g (M

V A R )

−2

0 1/60 2/60 3/60

Time (s)

P∗g (k) Pg(k) Q∗g(k) Qg(k)

Figure 6.3: Simulation results for active and reactive powers tracking with classical VOC.

P ∗ g ,P

g (M

W )

Q ∗ g, Q

g (M

V A R )

−2

0 1/60 2/60 3/60

Time (s)

P∗g (k) Pg(k) Q∗g(k) Qg(k)

Figure 6.4: Simulation results for active and reactive powers tracking with predictive control.

135

v ia b (k V )

M a g (%

o f F u n d a m en ta l)

F F T

o f v ia b

−10 0

0.0 0.01 0.02 0.03 0.04 0.05 Time (s)

Harmonic Order

0 20 40 60 80 100 120 140 160 180 200

THD = 23.93 %

Figure 6.5: Simulation results for inverter line-line voltage and it’s FFT with the classical decoupled voltage-oriented control.

v ia b (k V )

M a g (%

o f F u n d a m en ta l)

F F T

o f v ia b

−10 0

0.0 0.01 0.02 0.03 0.04 0.05 Time (s)

Harmonic Order

0 20 40 60 80 100 120 140 160 180 200

THD = 13.36 %

Figure 6.6: Simulation results for inverter line-line voltage and it’s FFT with the proposed predictive control.

i a g (k A )

M a g (%

o f F u n d a m en ta l)

F F T

o f i a

−1 0

0.0 0.01 0.02 0.03 0.04 0.05 Time (s)

Harmonic Order

0.5

1.0

1.5

2.0

0 20 40 60 80 100 120 140 160 180 200

THD = 2.30 %

Figure 6.7: Simulation results for phase-a grid current, and it’s FFT with the classical decoupled voltage-oriented control.

136

i a g (k A )

M a g (%

o f F u n d a m en ta l)

F F T

o f i a

−1 0

0.0 0.01 0.02 0.03 0.04 0.05 Time (s)

Harmonic Order

0.5

1.0

1.5

2.0

0 20 40 60 80 100 120 140 160 180 200

THD = 1.29 %

Figure 6.8: Simulation results for phase-a grid current, and its FFT with the proposed predictive control.

6.2.4 Comparison to Lagrange Extrapolation

The performance of the Lagrange and the proposed extrapolation methods are analyzed

and compared as shown in Figs. 6.9 and 6.10. With a step change in the reference active

power from 0.2 to 0.4 p.u., the Lagrange extrapolation method produces a dip in the active

power, which in turn produces a spike in the inverter output line-line voltage as shown in Fig.

6.9. This voltage spike is undesirable because it will damage the semiconductor switches.

It is important to note that the voltage spike is produced due to the oscillations in the

extrapolated reference active power, P∗g (k + 1), which is shown in the box of Fig. 6.9. The

Lagrange method uses three present and past values for the calculation of future value [refer

to (5.17)] and this leads to oscillations in the extrapolated reference power. The extrapolated

grid voltage [vedg(k + 1)] and predicted grid currents [i p dg(k + 1), i

p qg(k + 1)] do not contribute

to this voltage spike [refer to (6.2)].

The voltage spike occurs even for a small step change in reference active and reactive

powers and thus it is not advisable to use Lagrange extrapolation method. This problem

has been rectified with the proposed extrapolation method, as shown in Fig. 6.10, and thus

it guarantees safe operation of the semiconductor devices. The proposed method uses only

one past value and eliminates the oscillations in P∗g (k + 1) as shown in the box in Fig. 6.10.

Similar performance can be observed for a step change in the reference reactive power.

137

Voltage Spike

v ia b (k V )

P ∗ g ,P

g (M

W )

−10

−5

−2

0 1/60 2/60 3/60 4/60

Time (s)

(I)

(II)

P∗g (k) P ∗ g (k + 1)

Pg(k)

Figure 6.9: Simulation results for step-change in active power with Lagrange extrapolation.

v ia b (k V )

P ∗ g ,P

g (M

W )

−10

−5

−2

0 1/60 2/60 3/60 4/60

Time (s)

(I)

(II)

P∗g (k)

P∗g (k + 1) Pg(k)

Figure 6.10: Simulation results for step-change in active power with proposed extrapolation.

138

6.2.5 Capacitor Voltages Balancing

In order to verify the proposed dc-link balancing algorithm, two cases are considered by

connecting an external resistor Rx (11.46 p.u.) and capacitor Cx (15.33 p.u.) across the dc-

link capacitor Cdc2 at a time of t = 0.7 s. Even with the step-connection of the resistor, the

controller takes action in a few sampling instants, and thus the capacitor voltages continue

to be balanced as shown in Fig. 6.11(a). With the step connection of Cx, the capacitor

voltages diverge as shown in Fig. 6.11(b), but the controller forces the capacitor voltages

to be balanced, while maintaining the grid powers at their reference values (of SS1). As a

consequence, the capacitor voltages become balanced, with a recovery time of 0.4 s. This

case may happen when any of the dc-link capacitors are damaged while they are in the

parallel connection. The currents through Rx and Cx are also shown in Figs. 6.11(a) and

6.11(b), respectively. These results validate that the proposed controller can work very well

even with the dc-link parameter variations.

vc3 vc2

vc1

iRx

v c 1 ,v

c 2 ,v

c 3 (k V )

i R x (A

)

−0.6 0

0.6

1.2

1.8

2.4

3.0

−20 0

100

0.6 0.65 0.7 0.75 0.8 Time (s)

(a) With external Rx across Cdc2

vc3 vc2

vc1

iCx

v c 1 ,v

c 2 ,v

c 3 (k V )

i C x (A

)

−0.6 0

0.6

1.2

1.8

2.4

3.0

−20 0

100

0.6 0.65 0.7 0.75 0.8 Time (s)

(b) With external Cx across Cdc2

Figure 6.11: Simulation results for dc-link capacitor voltages balancing with perturbations to the system model.

6.2.6 Robustness Analysis

To demonstrate the robustness of predictive control with the filter parameter variations,

two cases are considered: in the first case (CF: changes to the filter), the filter inductance

is considered to change from 143.5 % to 56.5 %, but this information is not provided to the

controller. The control algorithm uses a rated filter inductance value of 100 % (0.2 p.u.=2.1

mH). This is the typical case in a grid-tied system, where the power system impedance

changes randomly, and as a consequence, the equivalent filter value changes.

139

In the second case (CCF: changes to the controller and filter), the correct values of the

filter are given to the controller for the purpose of comparison. To simplify the analysis, the

switching frequency minimization is not considered, and thus λswc = 0. Even though the

filter parameters change, the controller chooses a switching state that produces the minimal

error in the reference tracking and capacitor voltages balancing. As shown in Figs. 6.12(a)

and 6.12(b), the difference between the CF and CCF conditions is found to be very small,

in the Lg variation range of 130 % to 70 %.

% e p g , % e q g

% e v c

0.2

0.4

0.6

0.8

1.0

%evc with CCF

%evc with CF

%eqg with CCF

%eqg with CF

%epg with CCF

%epg with CF

143.5 % 121.7 % 100 % 67.4 % 56.5 %

Filter Inductance, Lg

(a) Comparison of %epg, %eqg and %evc

% T H D

f s w (H

400

800

1200

2000

2800

fsw with CCF

fsw with CF

%THD with CCF

%THD with CF

143.5 % 121.7 % 100 % 67.4 % 56.5 %

Filter Inductance, Lg

(b) Comparison of %THD and fsw(Hz)

Figure 6.12: Simulation results with grid filter parameter variations (CF: changes to filter, and CCF: changes to controller and filter.)

140

6.3 Experimental Results

In order to verify the performance of the proposed control strategy, experimental results

are presented using a 5 kVA/208 V 4L-DCC prototype and dSPACE DS1003 control plat-

form. More details about the experimental set-up can be found in the Section 5.5.1. The

inverter and controller parameters are listed in Table 6.1.

To compensate for the computational delay, the cost function is calculated using the

guidelines given in Chapter 5.5.2. The control algorithm with delay compensation is shown

in Fig. 6.13. Because of the SRF modeling of dc-link voltages, the idg(k + 1) and iqg(k + 1)

can be used directly in the prediction of ic1(k + 2), ic2(k + 2) and ic3(k + 2) [refer to (6.6)].

If the modeling of capacitor voltages is done in a natural frame, then the idg(k + 1) and

iqg(k + 1) should be converted to iag(k + 1), ibg(k + 1), and icg(k + 1) during each sampling

interval, and this will increase the computational burden. Due to the (k + 2) predictions,

and the SI parameter values, the weighting factors obtained in the experiments are different

from the simulations, but their impact on the controller remains the same.

Measurement

vmc (k), v m g (k)

img (k)

Estimate

θg(k)

vmdg(k), v m qg(k)

imdg(k), i m qg(k)

vedg,qg(k + 1)

Apply

Sik op, i = 1...18

Delay Compensation

Ppg (k + 1), Q p g(k + 1)

v p c1,2,3(k + 1)

gop = ∞

for

Sx = 0 : 3

Derive

S1x, S2x, S3x

from Sx

Predictive Model

Ppg (k + 2), Q p g(k + 2)

v p c1,2,3(k + 2)

Sx = 3? No

Yes

Select kop

gop = min {gk}k=1...64 kop = k |gop

Minimization of

Cost Function

ggrid(k + 1)

Gating Signals to

4L-Inverter

Figure 6.13: Proposed predictive power control algorithm with delay compensation.

141

The experimental results with the different active and reactive power references are shown

in Fig. 6.14. Similar to the simulations, the decoupled control of active and reactive powers

is achieved with a good dynamic response and less steady-state error. The dc-link capacitor

voltages are balanced during all the operating conditions. The steady-state analysis has been

carried out and summarized in Table. 6.3. The higher tracking errors in experiments can

be attributed to the delay provided by the sensors and the IGBT gate drivers. Since the

predictions are in (k + 2), the evc is found to be smaller than in simulations.

Table 6.3: Steady-state analysis with experimental results

Case P ∗g (p.u.) Q ∗ g(p.u.) %epg %eqg %evc %THD fsw(Hz)

SS1 1.0 0 5.08 2.59 0.39 3.82 845

SS2 0.6 0 4.05 2.34 0.63 5.23 900

SS3 0.6 0.3 4.56 3.25 0.51 4.88 731

SS4 0.6 −0.7 3.87 3.89 0.29 3.70 998

The Lagrange and proposed extrapolation methods are experimentally analyzed and com-

pared as shown in Fig. 6.15. As confirmed by the simulations, the Lagrange extrapolation

method produces a dip in the active power and a spike in the inverter output voltage as

shown in Fig. 6.15(a). The oscillations in the extrapolated reference active power P∗g (k + 2)

are also shown in Fig. 6.15(a). The proposed extrapolation method eliminates the voltage

spike as shown in Fig. 6.15(b) and protects the semiconductor switches.

The dc-link dynamics with the external resistor Rx and capacitor Cx across Cdc2, are

given in Figs. 6.16(a) and 6.16(b), respectively. Similar to the simulations, the balancing

of the dc-link capacitor voltages have been maintained even with the step-connection of Rx

and Cx. The recovery time is found to be 1.3 s with Cx, which is higher compared to the

simulations. This difference is established due to the different weighting factors and SI values

of the grid current and the dc-link capacitor used in the prototype.

The effect of the filter parameter variations on the proposed controller is experimentally

analyzed and presented in Figs. 6.17(a) and 6.17(b). Only a small difference is observed

between the CF and CCF cases which are similar to the simulation results, when the Lg

variation is in a range of 130 % to 70 %. These results validate the robustness of the proposed

controller.

142

iag Pg

Ch1: 5 (m/s)/div, Ch2: 20 A/div Ch3: 5 kW/div, Ch4: 5 kVAR/div, t=200 ms/div

(a)

vdc

vc1 vc2

vc3

Ch1: 50 V/div, Ch2: 50 V/div Ch3: 50 V/div, Ch4: 100 V/div, t=200 ms/div

(b)

Figure 6.14: Experimental results with dynamic active and reactive power references.

143

P∗g (k)

P∗g (k + 2)

Pg(k)

viab Voltage Spike

Ch1: 2.5 kW/div, Ch2: 5 kW/div Ch3: 2.5 kW/div, Ch4: 200 V/div, t=5 ms/div

(a) With Lagrange extrapolation

P∗g (k)

P∗g (k + 2)

Pg(k)

viab

Ch1: 2.5 kW/div, Ch2: 5 kW/div Ch3: 2.5 kW/div, Ch4: 200 V/div, t=5 ms/div

(b) With the proposed extrapolation

Figure 6.15: Experimental results during the step change in active power reference.

iRx

vc1 vc2 vc3

Ch1: 25 V/div, Ch2: 25 V/div Ch3: 25 V/div, Ch4: 600 mA/div, t=100 ms/div

(a) External Rx across Cdc2

iCx

vc1

vc2

vc3

Ch1: 25 V/div, Ch2: 25 V/div, Ch3: 25 V/div, Ch4: 600 mA/div, t=500 ms/div

(b) External Cx across Cdc2

Figure 6.16: Experimental results for dc-link capacitor voltages balancing with the pertur- bations in system model.

144

% e p g , % e q g

% e v c

0.2

0.4

0.6

0.8

1.0

% evc with CCF

% evc with CF

% eqg with CCF % eqg with CF

% epg with CCF % epg with CF

143.5 % 121.7 % 100 % 67.4 % 56.5 %

Filter Inductance, Lg

(a) Comparison of %epg, %eqg and %evc

% T H D

f s w (H

400

800

1200

2000

2800 %THD with CF

%THD with CCF fsw with CF

fsw with CCF

143.5 % 121.7 % 100 % 67.4 % 56.5 %

Filter Inductance, Lg

(b) Comparison of %THD and fsw(Hz)

Figure 6.17: Experimental analysis with grid filter parameter variations (CF: changes to filter, and CCF: changes to controller and filter).

145

6.4 Conclusion

In this chapter, an intuitive approach using model predictive control is presented in a

synchronous reference frame for the decoupled active and reactive power regulation of a grid-

tied 4L-DCC. The major contributions of the work presented in this chapter are summarized

as follows:

• The decoupled active and reactive power control, along with the dc-link capacitor voltages balancing, have been achieved during all operating conditions. The proposed

methodology can be easily extended to other level DCCs.

• The dynamic response has been improved by eliminating the internal current control loops and modulators. Compared with the classical decoupled voltage-oriented control,

a better reference tracking and grid current waveforms have been achieved.

• The switching loss of the semiconductor devices is minimized by maintaining the switching frequency below 1 kHz.

• The proposed extrapolation method can extrapolate SRF references to future state without any oscillations (in reference control variables) during the transient condi-

tions. Moreover, this method is computationally inexpensive compared to Lagrange

extrapolation as it uses only one past sample value for the extrapolation.

• The control scheme can compensate for perturbations in the dc-link and grid filter parameter changes, while the grid active and reactive powers continue to effectively

track their references.

146

Chapter 7

Predictive Control of Three-Level

Boost and NPC Converters Based

PMSG-WECS

In this chapter, a novel medium voltage (MV) converter using a diode rectifier, three-

level boost (TLB) converter and neutral-point-clamped (NPC) inverter is proposed for a

high power permanent magnet synchronous generator (PMSG) based wind energy conversion

system (WECS). A model predictive strategy is introduced to control the complete WECS.

The major tasks being carried out in this chapter are summarized as follows:

• Continuous- and discrete-time modeling of the complete WECS including TLB and NPC converters is presented;

• Independent control loops are presented for the TLB and NPC converters. The strategy presented here for the grid-tied converter control is different from the one discussed in

Chapters 5 and 6.

• The average semiconductor device switching frequencies are minimized and maintained below 1.5 kHZ and 1 kHz, respectively for the TLB and NPC converters.

• Effectiveness of the boost converter in controlling the neutral-point voltage with the perturbations in the dc-link is investigated.

• Feasibility of the proposed converter and control scheme is verified through MATLAB simulations on 3 MW/3000 V/577 A system and dSPACE DS1103-based experiments

on a 3.6 kW/208 V/10 A prototype.

147

M V

G rid

W in d

T u rb in eD irect

D riv

M V

P M S G

D io d e R ectifi

er T h ree-L

ev el

T h ree-L

ev el

B o o st

C o n v erter

N P C

C o n v erter

d c-L

in k

R g ,L

g i a s

i b s

i c s

i a g

i b g

i c g

v g

v c 1

v c 2

i c 1

i c 2

i p

i n

i z

v in

i d c+

+ +

−

− −

P (1 )

N (-1

)

Z (0 )

S 1 a

S 2 a

S 1 b

S 2 b

S 1 c

S 2 c

S 1 a

S 2 a

S 1 b

S 2 b

S 1 c

S 2 c

S 1

S 2

C 1

C 2

D 1

D 2

R d c ,L

d c

C in

F ig u re

7 .1 : C o n fi g u ra tio

n o f T L B -N

P C

co n v erters

b a sed

m ed iu m

v o lta

g e P M S G -W

E C S .

148

7.1 Modeling of Complete WECS

The power conversion system for the direct-driven PMSG-based WECS is shown in Fig.

7.1. It consists of three stages: ac/dc, dc/dc and dc/ac, and these are implemented using

a diode rectifier, TLB converter and NPC inverter, respectively. The diode rectifier limits

the direction of power flow, and only the generating mode is possible which is the typical

requirement in a WECS. The diode rectifier features series connected diodes due to the MV

generator. The output of the diode rectifier, vin remains unregulated but is limited by the

rated speed of the turbine, which defines the voltage rating of the capacitor. The TLB

converter enables MV operation for the dc-dc stage. The WECS can be operated efficiently

in the complete wind speed range by controlling the gating signals for the TLB converter

[115]. The output of the TLB directly fits the two dc-link capacitors of the grid-tied NPC

inverter. This second dc-link provides decoupling for the generator- and grid-side converters

and thus individual control loops can be developed. The inverter is composed of 12 active

switches and 6 clamping diodes. The dc-link consists of two capacitors, and ideally they will

share equal voltages (vc1 = vc2 = vc). The NPC inverter is connected to the MV grid through

an L filter. The NPC multilevel and medium voltage operation at grid-side improves the

power quality and efficiency of the system compared to the two-level converters [2,3,14]. It

is important to note that both the generator and grid are rated for MV operation.

In the proposed megawatt-level WECS, the following four variables need to be regulated:

• Maximum power point tracking (MPPT) during all wind speed conditions to improve wind energy conversion efficiency

• Balancing of the dc-link capacitor voltages in order to reduce the device voltage stress and improve power quality

• Net dc-bus voltage control to ensure proper operation for the grid-tied inverter

• Reactive power generation to meet the grid codes

The first two variables are regulated by the TLB converter, and the last two variables

are handled by the NPC inverter. In this section, the modeling is presented to demonstrate

that the proposed power converters accomplish the above-mentioned control requirements.

149

7.1.1 Grid-Tied NPC Inverter Model

The mathematical modeling of the NPC inverter was previously analyzed in [279]. In this

chapter, a simplified modeling is achieved owing to the fact that the NPC inverter need not

control the dc capacitor voltages. The grid-tied inverter control was proposed in synchronous

reference frame in Chapters 5 and 6. In this chapter, the model is presented in a stationary

frame to reduce the number of online calculations incurred in the discrete-time predictive

controller. The switching states and the corresponding inverter voltages are shown in Table

7.1, where, it can be noted that: (a) only two switches conduct at any time, (b) switch pairs

(S1x, S1x), and (S2x, S2x) operate in a complementary manner, and (c) a total of 19 voltage

vectors with 27 (33) switching combinations are available [84].

Table 7.1: Switching states and NPC inverter terminal voltages (x = a,b,c)

Sx S1x S2x S1x S2x vxN

1 1 1 0 0 vc1 + vc2

0 0 1 1 0 vc2

−1 0 0 1 1 0

The inverter ac-side voltages (with respect to the negative dc-rail, N) can be expressed

in terms of switching signals and dc-side voltages as follows:

⎡ ⎢⎣ vaN

vbN

vcN

⎤ ⎥⎦ = vc1

⎡ ⎢⎣ S1a

S1b

S1c

⎤ ⎥⎦ + vc2

⎡ ⎢⎣ S2a

S2b

S2c

⎤ ⎥⎦ (7.1)

where vc1 and vc2 are dc-link capacitor voltages. S1a, S2a, S1b, S2b, S1c, and S2c are the

switching signals.

The grid current dynamics can be expressed in terms of inverter voltages, grid voltages

and filter inductance as, in the following:

d ig dt

= 1

Lg [vi − vg − Rg ig] (7.2)

where Lg is the grid filter inductance and Rg is the internal resistance of the inductor.

150

The current and voltage vectors are defined as:

ig = [iαg iβg] T = [Kabc→αβ] [iag ibg icg]

vi = [vαi vβi] T = [Kabc→αβ] [vaN vbN vcN]

vg = [vαg vβg] T = [Kabc→αβ] [vag vbg vcg]

where [Kabc→αβ] is the transformation matrix [refer to (B.1)].

The discrete-time model for grid currents can be obtained from (7.2) for one-step predic-

tion as follows [refer to (4.8)] [258,259]:

ig(k + 1) = Cv [vi(k + 1) + vg(k)] + Ci ig(k) (7.3)

where Cv and Ci are constants as defined by,

Cv = Ts

Lg + Rg Ts , Ci =

Lg Lg + Rg Ts

(7.4)

where Ts is the sampling time. The prediction of inverter voltage uses the 27 possible

switching states and the measured dc-link capacitor voltages, as demonstrated in (7.1).

From (7.1) and (7.3), it can be understood that the future behavior of the grid currents can

be controlled by properly choosing an optimal one among the 27 switching states.

7.1.2 Three-Level Boost Converter Model

The discrete-time modeling and control of a standard 2L-boost converter was analyzed

in [295]. In this paper, a similar approach is used for the modeling and control of the TLB

converter. A simplified WECS as shown in Fig. 7.2 is derived to facilitate the modeling

of the TLB converter [72]. The PMSG, along with the diode rectifier and capacitive filter,

Cin can be represented as a variable dc voltage source, vin, and the grid-tied inverter can

be represented by two variable resistive loads (R1 and R2) as shown in Fig. 7.3. The Rdc

represents the internal resistance of the inductor Ldc. In a 2L-boost converter only one

active switch is used, and this leads to 2 (2number of active switches = 21) operating modes (0 or

1). In the TLB converter, two active switches (S1 and S2) are used as shown in Figs. 7.1

to 7.3 and consequently 4 (2number of active switches = 22) modes are available (00, 01, 10, 11)

[118, 296–298]. The increase in the operating modes and thus switching states will lead to

an additional control freedom to charge and discharge the dc-link capacitors independently.

151

R 1

R 2

io1

io2

iag ibg icg

vin

Rdc, Ldc

idc

P(1)

Z(0)

N(-1)

N P C

In v er te r

Virtual Resistors

Figure 7.2: Simplified power circuit of the dc-dc TLB converter stage.

Rdc,Ldc

vin

idc ic1

ic2

io1

io2

vc1

vc2

(a) Mode-I

Rdc,Ldc

vin

idc ic1

ic2

io1

io2

vc1

vc2

(b) Mode-II

Rdc,Ldc

vin

idc ic1

ic2

io1

io2

vc1

vc2

Rdc,Ldc

vin

idc ic1

ic2

io1

io2

vc1

vc2

(d) Mode-IV

Figure 7.3: Modes of operation for three-level boost converter.

• Mode-I: [Fig. 7.3(a)] The S1, S2 are ON and D1, D2 are OFF. The dc-current, idc flows through the Ldc, S1 and S2 and thus energy is stored in the inductor only and

the dc-link capacitors are not charged. The energy which is already stored in the

capacitors C1 and C2 is discharged to the virtual loads R1 and R2, respectively. The

output currents through these loads can be represented as io1 and io2. During this

mode, the inductor current and dc-link voltages can be represented as follows:

didc dt

= vin − Rdc idc

Ldc ,

dvc1 dt

= −io1 C1 ,

dvc2 dt

= −io2 C2 . (7.5)

152

• Mode-II: [Fig. 7.3(b)] The S1, D2 are ON and S2, D1 are OFF. The dc-current flows through the Ldc, S1, C2, R2 and D2 and thus stored inductor energy is transferred to

the C2 and R2. The energy in capacitor C1 is discharged to the load R1. The resulting

equations can be given as:

didc dt

= vin − Rdc idc − vc2

Ldc ,

dvc1 dt

= −io1 C1

, dvc2 dt

= idc C2

− io2 C2 . (7.6)

• Mode-III: [Fig. 7.3(c)] The S2, D1 are ON and S1, D2 are OFF. The dc-current flows through the Ldc, D1, C1, R1 and S2 and thus stored inductor energy is transferred to

C1 and R1. The energy in capacitor C2 is discharged to the load R2. The subsequent

equations are:

didc dt

= vin − Rdc idc − vc1

Ldc ,

dvc1 dt

= idc C1

− io1 C1 ,

dvc2 dt

= −io2 C2 . (7.7)

• Mode-IV: [Fig. 7.3(d)] The D1, D2 are ON and S1, S2 are OFF. The dc-current flows through the Ldc, D1, C1, R1, C2, R2 and D2 and thus inductor energy is transferred to

the capacitors C1, C2 and loads R1, R2. The dynamic system is as follows:

didc dt

= vin − Rdc idc − vc1 − vc2

Ldc ,

dvc1 dt

= idc C1

− io1 C1 ,

dvc2 dt

= idc C2

− io2 C2 . (7.8)

By combining the dynamic equations in (7.5)-(7.8), the continuous-time system describing

inductor current and dc-link capacitor voltages can be obtained as:

⎡ ⎢⎣ idc

vc1

vc2

⎤ ⎥⎦ =

⎡ ⎢⎣ −Rdc

Ldc −(1−S1t)

Ldc −(1−S2t)

Ldc (1−S1t)

C1 0 0

(1−S2t) C2

0 0

⎤ ⎥⎦

⎡ ⎢⎣ idc

vc1

vc2

⎤ ⎥⎦ +

⎡ ⎢⎣

1 Ldc

0 0

0 − 1 C1

0 0 − 1 C2

⎤ ⎥⎦

⎡ ⎢⎣ vin

io1

io2

⎤ ⎥⎦ (7.9)

where S1t and S2t are the switching signals applied to the switches S1 and S2 respectively.

It is important to note that there is no need to measure the output currents, io1 and

io2 of the three-level boost converter. They can be calculated using the three-phase grid

currents and switching states of the NPC inverter (refer to Table 7.1). This is demonstrated

as follows: io1 = ip = S1aS2a · iag + S1bS2b · ibg + S1cS2c · icg io2 = ip + iz = S1aS2a · iag + S1bS2b · ibg + S1cS2c · icg

+S1aS2a · iag + S1bS2b · ibg + S1cS2c · icg. (7.10)

153

The currents ip and iz are shown in Fig. 7.2. From the continuous-time system described

in (7.9), the discrete-time model for the three-level boost converter can be derived as:

⎡ ⎢⎣ idc(k + 1)

vc1(k + 1)

vc2(k + 1)

⎤ ⎥⎦ =

⎡ ⎢⎣

φ11 φ12(1 − S1t) φ13(1 − S2t) φ21(1 − S1t) φ22 φ23 φ31(1 − S2t) φ32 φ33

⎤ ⎥⎦

⎡ ⎢⎣ idc(k)

vc1(k)

vc2(k)

⎤ ⎥⎦

⎡ ⎢⎣ γ11 γ12 γ13

γ21 γ22 γ23

γ31 γ32 γ33

⎤ ⎥⎦

⎡ ⎢⎣ vin(k)

io1(k)

io2(k)

⎤ ⎥⎦ .

(7.11)

Since the continuous-time parameter matrix A contains the switching signals of the boost

converter, the discrete-time conversion is not straight forward. The gating signals S1t and

S2t are set to zero during the process of discrete-time conversion.⎡ ⎢⎣ φ11 φ12 φ13

φ21 φ22 φ23

φ31 φ32 φ33

⎤ ⎥⎦ = eÃTs

⎡ ⎢⎣ γ11 γ12 γ13

γ21 γ22 γ23

γ31 γ32 γ33

⎤ ⎥⎦ = Ã−1(eÃTs − I3x3)B

(7.12)

where

Ã =

⎡ ⎢⎣ −Rdc

Ldc − 1

Ldc 1 C1

0 0 1 C2

0 0

⎤ ⎥⎦ . (7.13)

From (7.11), it can be established that using the measured and estimated quantities in kth

instant [idc(k), vc1(k), vc2(k), vin(k), io1(k), io2(k)] and 4 possible switching states, the future

behavior of the dc inductor current [idc(k + 1)] and dc-link capacitor voltages [vc1(k + 1),

vc2(k+1)] can be obtained. In contrast to the NPC rectifier, with the proposed configuration,

the number of switching states are decreased from 27 to 4, leading to a lower computational

burden. Moreover, the proposed approach does not require the model of PMSG and wind

turbine, and thus the complexity of modeling and control is greatly simplified compared to

the BTB NPC converters.

154

P L L

M V

G ri d

M P P T

W in d

T u rb in e

D ir ec t- D ri v en

M V

P M S G

D io d e R ec ti fi er

T h re e- L ev el

B o o st

C o n v er te r

N P C

C o n v er te r

d c- L in k

R g ,L

a ,b ,c

i g (k )

v g (k )

v c 1 (k )

v c 2 (k )

S r (k )

S i( k )

Sr(k−1)

Si(k−1) 1 2

1 2

a b c/ α β

a b c/ d q

d q / α β

i α g (k )

i β g (k )

i α g (k

+ 1 )

i β g (k

+ 1 )

i∗ α g (k )

i∗ β g (k )

i∗ d g (k )

i∗ q g (k )

i∗ α g (k

+ 1 )

i∗ β g (k

+ 1 )

v α g (k )

v β g (k )

v d g (k )

−1 .5 v d g (k )

v c 1 (k )

v c 2 (k )

v c 1 (k

+ 1 )

v c 2 (k

+ 1 )

v in (k )

i d c (k )

i∗ d c (k )

i∗ d c (k

+ 1 )

i d c (k

+ 1 )

P ∗ dc (k )

P I

+ − ×

ω m (k )

θ g (k )

Q ∗ g( k )

C o st

fu n ct io n , g g e n (k )

C o st

fu n ct io n , g g r id (k )

M in im

iz a ti o n

M in im

iz a ti o n

E x tr a p o la ti o n

P re d ic ti v e C o n tr o l o f

B o o st

C o n v er te r

N P C

In v er te r

i o 1 (k )

i o 2 (k )

B o o st

O u tp u t C u rr en ts

C a lc u la to r

v ∗ dc (k )

v d c (k )

F ig u re

7 .4 : P ro p o se d m o d el

p re d ic ti v e co n tr o l sc h em

e fo r th re e- le v el

b o o st

a n d N P C

co n v er te r b a se d P M S G -W

E C S .

155

7.2 Control System for Proposed PMSG-WECS

The complete control system for the proposed PMSG-WECS is shown in Fig. 7.4. Two

individual control loops are developed due to the decoupled nature of the TLB converter

and the NPC inverter.

7.2.1 Predictive Control of Three-Level Boost Converter

From the TLB converter perspective, the dc-link is treated as a constant voltage source,

as the net dc-bus voltage is well controlled by the grid-tied NPC inverter. With this con-

dition, the PMSG stator current, and thus the electromagnetic torque, can be regulated

by controlling the gating signals for the TLB converter. A step-by-step procedure for the

generation of TLB gating signals is given as follows:

• The first step in the implementation of a control system for the TLB converter is to develop the MPPT algorithm. To enable the variable speed operation of WECS, MPPT

algorithm is used. In this paper, an optimum power control MPPT algorithm [47] is

employed. The advanced, efficient and sophisticated MPPT algorithms proposed in

literature can be readily applied to this TLB converter to increase the WECS efficiency.

• Develop a look-up table containing the generator mechanical speed (ωm) versus output power reference (P∗dc ∝ ω3m) using the rated turbine parameters.

• Measure ωm(k) with the help of shaft encoders and compute P∗dc(k) using the look-up table designed in the previous step.

• The input power to the TLB converter is a product of the input dc voltage and dc- inductor current (Pdc = vin · idc). By dividing the input power reference [P∗dc(k)] with the measured input voltage [vin(k)], the reference dc-inductor current can be obtained

[i∗dc(k) = P ∗ dc(k)/vin(k)]. With the varying wind speed conditions, this reference current

changes, and the MPPT operation can be achieved by tracking to this quantity.

• Estimate the future value of the reference dc current, i∗dc(k + 1) using the fourth-order Lagrange extrapolation induced in Section 3.3.4.

i∗dc(k + 1) = 4 i ∗ dc(k) − 6 i∗dc(k − 1) + 4 i∗dc(k − 2) − i∗dc(k − 3). (7.14)

156

• Develop an initialization file containing the parameter matrices Φ and Γ.

• Measure the three-phase grid currents and NPC inverter gating signals during the kth sampling instant. Estimate io1(k) and io2(k) using (7.10).

• Measure idc(k), vc1(k), vc2(k) and vin(k). By using (7.11), obtain the future behavior of the inductor current [idc(k+1)] and dc-link capacitor voltages [vc1(k+1) and vc2(k+1)].

• Define a cost function for the TLB converter as follows by incorporating its control objectives:

ggen(k) = [i ∗ dc(k + 1) − idc(k + 1)]2

+ λdc,b ∗ [vc1(k + 1) − vc2(k + 1)]2

+ λswc,b ∗ ∑ j=1,2

| Sjt(k) − Sjt,op(k) | (7.15)

where λdc,b and λswc,b are weighting factors for the dc-link capacitor voltages balancing

and switching frequency reduction, respectively. S1t(k) and S2t(k) are the predicted

gating signals. S1t,op(k) = S1t(k − 1) and S2t,op(k) = S2t(k − 1) are the optimal gating signals in the previous sample.

• During each sampling instant, the switching signals S1t(k) and S2t(k), which minimize the cost function (7.15), are chosen and applied to the TLB converter directly. It

should be noted that the linear regulators and PWM modulator are eliminated with

the proposed approach.

In (7.15), the primary control goal is to force the inductor current to follow its reference,

and thus the weighting factor associated with this term is 1. The secondary goal is to balance

the dc-link capacitor voltages. A weighting factor λdc,b is defined such that the importance

for the secondary goal can be adjusted according to the desired performance. When λdc,b = 1,

the secondary goal will be given equal importance compared to the primary goal, and thus a

very good balancing of the dc-link capacitor voltages can be obtained, but at the expense of

a higher inductor current tracking error. When λdc,b = 0, the dc-link capacitor voltages are

not controlled, but the inductor current shows excellent reference tracking. Unfortunately,

in the state-of-the-art predictive control, no analytical or numerical methods are available

for the calculation of weighting factor values, but the guidelines given in [247] can be used.

157

The best approach is to select λdc,b = 1 in the initial trial, and reduce this value in small

steps until the drift in capacitor voltages reach 2 % of its nominal dc-link voltage.

Another secondary goal is switching frequency minimization. Its importance can be

altered by changing the λswc,b value. When λswc,b > 0, the switching frequency reduction

can be obtained, but at the expense of a higher inductor current tracking error and drift

in capacitor voltages. The cost function in (7.15) includes more than one control goal, and

under such conditions the quadratic cost function gives better performance than the absolute

cost function [77].

7.2.2 Predictive Control of NPC Inverter

From the NPC inverter perspective, the dc-link is treated as a variable dc current source

whose magnitude is proportional to the active power extracted from the wind. Under these

conditions, the net dc-bus voltage and reactive power to the grid can be regulated by prop-

erly generating the gating signals for the grid-tied NPC inverter [81]. The control system

implementation procedure is as follows:

• Measure the grid voltages, currents and dc-link capacitor voltages, and estimate the grid voltage angle, θg using a SRF phase-locked loop (SRF-PLL) using guidelines given

in Appendix B.4.

• Convert measured grid voltages and currents to αβ and dq frames.

• Generate i∗dg and i∗qg from v∗dc and Q∗g loops, respectively. More details about the definition of grid-side reference control variables can be found in Chapter 5.

• Convert the SRF references (i∗dg and i∗qg) to stationary frame (i∗αg and i∗βg) using the grid voltage angle θg.

• Estimate the future value (k+1) of reference grid currents as shown below. The vector angle extrapolation introduced in the Chapter 3 is used here.

[ i∗αg(k + 1)

i∗βg(k + 1)

] = ejωgTs

[ i∗αg(k)

i∗βg(k)

] (7.16)

where ωg is grid angular frequency.

158

• Using the measured quantities and off-line computed Cv and Ci values, predict the future behavior of αβ grid currents during each iteration according to (7.3).

• The grid-side cost function, developed so that control goals could be met, is defined as follows:

ggrid(k) = [ i∗αg(k + 1) − iαg(k + 1)

]2 +

[ i∗βg(k + 1) − iβg(k + 1)

]2 + λswc,i ∗

∑ j=1, 2

∑ x=a,b,c

| Sjx(k) − Sjx,op(k) | (7.17)

where λswc,i is the weighting factor for switching frequency reduction of the NPC

inverter.

• During each iteration, the predicted variables are compared with the extrapolated references. The switching state (among 27) which minimizes the cost function is chosen

and applied to the NPC inverter gating terminals during the next sampling interval.

The selection of the weighting factor and cost function type for the NPC inverter is similar

to the TLB converter presented earlier. Compared to the works in [80,81,279,280,299], the

grid-side cost function here deals with one primary objective (reference tracking of grid

currents) and one secondary objective (switching frequency minimization) only. The dc-link

capacitor voltages are not considered in the inverter cost function. Since the cost function

has fewer numbers of objectives, the computational burden becomes lower. The selection of

the best switching state (among 27) becomes easier and more straightforward (without any

weighting factor designs for the dc-link capacitor voltages unlike in [80, 81, 279, 280, 299]).

The quality of the primary control goal (reference tracking) greatly improves as the number

of secondary control goals is reduced.

The analysis presented here is also applicable for the classical control techniques which

utilize space vector modulation (SVM). The selection of the closest vector in the SVM

method is decided according to the minimal value of the cost function [183]. Since the dc-

link capacitor voltages do not need to be controlled by the SVM, the output power quality

of the NPC inverter can be greatly enhanced. Instead of SVM, a simplified pulse width

modulation can also be employed for the NPC inverter. The performance comparison of the

proposed predictive controller with the simplified SVM and PWM methods will be considered

as part of future work.

159

7.3 Simulation Results

The power converter topology and control scheme given in Figs. 7.1 and 7.4 are simulated

in MATLAB/Simulink environment with the 3 MW/3000 V/577 A WECS parameters as

indicated in Table 7.2. The PMSG is assumed to have surface mount magnets by which

Ld = Lq. A one-step prediction horizon is considered in all the simulation tests.

Table 7.2: Parameters of the proposed wind energy conversion system

Simulation Experimental Variable Description SI p.u. SI p.u.

Permanent Magnet Synchronous Generator Parameters Pm Rated Mechanical Power (kW) 3000 3.6 vsl Rated Line-Line Voltage (V) 3000 208 vs Rated Phase Voltage (V) 1732.2 1.0 120.1 1.0 is Rated Stator Current (A) 582 1.0 10 1.0 fs Rated Stator Frequency (Hz) 9.75 1.0 20 1.0 PFs Rated Power Factor 0.98 0.98 nm Rated Rotor Speed (rpm) 22.5 1.0 150 1.0 PP Number of Pole Pairs 26 8 Tm Rated Mechanical Torque (kN.m) 1273.24 1.0 0.2292 1.0 λr Rated rms Rotor Flux Linkage (Wb) 28.059 1.0 0.956 1.0 Rs Stator Winding Resistance (mΩ) 37.521 0.013 245 0.021 Ld d-axis Synchronous Inductance (mH) 9.75 0.2 19.1 0.2 Lq q-axis Synchronous Inductance (mH) 9.75 0.2 19.1 0.2

Medium Voltage Grid Parameters Sg Rated Apparent Power (kVA) 3000 1.0 3.6 1.0 vgl Rated Line-Line Voltage (V) 3000 208 vg Rated Phase Voltage (V) 1732.2 1.0 120.1 1.0 ig Rated Stator Current (A) 577.35 1.0 10 1.0 fg Rated Stator Frequency (Hz) 60 1.0 60 1.0 Zbg Base Impedance (Ω) 3 1.0 12.018 1.0 Lbg Base Inductance (mH) 7.96 1.0 31.88 1.0 Cbg Base Capacitance (μF) 884.19 1.0 220.72 1.0

Rectifier and Inverter Parameters Cin Input dc-link Capacitance (μF) 38937 7.40 4700 7.40 Cdc Output dc-link Capacitance (μF) 4006 4.53 1000 4.53 Rdc Boost Filter Leakage Resistance (Ω) 0.3 0.01 0.12 0.01 Ldc Boost Filter Inductance (mH) 7.5 0.94 30 0.94 Rg Grid-side Filter Resistance (Ω) 0.027 0.009 0.108 0.009 Lg Grid-side Filter Inductance (mH) 1.65 0.207 6.6 0.207

Controller Parameters Ts Sampling Time (s) 100 μ 100 μ λdc,b Weighting Factor 0.1 0.1 λsw,b Weighting Factor 100 1.5 λsw,i Weighting Factor 100 0.05 v∗dc Reference dc-bus Voltage (V) 5304 3.062 367 3.062 kP,dc DC-link Controller Proportional Gain 1 1 kI,dc DC-link Controller Integral Gain 200 200

160

Figs. 7.5 and 7.6 shows the simulation waveforms with different wind speeds and reactive

power references. Initially the wind speed is considered to be 12 m/s (1 p.u.) and the

generator operates at its rated speed. The PMSG stator voltage and current waveforms are

distorted due to the natural commutation of the diodes. The fundamental components of the

stator voltage and current are in-phase (not shown in figure), and thus a unity power factor

operation is achieved for the PMSG. The electromagnetic torque, Te contains ripples due to

the harmonics in the generator three-phase currents. The dc-link current, idc is maintained

at its reference value by the boost converter, while the net dc-bus voltage and reactive power

are regulated at their reference values by the grid-side inverter. The grid current is noted to

be 560 A with a total harmonic distortion (THD) of 2.76 % and the phase angle between the

grid voltage and current is zero (not shown in figure) due to the zero reactive power reference.

The active power and apparent powers are noted 2.91 MW and 2.91 MVAR, respectively.

It is important to note that the rated output of the generator is lower than the mechanical

input power (3 MW). During this operating condition, the switching frequencies of the boost

converter and NPC inverters are found to be 1400 and 900 Hz, respectively.

At t = 0.5 s, a gradual change in wind speed is applied from 12 m/s (1 p.u.) to 10.8

m/s (0.9 p.u.), and the generator speed, generator current, electromagnetic torque and boost

converter input voltage settled to a new operating point after short transients. With the

changes in the generator speed, the MPPT algorithm generated a new reference for the dc-

link current, and the controller forced the dc-link current to track to its reference, meaning

that MPPT is obtained with varying wind speed conditions. The grid currents magnitude

(409 A with 3.61 % THD) and thus active power (2.13 MW) delivered to the grid are changed

according to the reduced wind speed condition. The switching frequencies are 1022 Hz and

890 Hz respectively for the boost converter and NPC inverter.

At t = 0.7 s, a step change in Q∗g is applied from 0 to -2.055 MVAR (-0.685 p.u.). A good

transient response is achieved as demonstrated through the grid current and reactive power

waveforms. The grid current magnitude, grid current THD, grid power factor and inverter

switching frequency are found to be 567 A, 2.67 %, 0.73 leading, and 840 Hz, respectively.

The boost converter switching frequency is unchanged (1022 Hz). The grid current leads

the grid voltage by 43.22◦. The grid apparent power (Sg = √ P2g + Q

2 g) is noted to be 2.96

MVA.

161

2.0

2.25

2.5

(a) PMSG mechanical speed, ωm (rad/s)

(b) PMSG electromagnetic torque, Te and its reference T ∗ e , (MN.m)

-5

-1

(d) PMSG phase-a line current, ias (kA)

3.5

(e) Boost converter input voltage, vin (V)

0.4

0.7

(f) Boost converter inductor current, idc and its reference i ∗ dc (kA)

2.55

2.65

2.75

(g) dc-link capacitor voltages, vc1 and vc2 (kV)

5.25

5.3

5.35

0.4 0.5 0.6 0.7 0.8 0.9 1.0

Time (s)

(h) Net dc-bus voltage, vdc and its reference v ∗ dc (kV)

Figure 7.5: Simulation results with step change in wind speed and programmed changes in reactive power reference (first part of figure).

162

(a) Grid active power, Pg (MW)

-3

(b) Grid reactive power, Qg and its reference Q ∗ g (MVAR)

-8

(d) NPC line-line voltage, vi,ab (kV)

-1

0.4 0.5 0.6 0.7 0.8 0.9 1.0

Time (s)

(e) Grid phase-a current, iag (kA)

Figure 7.6: Simulation results with step change in wind speed and programmed changes in reactive power reference (second part of figure).

From 0.8 to 0.9 s, the Q∗g value is changed linearly from -2.055 MVAR (-0.685 p.u.)

to 1.584 MVAR (0.528 p.u.), and during this interval the net dc-bus voltage and reactive

power are regulated at their reference values, and this operation demonstrates an excellent

transient response of the proposed predictive controller. From t = 0.9 s onwards, the Q∗g

value is maintained at 1.584 MVAR (0.528 p.u.). The grid current magnitude, grid current

THD, grid power factor, inverter switching frequency and grid apparent power are found to

be 511 A, 3.25 %, 0.81 lagging, 784 Hz, and 2.65 MVA, respectively.

During all the operating conditions including transient conditions: (a) the dc-link current

tracks to its reference, (b) the dc-link capacitor voltages are very well-balanced, (c) the net

dc-bus is maintained at its reference value, and (d) reactive power is supplied as requested

by the grid operator.

163

The capability of the boost converter in balancing the dc-link capacitor voltages is demon-

strated in Fig. 7.7. The rated wind speed condition is used. A resistor, Rx (8.32 p.u.) is

connected on purpose across the dc-link capacitor C1 at time t = 1/40 s. The dc-link

capacitor voltages are shown in Fig. 7.7(a) and perfect balancing is noticed even with the

perturbations in the dc-link. The predictive controller operates with a sampling time of

100 μs and the control action has been taken in a few sampling instants. With the proposed

controller, no transients are noticed. The current through the parallel resistor is shown in

Fig. 7.7(b), and its value is noted as 106 A (0.184 p.u.). As shown in Fig. 7.7(c), the three-

phase grid currents continue to track to their references even with the parallel resistor. Due

to the power dissipated in the resistor Rx (282 kW), the magnitude of the current delivered

to the grid is decreased. This test verifies that the proposed three-level boost converter

performs very well in controlling the neutral-point voltage.

2.75

2.70

2.65

2.60

2.55

(a) dc-link capacitor voltages, vc1 and vc2 (kV)

120

(b) Current through the parallel resistor, Rx (A)

0.5

-0.5

-1 0 1/120 1/60 1/40 2/60 1/24 3/60

Time (s)

Figure 7.7: Simulation results for capacitor voltages balancing with a resistor across Cdc1.

164

The comparison between the proposed topology and back-to-back (BTB) connected NPC

converters topology equivalent during inverter switching frequency minimization is presented

in Figs. 7.8 and 7.9. For these topologies, rated wind speed and zero reactive power condition

is considered. The simulation results, with the BTB NPC topology, is presented in Fig. 7.8.

In the BTB NPC topology, the grid-tied NPC inverter performs three jobs: (a) control of

the net dc-bus voltage, (b) balancing of dc-link capacitors, and (c) reactive power regulation.

To derive an equivalent topology for the BTB NPC converters, the control algorithm given

in Fig. 7.4 is modified in such a way that the balancing of the dc-link capacitor voltages

is achieved by the grid-tied NPC inverter (in addition to the reference current tracking and

switching frequency minimization), and the weighting factor λdc,b is set to zero. This is also

the case with the standard two-level boost converter + NPC inverter based WECS [125,300].

For the balancing of the dc-link capacitor voltages with the help of the NPC inverter, the

methodology presented in [279] is used.

At time t = 2/60 s, the weighting factor for switching frequency minimization, λsw,i is

changed from 0 to 5500, and with this the fsw is changed from 1190 to 385 Hz. This can

be noticed by looking into the number of switch changes in the inverter line-line voltage

waveform [Fig. 7.8(ii)]. With the introduction of switching frequency minimization terms to

the cost function, two other variables (balancing of dc-link capacitor voltages and reference

tracking) are affected, as seen in Figs. 7.8(i) and (iii). The grid current THD with λsw,i = 0

and λsw,i = 5500 are 3.16 % and 6.64 %, respectively. The fast Fourier transform (FFT) of

phase-a grid current is shown in Fig. 7.8(iv). The harmonics are spread over the whole FFT

window with a peak magnitude of 2.5 % of the fundamental component.

The simulation results with the proposed topology are shown in Fig. 7.9, where perfect

balancing of the dc-link capacitor voltages is achieved, irrespective of the NPC inverter

switching frequency minimization. With the change in the weighting factor λsw,i from 0 to

5000, the NPC inverter switching frequency is decreased from 1169 to 385 Hz and the grid

current THD is increased from 2.63 % to 4.82 %. These values are lower compared to the one

obtained by the BTB NPC topology. The peak magnitude of the harmonics is also lower

compared to the BTB NPC topology, as shown in Fig. 7.9(iv). The cost function for the

NPC inverter of the proposed topology includes only the reference tracking and switching

frequency minimization, and thus better performance is achieved in terms of dc-link capacitor

voltages balancing and grid current quality.

165

3.0 2.8 2.6 2.4 2.2 2.0 8

-4

-8 1

0.5

-0.5

-1

4 3

M a g (%

o f F u n d a m en ta l) 0 1/60 2/60 3/60 4/60

0 10 20 30 40 50 60 70 80 90 100

Time (s)

Harmonic Order

THD = 6.64 %

(i)

(ii)

(iii)

(iv)

Figure 7.8: Simulation results for NPC fsw minimization with BTB NPC converters.

3.0 2.8 2.6 2.4 2.2 2.0 8

-4

-8 1

0.5

-0.5

-1

4 3

M a g (%

o f F u n d a m en ta l) 0 1/60 2/60 3/60 4/60

0 10 20 30 40 50 60 70 80 90 100

Time (s)

Harmonic Order

THD = 4.82 %

(i)

(ii)

(iii)

(iv)

Figure 7.9: Simulation results for NPC fsw minimization with proposed topology.

166

7.4 Experimental Implementation and Validation

As shown in Fig. 7.10, a low power prototype of PMSG-WECS using the proposed power

converters has been developed. The complete system parameters are indicated in Table 7.2

which are the same simulation parameters except for the generator frequency and stator

winding resistance. Two mechanically coupled PMSGs are used. The first PMSG along

with the DSP/FPGA controller is used as a prime mover to provide the required speed to

the second PMSG. The TLB converter and NPC inverter are controlled by a dSPACE DS1003

rapid prototyping board. The MATLAB/Simulink, Real-Time Workshop and dSPACE Con-

trol Desk are used together to handle the control algorithm. The prototype has been built

by Semikron SKM75GB123D dual-pack IGBT modules, SKKD75F12 dual-pack diode mod-

ules and SKHI22B dual core gate drivers. The inverter is connected to the grid through an

isolation transformer and its impedance is added to the filter values.

C D

(A) keyboard, (B) DSP/FPGA based wind turbine simulator, (C) prime mover, (D) direct-driven PMSG, (E) diode rectifier and three-level boost converter,

(F) NPC inverter, (G) interface board, (H) L filter, (I) isolation transformer, (J) three-phase grid, (K) voltage and current sensors, (L) DS1103 R&D controller and CP1103 connector, and (M) Oscilloscopes.

Figure 7.10: Block diagram of the experimental setup.

167

In the experimental verification, the computational delay caused by the digital signal

processor is compensated for by calculating the cost functions at (k + 2) instant. The

switching states which minimize the cost functions at (k+2) instant are selected and applied

at sampling instant (k + 1). With this approach, one sampling period will be available for

calculations. The control algorithms with this approach using delay compensation are shown

in Fig. 7.11.

The experimental results with the variation in generator speed from 1 to 0.9 p.u. are

presented in Fig. 7.12(a), where the response of the system is noted to be similar to the

simulation results presented in Figs. 7.5 and 7.6. The grid current, its THD, fsw of boost

converter and inverter during (1 p.u.) and (0.9 p.u.) wind speeds are: (9.0 A, 3.84 %, 1550

Hz, 995 Hz) and (6.6 A, 4.73 %, 1150 Hz, 953 Hz), respectively. The fsw is higher than in

simulations due to the delay compensation method employed [81,248].

The reactive power reference tracking capability and good transient response of the pro-

posed controller is demonstrated in Fig. 7.12(b). The grid current, its THD, power factor,

fsw of inverter during (-0.685 p.u.) and (0.528 p.u.) Q ∗ g are noted as: (9.1 A, 3.38 %, 0.73

leading, 910 Hz) and (8.3 A, 4.52 %, 0.81 lagging, 790 Hz), respectively. The capacitor

voltages are well balanced during all the operating conditions in addition to the reference

tracking.

The effect of the dc-link perturbations on the performance of a three-level boost converter

is investigated experimentally and presented in Fig. 7.13. The dc-link capacitor voltages are

well balanced by the three-level boost converter, irrespective of the step-connection of 100

Ω resistor (8.32 p.u.). The transient duration is noted to be 5 ms only. The grid currents

magnitude is decreased, but they continue to track to their references.

The inverter switching frequency minimization and its impact on the dc-link capacitor

voltages is experimentally verified with the proposed topology and presented in Fig. 7.14.

The experimental weighting factor λsw,i is changed from 0 to 1.2, and the (fsw) and (THD

of grid currents) is changed to (1055 Hz to 394 Hz) and (3.11 % to 5.45 %), respectively.

As shown in Fig. 7.14, the dc-link capacitor voltages, which are controlled by the boost

converter, are not affected by the inverter switching frequency reduction algorithm.

The NPC inverter line-line voltage waveform, as demonstrated in Figs. 7.12(a), 7.12(b)

and 7.14 contain five levels, whereas a 2L inverter (Fig. 2.4) produces three-levels [84].

The increase in the number of output voltage levels from 3 to 5 leads to smaller voltage

168

Measurement

vc(k), ig(k)

vin(k), idc(k)

Estimate

io1(k)

io2(k)

References

Calculation

with MPPT

i∗dc(k + 2)

Apply

Sb,op(k)

idc,op(k)

vc,op(k)

Estimation at

(k + 1) Instant

îdc(k + 1)

v̂c(k + 1)

i = 0 gop = ∞

i = i + 1

Prediction at

(k + 2) Instant

idc(k + 2)

vc(k + 2)

Calculation of

Cost Function

ggen(k + 1)

i ≥ 4 Yes

Select iop gop = min {gi}i=1...4

iop = i |gop

Output

Input

(a)

Measurement

vc(k), vg(k)

ig(k)

Estimate

θg(k), vdg(k)

vαg(k), vβg(k)

iαg(k), iβg(k)

References

Calculation

i∗αg(k + 2) i∗βg(k + 2)

Apply

Si,op(k)

vα,op(k)

vβ,op(k)

Estimation at

(k + 1) Instant

îαg(k + 1)

îβg(k + 1)

i = 0 gop = ∞

i = i + 1

Prediction at

(k + 2) Instant

iαg(k + 2)

iβg(k + 2)

Calculation of

Cost Function

ggrid(k + 1)

i ≥ 27 Yes

Select iop gop = min {gi}i=1...27

iop = i |gop

Output

Input

(b)

Figure 7.11: Proposed predictive control algorithm with delay compensation for: (a) TLB converter, and (b) NPC inverter.

steps and thus lower dv/dt. Moreover, with the NPC inverter, the output current ripple

becomes 4 times lower compared to the 2L-inverter for the same device-switching frequency

[62]. For a given value of the grid-side filter, this reduction in the current ripple leads to

very good power quality. In other words, the 2L inverter requires a large, grid-side filter to

achieve a power quality which is comparable to the NPC inverter. Many scholarly works

169

have been presented in recent years focusing on the multilevel operation of the grid-side

inverter [60,80,81,123,128]. A different inverter configuration was proposed such as 5L, 7L

and 9L ANPC [60,123], and 5L H-bridge (HB) inverter [128] to achieve smaller voltage steps

in the output voltage waveform. Reduction in the grid-side filter size, while improving the

grid power quality, represents a common interest in all these works.

ωm

vin

vs,ab

ias

idc

vc1 vc2

vdc

vi,ab

iag

(i)

(ii)

(iii)

(a) Programmed change in ωm from 1.0 to 0.9 p.u.

ωm

vin

vs,ab

ias

idc

vc1 vc2

vdc

Qg vi,ab

iag

(i)

(ii)

(iii)

(b) Programmed change in Q∗g

Figure 7.12: Experimental results for programmed changes in ωm and Q ∗ g.

170

vdc vc1 vc2

iag

Figure 7.13: Experimental results for capacitor voltages balancing with a resistor across Cdc1.

vc1 vc2

vi,ab

iag

λsw,i = 0 λsw,i = 1.2

Figure 7.14: Experimental results for inverter switching frequency minimization.

The proposed TLB converter has many potential applications and possible extensions to

use in MV-WECS. Since the output of the TLB converter directly fits the dc-link capaci-

tors, different inverter configurations can be developed on the grid-side with reduced control

complexity. The 5L to 9L ANPCs introduced in [60, 123] have two split dc-link capacitors

similar to the NPC inverter. By using these ANPCs in conjunction with the TLB converter,

the grid current quality can be improved further (this is true with the predictive control or

classical control based on SVM/PWM).

171

7.5 Conclusion

A novel medium voltage power converter topology, consisting of a diode rectifier, three-

level boost converter and neutral-point-clamped inverter is proposed for high power PMSG-

WECS. The proposed configuration combines the advantages of passive generator-side con-

verters and grid-side multilevel operation. Compared to the BTB-NPC converters, the pro-

posed configuration uses less number of active switches and thus the overall cost and control

system complexity is lower. The added benefit of this configuration is that the dc-link capac-

itor voltages are balanced during all operating conditions by the TLB converter, and thus

there is no need to develop a complex control system for the NPC inverter to handle the

dc-link capacitor voltages balancing task.

A model predictive control strategy is proposed to control the complete wind energy

system. Compared to the BTB-NPC converters, with the proposed topology, the number of

switching states is decreased from 54 to 31, and thus a lower computational burden has been

accomplished. Using the discrete-time model of the system, two individual control loops are

developed, and they generate the gating signals to the TLB converter and NPC inverter based

on minimization of cost functions. The use of linear controllers and modulation stage are

eliminated with the proposed FCS-MPC strategy, and as a result, good dynamic response has

been obtained. The MPPT and neutral point voltage are effectively controlled by the TLB

converter, while net dc-bus voltage and reactive power are regulated by the NPC inverter.

Because of the control freedom for the NPC inverter, a significant improvement in the grid

power quality has been achieved. Through the simulation and experimental results, it has

been demonstrated that the FCS-MPC strategy performs very well in achieving the control

goals for the complete wind energy system.

172

Chapter 8

Predictive Control of Four-Level

Converters Based PMSG-WECS

Considering the state-of-the-art wind energy market and its trend towards medium volt-

age (MV) technology, the initiative of this work is to combine passive generator-side con-

verters with the grid-side multilevel inverters. To meet the future generation of 1-10 kV

class (as defined in [82]) PMSG wind turbines, a four-level diode-clamped inverter (4L-DCI)

is proposed at the grid-side. Compared with the 3L-DCI, the 4L-DCI offers many benefits

as discussed in Chapters 2, 4 and 5. However, the balancing of dc-link capacitor voltages

with the 4L-DCI is much more difficult and complicated compared to the 3L-DCI [83, 84].

To overcome this problem, a four-level boost converter (4L-BC) is proposed, with which

the balancing of the dc-link capacitor voltages can be achieved during all the operating

conditions.

In this research, the continuous- and discrete-time modeling of the proposed power con-

version system is analyzed. To achieve an optimal control performance, a modified two-step

model predictive strategy is proposed. The high power wind turbine requirements, such

as maximum energy harvesting, balancing of dc-link capacitor voltages, net dc-bus volt-

age control, regulation of grid reactive power, and minimization of switching frequency and

common-mode voltage are expressed as cost functions. Best switching states are chosen and

applied to the power converters during each sampling interval based on the minimization of

cost functions. The feasibility of the proposed configuration and control scheme are veri-

fied through MATLAB/Simulink tests on a high power (5 MVA/4160 V/694A) system and

dSPACE experiments on a low power (3.6 kVA/208 V/10 A) prototype.

173

8.1 Configuration and Modeling of Proposed WECS

The configuration of the proposed variable-speed WECS is shown in Fig. 8.1. The

proposed configuration consists of MV-PMSG connected to a low cost three-phase diode

bridge rectifier, a dc-dc 4L-boost converter as an intermediate stage, and a 4L-DCI at the

grid-side. The output voltage of the diode rectifier changes with respect to the varying wind

speed conditions and this represents an unregulated dc-link. A regulated dc-link is used at

the inverter terminals to ensure proper operation of the system. The 4L-BC is composed

of three active switches and four diodes. The voltage rating of these devices is one third of

those used in the standard boost converter, and thus the cost of this 4L-BC is approximately

the same as that of a standard boost converter [119]. The 4L-DCI uses 18 active switches

and 18 clamping diodes. The active switches can be realized using the MV-IGBT or IGCT.

Three capacitors are used in the regulated dc-link, and the total dc-link voltage is divided

among these capacitors (vc1 = vc2 = vc3 = vdc 3 ). The regulated dc-link isolates the 4L-BC

and 4L-DCI, and thus the operation of one converter does not affect the other. As shall be

shown in the following subsections, this feature facilitates easier modeling and control.

8.1.1 Continuous-Time Modeling of Four-Level Inverter

The four-level diode-clamped inverter as grid-interfacing unit needs to control the net dc-

bus voltage and reactive power requested by the grid operator. From the detailed modeling

presented for the grid-tied inverter in Chapter 5, the synchronous reference frame (SRF) grid

currents are expressed in state-space form as follows:

[ idg

iqg

] =

[ −Rg Lg

ωg

−ωg −RgLg

] ︸︷︷︸

[ idg

iqg

] +

[ 1 Lg

0 1 Lg

] ︸︷︷︸

[ vdi

vqi

] +

[ −1 Lg

0 −1 Lg

] ︸︷︷︸

[ vdg

vqg

] (8.1)

where vdi and vqi are SRF inverter voltages and they can be calculated from the three-phase

inverter voltages given below:

⎡ ⎢⎣ vaN

vbN

vcN

⎤ ⎥⎦ = vc1

⎡ ⎢⎣ S1a

S1b

S1c

⎤ ⎥⎦ + vc2

⎡ ⎢⎣ S2a

S2b

S2c

⎤ ⎥⎦ + vc3

⎡ ⎢⎣ S3a

S3b

S3c

⎤ ⎥⎦ (8.2)

174

T u rb in e +

P M S G

D io d e R ec ti fi er

4 L B o o st

C o n v er te r

4 L D io d e- C la m p ed

In v er te r

U n re g u la te d d c- L in k

R eg u la te d d c- L in k

L F il te r

M V

G ri d

R a g ,L

a g

R b g ,L

b g

R c g ,L

c g

i a s

i b s

i c s

i a g

i b g

i c g

v a g

v b g v c g

vc1 vc2 vc3

i c 1

i c 2

i c 3

vin

i d c

+ +

+− − −

−

P (3 )

X (2 )

Y (1 ) N (0 )

S 1 a

S 2 a

S 3 a

S 1 b

S 2 b

S 3 b

S 1 c

S 2 c

S 3 c

S 1 a

S 2 a

S 3 a

S 1 b

S 2 b

S 3 b

S 1 c

S 2 c

S 3 c

S 1

S 2

S 3

C 1

C 2

C 3

D 1

D 2

D 3

D 4

R d c ,L

d c

Cin

F ig u re

8 .1 : C o n fi g u ra ti o n o f p ro p o se d h ig h p o w er

P M S G

w in d en er g y sy st em

175

where vc1, vc2 and vc3 are dc-link capacitor voltages. S1a, S2a, S3a, S1b, S2b, S3b, S1c, S2c, and

S3c are the switching signals of 4L-DCI.

The common-mode voltage (CMV) can be represented as the voltage between the neutral-

point of the grid (n) and the negative dc-rail (N) [276,301]:

vnN = vcm = vaN + vbN + vcN

3 . (8.3)

The systems in (8.1), (8.2) and (8.3) depict a situation wherein the grid currents and

CMV are related to the switching signals. By properly selecting a switching state among 64,

the grid currents can be controlled while minimizing the CMV.

8.1.2 Continuous-Time Modeling of Four-Level Boost Converter

The MPPT can be effectively achieved by controlling the inductor current of the four-

level boost converter. The dc-link capacitor voltages can also be balanced by the 4L-BC

with the proper selection of switching states. To facilitate the controller design, modeling of

inductor current and dc-link capacitor voltages is performed in this section.

The model of a standard boost converter is presented in [295] for a single-phase power

factor correction application. Similar modeling is performed for the 4L-BC, treating an

unregulated dc-link as the input voltage source and the four-level inverter as three virtual

resistive loads. As demonstrated in Fig. 8.2, the boost converter operates in five modes

[119]. In comparison to the standard boost converter, which operates in mode I and V only,

the additional modes help in the charging and discharging of each capacitor. The 4L-BC

switching states and the corresponding status of active switches, diodes and capacitors are

summarized in Table 8.1. The Rdc represents the internal resistance of the inductor Ldc.

Table 8.1: Summary of four-level boost converter switching states

Mode S1 S2 S3 D1 D2 D3 D4 C1 C2 C3

I ON ON ON OFF OFF OFF OFF Discharge Discharge Discharge

II ON OFF ON OFF ON ON OFF Discharge Charge Discharge

III ON OFF OFF OFF ON OFF ON Discharge Charge Charge

IV OFF OFF ON ON OFF ON OFF Charge Charge Discharge

V OFF OFF OFF ON OFF OFF ON Charge Charge Charge

176

Ro1

Ro3

Ro2

Rdc,Ldc

v in

idc

io1

io2

io3

v c 1

v c 2

v c 3

(a)

Ro1

Ro3

Ro2

Rdc,Ldc

v in

idc

io1

io2

io3

v c 1

v c 2

v c 3

(b)

Ro1

Ro3

Ro2

Rdc,Ldc

v in

idc

io1

io2

io3

v c 1

v c 2

v c 3

(c)

Ro1

Ro3

Ro2

Rdc,Ldc

v in

idc

io1

io2

io3

v c 1

v c 2

v c 3

(d)

Ro1

Ro3

Ro2

Rdc,Ldc

v in

idc

io1

io2

io3 v c 1

v c 2

v c 3

(e)

Figure 8.2: Operating modes for the four-level boost converter: (a) mode-I, (b) mode-II, (c) mode-III, (d) mode-IV, and (e) mode-V.

The operating modes presented in the Fig. 8.2 can be analyzed with Kirchhoff’s law and

the dynamic equations for the inductor current idc can represented as:

Mode-I : didc dt

= vin − Rdc idc

Ldc

Mode-II : didc dt

= vin − Rdc idc − vc2

Ldc

Mode-III : didc dt

= vin − Rdc idc − vc2 − vc3

Ldc (8.4)

Mode-IV : didc dt

= vin − Rdc idc − vc1 − vc2

Ldc

Mode-V : didc dt

= vin − Rdc idc − vc1 − vc2 − vc3

Ldc .

177

Similarly, the dc-link capacitor voltage dynamics can be obtained as:

Mode-I : dvc1 dt

= 0 − io1 C1

, dvc2 dt

= 0 − io2 C2

, dvc3 dt

= 0 − io3 C3

Mode-II : dvc1 dt

= 0 − io1 C1

, dvc2 dt

= idc − io2 C2

, dvc3 dt

= 0 − io3 C3

Mode-III : dvc1 dt

= 0 − io1 C1

, dvc2 dt

= idc − io2 C2

, dvc3 dt

= idc − io3 C3

, (8.5)

Mode-IV : dvc1 dt

= idc − io1 C1

, dvc2 dt

= idc − io2 C2

, dvc3 dt

= 0 − io3 C3

Mode-V : dvc1 dt

= idc − io1 C1

, dvc2 dt

= idc − io2 C2

, dvc3 dt

= idc − io3 C3

By combining the dynamic equations in (8.4) and (8.5), the continuous-time system

describing the inductor current and dc-link capacitor voltages can be obtained as:

⎡ ⎢⎢⎢⎣ idc

vc1

vc2

vc3

⎤ ⎥⎥⎥⎦ =

⎡ ⎢⎢⎢⎢⎣ −Rdc

Ldc −(1−S1f )

Ldc −(1−S2f )

Ldc −(1−S3f )

Ldc (1−S1f )

C1 0 0 0

(1−S2f ) C2

0 0 0 (1−S3f )

C3 0 0 0

⎤ ⎥⎥⎥⎥⎦

︸︷︷︸ Pb

⎡ ⎢⎢⎢⎣ idc

vc1

vc2

vc3

⎤ ⎥⎥⎥⎦

⎡ ⎢⎢⎢⎢⎣

1 Ldc

0 0 0

0 − 1 C1

0 0

0 0 − 1 C2

0 0 0 − 1 C3

⎤ ⎥⎥⎥⎥⎦

︸︷︷︸ Qb

⎡ ⎢⎢⎢⎣ vin

io1

io2

⎤ ⎥⎥⎥⎦

(8.6)

where S1f, S2f and S3f are the switching signals applied to the 4L-BC active switches S1,

S2 and S3, respectively.

In deriving the above dynamic system, the inverter is replaced by three virtual resistive

loads as shown in the Fig. 8.3. The measurement of output currents, io1, io2 and io3 is not

recommended as it increases the complexity as well as the cost. Rather these variables can

be estimated using the measured grid currents and 4L-DCI switching signals. The relation

between the output currents and inverter branch currents can be demonstrated as follows

with the help of Fig. 8.3:

io1 = ip

io2 = io1 + ix = ip + ix

io3 = io2 + iy = ip + ix + iy.

(8.7)

178

Ro1

Ro2

Ro3

io1

io2

io3

iag

ibg

icg

P(3)

X(2)

Y(1)

N(0)

S a = =

Sa == 2

S a = =

S b = =

Sb == 2

S b = =

S c = =

Sc == 2

Sc == 1

S c = =

Figure 8.3: Representation of virtual resistors and the inverter.

The inverter branch currents ip, ix and iy can be estimated based on inverter voltage

vector levels Sa, Sb and Sc, and measured grid currents as [108,281,302]:

⎡ ⎢⎣ ip

⎤ ⎥⎦ =

⎡ ⎢⎣ Sa == 3

Sa == 2

Sa == 1

⎤ ⎥⎦ iag +

⎡ ⎢⎣ Sb == 3

Sb == 2

Sb == 1

⎤ ⎥⎦ ibg +

⎡ ⎢⎣ Sc == 3

Sc == 2

Sc == 1

⎤ ⎥⎦ icg. (8.8)

By substituting the Sa, Sb and Sc values given in Table. 5.1, the above expression can

be described in terms of 4L-DCI switching signals. This is shown as follows:

⎡ ⎢⎣ ip

⎤ ⎥⎦ =

⎡ ⎢⎣ S1aS2aS3a

S1aS2aS3a

⎤ ⎥⎦ iag +

⎡ ⎢⎣ S1bS2bS3b

S1bS2bS3b

⎤ ⎥⎦ ibg +

⎡ ⎢⎣ S1cS2cS3c

S1cS2cS3c

⎤ ⎥⎦ icg. (8.9)

As demonstrated in this section, the proposed approach does not require the dynamic

model and parameters of the PMSG. Moreover, the PMSG rotor position is also not required.

This greatly simplifies the complexity of the control system. From (8.7), it can be understood

that the inductor current and dc-link capacitor voltages can be effectively controlled by the

optimal selection of switching signals.

179

8.2 Discrete-Time Modeling and Two-Step Prediction

The discrete-time dynamic system for SRF grid currents can be obtained from (8.1) as

follows:[ idg(k + h)

iqg(k + h)

] = Ξ

[ idg(k + h − 1) iqg(k + h − 1)

] + Υ

[ vdi(k + h − 1) vqi(k + h − 1)

] + Ψ

[ vdg(k + h − 1) vqg(k + h − 1)

] (8.10)

where

Ξ = ePiTs, Υ = Pi −1(Ξ − I2x2)Qi, Ψ = Pi−1(Ξ − I2x2)Ri. (8.11)

In the above systems, h is the prediction horizon and Ts is the controller sampling time.

The continuous-time system for the boost converter which is described in (8.6) can also be

converted to a discrete-time domain as:

⎡ ⎢⎢⎢⎣ idc(k + h)

vc1(k + h)

vc2(k + h)

vc3(k + h)

⎤ ⎥⎥⎥⎦ = Φ

⎡ ⎢⎢⎢⎣ idc(k + h − 1) vc1(k + h − 1) vc2(k + h − 1) vc3(k + h − 1)

⎤ ⎥⎥⎥⎦ + Γ

⎡ ⎢⎢⎢⎣ vin(k + h − 1) io1(k + h − 1) io2(k + h − 1) io3(k + h − 1)

⎤ ⎥⎥⎥⎦ (8.12)

where

Φ = ePbTs, Γ = Pb −1(Φ − I4x4)Qb. (8.13)

The parameter matrix, Pb contains gating signals S1f, S2f and S3f. These signals are

set to zero during the off-line discrete-time conversion.

As shown in Figs. 8.4(a) and 8.4(b), the prediction of control variables at (k + 1) uses

5 and 64 switching states for the 4L-BC and 4L-DCI, respectively. This is essentially called

one-step prediction (h = 1) and this methodology is used in many works [79, 281, 295] to

simplify the analysis and digital implementation computations. The works in [253–255] sug-

gest the use of a two-step prediction (h = 2) for an optimal performance. But this leads

to a higher computational burden for 4L-BC and 4L-DCI caused by 25 (52) and 4096 (642)

predictions, respectively. To reduce the number of calculations while achieving better per-

formance compared to the one-step prediction, a modified two-step prediction is previously

analyzed in [303]. But its feasibility has not been tested by digital implementation. In this

paper, the modified two-step prediction is extended for the control of proposed power con-

verters and this concept is shown in Figs. 8.5(a) and 8.5(b). Similar to one-step prediction,

180

this approach uses 5 and 64 switching states for 4L-BC and 4L-DCI, respectively. But the

predictions are projected to (k+2) sampling instant, and with this approach the advantages

of lower computations of one-step prediction and optimal performance of two-step prediction

can be combined.

The discrete-time model for the two-step prediction of grid currents is as follows:

[ idg(k + 2)

iqg(k + 2)

] = Ξ

[ idg(k + 1)

iqg(k + 1)

] + Υ

[ vdi(k)

vqi(k)

] + Ψ

[ vdg(k + 1)

vqg(k + 1)

] (8.14)

where vdg(k+1) and vqg(k+1) are extrapolated [77,258,259] grid voltages. The idg(k+1) and

idg(k + 1) are predicted grid currents in (k + 1) sampling instant, and they can be obtained

as: [ idg(k + 1)

iqg(k + 1)

] = Ξ

[ idg(k)

iqg(k)

] + Υ

[ vdi(k)

vqi(k)

] + Ψ

[ vdg(k)

vqg(k)

] (8.15)

where vdg(k) and vqg(k) are measured grid voltages. idg(k) and iqg(k) are measured grid

currents. By observing (8.14) and (8.15), it can be noticed that the same inverter voltages

[vdi(k), vqi(k)] are used in (k + 1) and (k + 2) prediction of grid currents. Compared to

one-step prediction, the number of calculations are higher, but significantly lower compared

to the standard two-step prediction.

Similarly, the two-step prediction model for the 4L-boost converter can be obtained as:

⎡ ⎢⎢⎢⎣ idc(k + 2)

vc1(k + 2)

vc2(k + 2)

vc3(k + 2)

⎤ ⎥⎥⎥⎦ =

⎡ ⎢⎢⎢⎣

φ11 φ12[1 − S1f(k)] φ13[1 − S2f(k)] φ14[1 − S3f(k)] φ21[1 − S1f(k)] φ22 φ23 φ24 φ31[1 − S2f(k)] φ32 φ33 φ34 φ41[1 − S3f(k)] φ42 φ43 φ44

⎤ ⎥⎥⎥⎦ (8.16)⎡

⎢⎢⎢⎣ idc(k + 1)

vc1(k + 1)

vc2(k + 1)

vc3(k + 1)

⎤ ⎥⎥⎥⎦ + Γ

⎡ ⎢⎢⎢⎣ vin(k + 1)

io1(k + 1)

io2(k + 1)

io3(k + 1)

⎤ ⎥⎥⎥⎦

where vin(k + 1), io1(k + 1), io2(k + 1) and io3(k + 1) are extrapolated quantities. φij with

i = 1, 2, 3, 4 and j = 1, 2, 3, 4 are the elements of the matrix Φ defined in (8.13). idc(k + 1),

vc1(k + 1), vc2(k + 1), and vc3(k + 1) are predicted quantities during (k + 1) sampling instant

181

as:

⎡ ⎢⎢⎢⎣ idc(k + 1)

vc1(k + 1)

vc2(k + 1)

vc3(k + 1)

⎤ ⎥⎥⎥⎦ =

⎡ ⎢⎢⎢⎣

φ11 φ12[1 − S1f(k)] φ13[1 − S2f(k)] φ14[1 − S3f(k)] φ21[1 − S1f(k)] φ22 φ23 φ24 φ31[1 − S2f(k)] φ32 φ33 φ34 φ41[1 − S3f(k)] φ42 φ43 φ44

⎤ ⎥⎥⎥⎦ (8.17)⎡

⎢⎢⎢⎣ idc(k)

vc1(k)

vc2(k)

vc3(k)

⎤ ⎥⎥⎥⎦ + Γ

⎡ ⎢⎢⎢⎣ vin(k)

io1(k)

io2(k)

io3(k)

⎤ ⎥⎥⎥⎦

where vin(k), idc(k), vc1(k), vc2(k), and vc3(k) are measured variables and io1(k), io2(k), and

io3(k) are calculated in terms of grid currents and 4L-DCI gating signals [refer to (8.9)].

Similar to the two-step prediction of 4L-DCI, the (k + 1) and (k + 2) predictions are carried

out using the same 4L-BC switching signals [S1f(k), S2f(k), and S3f(k)].

k k + 1 k + 2

(a) For 4L-boost

k k + 1 k + 2

(b) For 4L-inverter

Figure 8.4: Prediction of control variables using one-step prediction.

k k + 1 k + 2

5 5

(a) For 4L-boost

k k + 1 k + 2

64 64

(b) For 4L-inverter

Figure 8.5: Prediction of control variables using modified two-step prediction .

182

8.3 Proposed Model Predictive Control Strategy

The proposed control scheme using two-step prediction is shown in Fig. 8.6. As shown

in Fig. 8.6, independent control loops are developed for 4L-BC and 4L-DCI and the control

objectives are set for both of them. This is further clarified in the following subsections:

8.3.1 Control System for Four-Level Boost Converter

The control system for 4L-BC is depicted in Fig. 8.7(a). The MPPT algorithm provides

reference speed to the generator based on varying wind speed conditions. A PI controller

generates the input active power reference, P∗in as follows:

P∗in(k) = (Kp + Ki/S) [ω ∗ m(k) − ωm(k)] (8.18)

where Kp and Ki are the PI controller proportional and integral gains. By tracking to

this reference variable, the MPPT can be achieved in such a way that the generator speed,

current and electromagnetic torque can be regulated. This control objective is expressed as

the following cost function:

gtrack,b(k) = [P ∗ in(k + 2) − Pin(k + 2)]2 (8.19)

where P∗in(k + 2) is the extrapolated reference variable.

The two-step prediction for the input active power is obtained using extrapolated input

voltage, vin(k + 2) and a predicted dc-link current, idc(k + 2) (according to [8.16)]. This is

depicted as follows:

Pin(k + 2) = vin(k + 2) · idc(k + 2). (8.20)

Another important control objective is to balance the dc-link capacitor voltages. This is

expressed as follows:

gdc,b(k) = λdc,b ∗ [vc1(k + 2) − vc2(k + 2)]2

+ λdc,b ∗ [vc2(k + 2) − vc3(k + 2)]2

+ λdc,b ∗ [vc1(k + 2) − vc3(k + 2)]2 (8.21)

where λdc,b is the weighting factor used for the capacitor voltages balancing task.

183

M V

G rid

A n em

o m eter

M P P T

W in d

T u rb in e

D irect-D

riv en

M V

P M S G

D io d e R ectifi

F o u r-L

ev el

F o u r-L

ev el

B o o st

C o n v erter

In v erter

d c-L

in k

F ilter

R g ,L

i a g (k

)

i a g (k

) i a g (k

)

i b g (k

)

i b g (k

) i b g (k

)

i c g (k

)

i c g (k

) i c g (k

)

v a g (k

)

v a g (k

)

v b g (k

)

v b g (k

)

v c g (k

)

v c g (k

)

v c 1 (k

)

v c 2 (k

)

v c 3 (k

)

C 1

C 2

C 3

S r (k

) S i (k

)

Si(k)

1 8

v c 1 (k

) v c 1 (k

) v c 2 (k

) v c 3 (k

)

vin(k)

v in (k )

idc(k)

i d c (k

)

P ∗in (k )

|v c 1 −

v c 2 |+

|v c 2 −

v c 3 |+

|v c 1 −

v c 3 | =

P I

+ −

+ + +

− − −

−

v w (k )

ω m (k )

ω ∗m (k )

Q ∗g (k

)

v ∗d c (k

) C o n tro

l S y stem

fo r

F o u r-L

ev el

B o o st

C o n v erter

C o n tro

l S y stem

fo r

F o u r-L

ev el

D io d e-C

la m p ed

In v erter

F ig u re

8 .6 : B lo ck

d ia g ra m

o f th e co m p lete

co n tro

l sy stem

184

dc-Link

Output Currents

Calculation

using (8.9)

Discrete-Time

Model Predictive

Controller

using (8.16)

Cost Function

ggen(k)

Minimization

using (8.23)

Extrapolation

iag(k)

ibg(k)

icg(k)

io1(k)

io2(k)

io3(k)

Si(k)

Sr(k)

vc1(k)

vc2(k)

vc3(k)

vc1(k + 2)

vc2(k + 2)

vc3(k + 2) vin(k) idc(k)

idc(k + 2)

P∗in(k) P∗in(k + 2)

|vc1 − vc2| + |vc2 − vc3| + |vc1 − vc3| = 0

(a) Control system for four-level boost converter

PLL

and

abc/dq

Transformation

Discrete-Time

Model Predictive

Controller

using (8.14)

Cost Function

ggrid(k)

Minimization

using (8.27)

Extrapolation

iag(k)

ibg(k)

icg(k)

vag(k)

vbg(k)

vcg(k)

Si(k)

vc1(k)

vc2(k)

vc3(k)

Q∗g(k)

θg(k)

PI+−

× ÷

∑ v∗dc(k)

i∗dg(k)

i∗qg(k)

i∗dg(k + 2)

i∗qg(k + 2)

idg(k + 2)

iqg(k + 2)

vdg(k) vqg(k)

idg(k) iqg(k)

−1.5vdg(k)

(b) Control system for four-level diode-clamped inverter

Figure 8.7: Proposed predictive control scheme for 4L-converter based PMSG-WECS.

The device switching frequency reduction is penalized in the cost function, gswc,b:

gswc,b(k) = λswc,b ∗ ∑

x=1,2,3

| Sxf(k) − Sxf,op(k) | (8.22)

where λswc,b is the corresponding weighting factor. Sxf,op(k) is the optimal 4L-BC switching

signal in the previous iteration. This switching frequency minimization algorithm anticipates

and minimizes the number of switch changes compared to the previous sampling instant.

185

All these control objectives for the 4L-BC are merged into a cost function as:

ggen(k) = gtrack,b(k) + gdc,b(k) + gswc,b(k). (8.23)

The control algorithm for the digital implementation two-step prediction for the 4L-BC

is shown in Fig. 8.8(a). The algorithm is initialized by setting the switching state number i

to 0 and optimal g value to ∞. At this point, the algorithm enters the loop. The measured quantities and 5 switching states are used in the prediction of (k + 1) instant variables.

The predicted variables at (k + 1) instant and the extrapolated quantities are used in the

prediction of (k + 2) variables. It is important to note that the number of predictions at

(k + 1) and (k + 2) instants are 5 only. The cost function minimization is based on the

(k + 2) variables only. The switching state, which produces minimal value of gop is chosen

and applied to the 4L-BC gating terminals directly. The current regulators and modulation

are eliminated with the proposed approach.

8.3.2 Control System for Four-Level Inverter

The 4L-DCI control system is shown in the Fig. 8.7(b). The two control objectives can

be met by forcing the grid currents to track to their references. This is defined as:

gtrack,i(k) = [ i∗dg(k + 2) − idg(k + 2)

]2 +

[ i∗qg(k + 2) − iqg(k + 2)

]2 (8.24)

where i∗dg(k+2) and i ∗ qg(k+2) are the extrapolated reference currents. The two-step prediction

for the grid currents are obtained according to (8.14).

The switching frequency reduction objective is expressed as:

gswc,i(k) = λswc,i ∗ ∑

x=1, 2, 3

∑ j=a,b,c

| Sxj(k) − Sxj,op(k) | (8.25)

where λswc,i is a weighting factor. Sxj,op(k) is the optimal 4L-DCI switching signal in the

previous sampling instant.

The common-mode voltage can be minimized by penalizing the following cost function:

gcmv,i(k) = λcmv,i∗ | vcm(k) | (8.26)

where λcmv,i is the weighting factor for CMV minimization.

186

Measurement

vc1(k), vc2(k), vc3(k) iag(k), ibg(k), icg(k)

vin(k), idc(k)

Estimate

io1(k), io2(k), io2(k)

io1(k + 1), io2(k + 1), io2(k + 1) vin(k + 1), vin(k + 2)

P∗in(k + 2)

i = 0

gop = ∞

i = i + 1

Prediction of (k + 1) Variables

idc(k + 1), vc1(k + 1), vc2(k + 1),

vc3(k + 1) using (8.17)

Prediction of (k + 2) Variables

idc(k + 2), vc1(k + 2), vc2(k + 2),

vc3(k + 2) using (8.16)

Minimization of

Cost Function, ggen(k)

using (8.23)

i ≥ 5 Yes

Select iop

gop = min {gi}i=1...5 iop = i |gop

Generate Optimal Gating Signals

S1f, S2f, S3f

and Apply to the 4L-BC

(a)

Measurement

vc1(k), vc2(k), vc3(k) iag(k), ibg(k), icg(k)

vag(k), vbg(k), vcg(k)

Estimate

θg(k), vdg(k), vqg(k)

idg(k), iqg(k) vdg(k + 1), vqg(k + 1) i∗dg(k + 2), i

∗ qg(k + 2)

i = 0

gop = ∞

i = i + 1

Prediction of (k + 1) Variables

idg(k + 1), iqg(k + 1)

using (8.15)

Prediction of (k + 2) Variables

idg(k + 2), iqg(k + 2)

using (8.14)

Minimization of

Cost Function, ggrid(k)

using (8.27)

i ≥ 64 Yes

Select iop

gop = min {gi}i=1...64 iop = i |gop

Generate Optimal Gating Signals

S1a, S2a, S3a, S1b, S2b, S3b, S1c, S2c, S3c

and Apply to the 4L-DCI

(b)

Figure 8.8: Proposed two-step predictive control algorithm for: (a) four-level boost converter, and (b) four-level diode-clamped inverter.

187

The final cost function for the 4L-DCI is defined as:

ggrid(k) = gtrack,i(k) + gswc,i(k) + gcmv,i(k). (8.27)

The control algorithm for the 4L-DCI is shown in Fig. 8.8(b) and it is similar to the

boost converter’s algorithm in terms of the implementation. During each iteration, the future

behavior of the control variables are predicted using the 64 switching states. The switching

state (among 64) which minimizes the cost function ggrid(k) is chosen and applied to the

4L-DCI. The linear regulators (PI) are eliminated in the internal current control loops and

there is no need to design the pulse width or space vector modulation.

Table 8.2: Parameters of the proposed power conversion system

Simulation Experimental Variable Description SI p.u. SI p.u.

PT Rated Power (kW) 5000 1.0 3.6 1.0 TT Rated Torque (kN.m) 318.31 1.0 0.2292 1.0 NT Rated Speed (rpm) 150 1.0 150 1.0 Rgb Gear Ratio 1 1 rT Rotor Radius (m) 55.97 – ρ Air Density (kg.m2) 1.225 –

Cp,op Optimal Power Coefficient 0.48 – λT,op Optimal Tip Speed Ratio 73.267 –

Permanent Magnet Synchronous Generator Parameters Pm Rated Mechanical Power (kW) 5000 3.6 vsl Rated Line-Line Voltage (V) 4160 208 vs Rated Phase Voltage (V) 2402 1.0 120 1.0 is Rated Stator Current (A) 700 1.0 10 1.0 fs Rated Stator Frequency (Hz) 20 1.0 20 1.0 P Fs Rated Power Factor 0.98 0.98 nm Rated Rotor Speed (rpm) 150 1.0 150 1.0 P P Number of Pole Pairs 8 8 Tm Rated Mechanical Torque (kN.m) 318.31 1.0 0.2292 1.0 λr Rated rms Rotor Flux Linkage (Wb) 18.92 1.0 0.956 1.0 Rs Stator Winding Resistance (mΩ) 34.4 0.013 245 0.021 Ld d-axis Synchronous Inductance (mH) 5.475 0.2 19.1 0.2 Lq q-axis Synchronous Inductance (mH) 5.475 0.2 19.1 0.2 J Moment of Inertia (kg.m2) 237.93

Medium Voltage Grid Parameters Sg Rated Apparent Power (kVA) 5000 1.0 3.6 1.0 vgl Rated Line-Line Voltage (V) 4160 208 vg Rated Phase Voltage (V) 2402 1.0 120 1.0 ig Rated Stator Current (A) 694 1.0 10 1.0 fg Rated Stator Frequency (Hz) 60 1.0 60 1.0 Zbg Base Impedance (Ω) 3.46 1.0 12.018 1.0 Lbg Base Inductance (mH) 9.18 1.0 31.88 1.0 Cbg Base Capacitance (μF) 766.39 1.0 220.72 1.0

Power Electronic Converter Parameters Cin Input Capacitance (μF) 8300 10.87 2400 10.87 Cdc Output dc-link Capacitance (μF) 3500 4.53 1000 4.53 Rdc Boost Filter Leakage Resistance (Ω) 0.04 0.01 0.12 0.01 Ldc Boost Filter Inductance (mH) 2.9 0.314 10 0.314 Rg Grid-side Filter Resistance (Ω) 0.031 0.009 0.108 0.009 Lg Grid-side Filter Inductance (mH) 1.9 0.207 6.6 0.207

Controller Parameters Ts Sampling Time (s) 100 μ 100 μ

λdc,b Weighting Factor 100 2 v∗ dc

Reference dc-link Voltage (V) 7354 3.062 367 3.062

188

8.4 Simulation Results

Various tests were carried out using MATLAB/Simulink software to effectively demon-

strate the advantages of proposed topology and control strategy. The parameters of the high

power (5 MW/4160 V/694 A) PMSG power conversion system are shown in Table 8.2. The

one-step prediction strategy is shown in Fig. 8.4 and it implies the ideal case where the

time taken for the computations is zero. This means that the switching state, which mini-

mizes the error at the (k + 1) instant, is selected and applied at the kth instant. But in the

real-systems, zero computation time can never be achieved. All the digital signal processor

platforms require some computational time. To effectively compare the one-step and two-

step methods, treat real-time scenario, and better correlate the simulation and experimental

results, the digital signal processor control delay is included in the simulation models. The

computational delay is set to one sampling period Ts.

8.4.1 Steady-state Analysis

The steady-state analysis is carried out at rated wind speed condition, vw = 12 m/s, and

presented in Fig. 8.9. Without the control delay, using one-step prediction, the 4L-BC and

4L-DCI switching frequencies are found to be 806 and 910 Hz, respectively. The grid current

reference tracking error, eig and total harmonic distortion (THD) are found to be 1.1 % and

1.95 %, respectively. The fsw, eig and THD are calculated according to the guidelines given

in Appendix C.

In the presence of the control delay, the performance of the one-step predictive control

algorithm deteriorates. To overcome this challenge, a modified one-step prediction is devel-

oped using the guidelines given in [248, 249]. With this approach, the best switching state

in the previous iteration is used to estimate the control variables at (k + 1) instant. The

prediction of (k+2) variables is carried out using all the switching states of power converters.

The switching state, which minimizes the error at (k + 2) instant, is selected and applied.

The simulation results with the modified one-step prediction and proposed method are

presented in Figs. 8.9(a) and 8.9(b), respectively and they can compensate the control delay.

With one-step prediction, the number of calculations are increased due to the estimation (not

prediction) of (k+1) variables. For this reason, the fsw for 4L-BC and 4L-DCI are increased

to 980 and 1350 Hz, respectively. To make a fair comparison with the proposed method,

189

the fsw for 4L-BC and 4L-DCI are decreased to 420 and 580 Hz by using weighting factors

λswc,b = 3 and λswc,i = 20, respectively. As shown in Fig. 8.9(a), the boost converter input

power Pin contains a large ripple mainly caused by the inductor current. This high ripple is

not a problem because the inductor current is filtered by the dc-link capacitors. The dc-link

capacitor voltages are balanced, but present a higher steady-state error. The inverter line-

line voltage waveform contains high dv/dt’s and this is reflected to grid currents as higher

tracking error and THD.

The simulation results with the modified two-step prediction are presented in Fig. 8.9(b).

The fsw and CMV minimization is not considered in the two-step prediction test and thus

λswc,b = λswc,i = λcmv,i = 0. Even without employing any switching frequency reduction

algorithm, the fsw is noted as 408 and 565 Hz for 4L-BC and 4L-DCI, respectively. It is

important to note that no delay compensation is needed with the proposed modified two-step

prediction. As shown in Fig. 8.9(b) (i), the Pin contains less ripple and this indicates the

use of a lower rated dc-link capacitive filter compared to the modified one-step prediction.

The dc-link capacitor voltages are perfectly balanced and this improves the reliability of

the semiconductor switches. The inverter voltage waveform contains less dv/dt’s. The grid

currents track to their references with a lower steady-state error of 1.8 % in comparison to the

2.95 % for modified one-step prediction. The grid current THD is found to be 3.29 % which

is lower compared to the modified one-step prediction value of 5.05 %. These results validate

that by using the proposed strategy, an optimal control performance can be obtained in the

complex systems which involve a large number of computations.

8.4.2 Harmonic Analysis

The harmonic analysis and comparison between the modified one-step and proposed

method is presented in Fig. 8.10. The fast fourier transform (FFT) of inverter line-line

voltage (vi,ab) and phase-a grid current are analyzed. In comparison to the PWM and

SVM methods, which produce harmonics around the carrier frequency and its multiples, the

predictive control method produces harmonics spread over the whole FFT window [262,279].

The proposed method produces low THD values for vi,ab and iag in comparison to the one-

step prediction. The reason is that the peak amplitude of the harmonics is lower compared

to the one-step prediction. The results validate that the proposed method is most suitable

for high power applications, where power quality is a major concern.

190

2.0

2.25

2.50

2.75

3.0

−8 −4 0

−1.5 −1.0 −0.5

0 0.5 1.0 1.5

0 1/60 2/60 3/60 4/60

vc1 vc2

vc3

iag

i∗ag

Time (s)

(i) Pin and its reference (P ∗ in) (MW)

(ii) dc-link capacitor voltages (kV)

(iii) 4L-DCI line-line voltage, vi,ab (kV)

(iv) Phase-a grid current (iag) and its reference (i ∗ ag) (kA)

(a) Modified one-step prediction

0 1/60 2/60 3/60 4/60

vc1 vc2

vc3

iag

i∗ag

Time (s)

(i) Pin and its reference (P ∗ in) (MW)

(ii) dc-link capacitor voltages (kV)

(iii) 4L-DCI line-line voltage, vi,ab (kV)

(iv) Phase-a grid current (iag) and its reference (i ∗ ag) (kA)

(b) Proposed two-step prediction

Figure 8.9: Comparison of simulation results during rated wind speed condition using two different prediction methods.

M a g (%

o f F u n d .)

F F T

o f v i, a b

Harmonic Order

0 20 40 60 80 100 120 140 160 180 200

THD = 26.47 %

THD = 5.05 %

M a g (%

o f F u n d .)

F F T

o f i a

0 1

(a) Modified one-step prediction

Harmonic Order 0 20 40 60 80 100 120 140 160 180 200

THD = 17.32 %

THD = 3.29 %

(b) Proposed two-step prediction

Figure 8.10: Simulation FFT analysis of inverter line-line voltage and grid currents using two different prediction methods.

191

8.4.3 Switching Frequency Minimization

The simulation results for the fsw minimization of 4L-DCI and its impact on the grid

current quality and capacitor voltages is analyzed and presented in Fig. 8.11. From t = 0

to 2/60 s, no penalty is applied for the switching frequency reduction and thus λswc,i = 0.

During this condition, the fsw, grid current reference tracking error eig, and grid current

THD are 565 Hz, 1.8 % and 3.29 %, respectively. The capacitor voltages are well balanced

by the 4L-BC. At t = 2/60 s, the weighting factor, λswc,i is changed to 50, and the fsw is

decreased to 364 Hz, but with an increase in the reference tracking error (2.4 %) and current

THD (4.55 %). The inverter phase voltage waveform vaN clearly shows the reduced number

of switch changes. The λswc,i is changed to 4000 at t = 4/60 s, and the switching frequency

is further minimized to 161 Hz. The eig, and THD are 3.1 % and 5.83 %, respectively.

Even though the fsw is significantly decreased from 565 to 161 Hz, the grid current THD is

marginally increased. The reason is that the 4L-DCI does not control the capacitor voltages,

and thus it has a control freedom in choosing the best switching state which will generate

lower current tracking error and switching frequency. This is one of the best features of the

proposed power conversion system.

The 4L-BC switching frequency can also be minimized by including λswc,b in the cost

function, ggen. By increasing λswc,b from 0 to 5, the boost converter switching frequency

is minimized from 408 to 360 Hz, but with a slight increase in the Pin tracking error and

capacitor voltages balancing error.

8.4.4 Common-Mode Voltage Minimization

The CMV can be minimized by imposing a weighting factor λcmv,i to the cost function

ggrid and this is demonstrated in Fig. 8.12. The rated wind speed condition is considered in

this test. The λswc,i is set to zero to clearly show the effectiveness of the CMV minimization

algorithm. At t = 3/60 s, the λcmv,i is changed from 0 to 10 and the CMV is dramatically

decreased as shown in Fig. 8.12(a). But, the grid current tracking error increases from 1.8 %

to 3.2 %, and also the THD increases from 3.29 % to 4.89 %. The capacitor voltages are well

balanced by the 4L-BC, but they contain a higher ripple to the increased grid current THD.

This test verifies that CMV in 4L-DCI can be minimized to a certain level without using

any additional hardware circuitry such as common-mode choke.

192

2.0

2.25

2.5

2.75

3.0

−1.5 −1.0 −0.5

0.5

1.0

1.5

2.5

5.0

7.5

0 1/60 2/60 3/60 4/60 5/60 6/60

vc1 vc2

vc3

iag

i∗ag

Time (s)

λswc,i = 0 λswc,i = 50 λswc,i = 4000

(a) Inverter phase-a voltage, vaN (kV)

(b) Phase-a grid current (iag) and its reference (i ∗ ag) (kA)

Figure 8.11: Simulation results for grid-tied inverter switching frequency minimization.

2.0

2.25

2.5

2.75

3.0

−1.5 −1.0 −0.5

0.5

1.0

1.5

2.5

5.0

7.5

0 1/60 2/60 3/60 4/60 5/60 6/60

vc1 vc2

vc3

iag

i∗ag

Time (s)

λcmv,i = 0 λcmv,i = 10

(a) Common mode voltage (kV)

(b) Phase-a grid current (iag) and its reference (i ∗ ag) (kA)

Figure 8.12: Simulation results for grid-tied inverter common-mode voltage minimization.

193

8.4.5 DC-link Perturbations

The effectiveness of the four-level boost converter and predictive control algorithm are

analyzed in this section. Rated wind speed condition is considered in this test. The switching

frequency and CMV minimization are not considered to clearly describe the dc-link capac-

itor voltages balancing. A perturbation is created on purpose by connecting an external

capacitor Cext across the dc-link capacitor−2. In real systems, in order to achieve rated ca- pacitance and voltage rating, the dc-link capacitors are connected as series-parallel strings.

The perturbation assumed here resembles the faulty condition in one of the dc-link parallel

strings. The simulation results with such faulty condition are shown in Fig. 8.13. The Cext

rating is assumed to be same as of Cdc (4.53 p.u.).

−1

−10 −5 0

−1.5 −1.0 −0.5

0.5

1.0

1.5

0 2/60 4/60 6/60 8/60 10/60

vc1

vc2 vc3

Cext is OFF Cext is ON

iag

i∗ag

Time (s)

(b) Current through the external capacitor, Cext (kA)

(a) dc-link capacitor voltages (kV)

(d) 4L-DCI line-line voltage, vi,ab (kV)

Figure 8.13: Simulation results with step-connection of capacitor Cext across Cdc2.

194

With the step-connection of Cext at t = 2/60 s, the vc2 suddenly drops due to the large

current flowing through the Cext [Fig. 8.13(b)]. But the predictive control algorithm selects

appropriate switching states to make the capacitor voltages balanced, and as a consequence

the vc2 reaches the voltage level of vc1 and vc3 in a quarter of a fundamental cycle.

The net dc-bus voltage vdc deviates from its reference v ∗ dc due to the faulty condition

and also due to an imbalance in the capacitor voltages. At t = 8/60 s, the vdc recovers

back to its reference value with the help of a dc-link PI controller. The capacitor voltages

are maintained as balanced even during this transient period (2/60 to 8/60 s). From this

operating condition, it can be concluded that the proposed control strategy is robust, and

can mitigate the perturbations in the dc-link. Moreover, the reference tracking algorithm is

not affected by this faulty condition. The grid currents continue to track to their references

as shown in Fig. 8.13(c). As demonstrated in Fig. 8.13(d), during a transient condition,

a three-level waveform is noticed due to the divergence of vdc from its reference. But at

t = 8/60 s, normal operation is restored.

8.4.6 Step-Change in Wind Speed Condition

The dynamic response of the system to a step-change in wind speed is investigated in

this section. It is assumed that the system is operating at rated condition until t = 1.0 s.

The fsw and CMV minimization terms are not included in the cost functions. As shown in

Fig. 8.14, until t = 1.0 s, the system operates in steady-state, and rated power is delivered

to the grid. All the control variables are maintained at the reference values. The mechanical

system of the wind turbine is much slower compared to the electrical system, and to better

represent the results, a very low moment of inertia (J = 16.381 kg.m2 which is 14.5 times

lower than the original value) is used in the simulations, but this will not affect the system

performance [2].

At t = 1.25 s, a step change in wind speed is applied from 12 m/s (1.0 p.u.) to 9.6 m/s

(0.8 p.u.). Due to the sudden decrease in the wind speed, the MPPT algorithm produces a

new speed reference (ω∗m = λT,op rT

· vw) of 12.57 rad/s. This step change in wind speed sets a new electromagnetic torque reference, T∗e , but the Te is maintained at its current value to

allow the PMSG to decelerate. When the PMSG speed ωm reaches its reference value, the Te

starts to build up and reaches its new reference value. The electromagnetic torque contains

higher torque ripple due to the significant 5th and 7th harmonics in the PMSG currents.

195

ω∗m

ωm

ω∗m = 1.0 p.u. ω ∗ m = 0.8 p.u.

(a) PMSG mechanical speed and its reference (rad/s)

−0.5

−0.25

0 T∗e

(b) PMSG electromagnetic torque and its reference (MN.m)

−8

8 ias × 3

vs,ab

P∗in Pin

(d) 4L-boost converter input power and its reference (MW)

6.0

7.5

9.0 v∗dcvdc

(e) Net dc-link voltage and its reference (kV)

2.0

2.5

3.0 vc1 vc2 vc3

(f) dc-link capacitor voltages (kV)

(g) Grid active power, Pg (MW)

-1.5

1.5

1.00 1.25 1.50 1.75 2.00 2.25 2.50 Time (s)

(h) Grid phase-a current, iag (kA)

Figure 8.14: Simulation results with step change in wind speed from 12 m/s to 9.6 m/s.

196

These higher harmonics are caused by the diode-bridge rectifier. This is the only disad-

vantage of using diode-rectifiers for the PMSG turbines. Due to the decoupled nature of the

power converters, these harmonics are not reflected to the grid and thus they do not cause

any conflict to the grid codes.

During the time interval 1.25-1.6 s, where the PMSG decelerates to a new reference value,

the PMSG line current ias, line-line voltage vs,ab, boost converter input power Pin, grid power

Pg and grid currents decrease at a slow rate. When the PMSG speed reaches new reference

value, the Pin and Pg settle to a new steady-state value. During this interval, the net dc-bus

voltage deviates from its reference value, but the dc-link capacitor voltages are well balanced

by the boost converter. The system reaches a new steady-state at t = 2.25 s and all the

control variables are maintained at the new steady-state operating condition.

8.4.7 Step-Changes in Grid Reactive Power Reference

The grid codes [17] indicate that the wind turbine system should support the grid reactive

power when ever requested by the grid operator. The ability of the proposed system to supply

unity power factor (UPF), leading power factor and lagging power factor is studied in this

section. The simulation results with the step change in grid reactive power reference is

shown in Fig. 8.15. The wind speed is considered to be 9.6 m/s (0.8 p.u.), and the active

power generated is approximately 2.56 MW (0.83 p.u.). The fsw and CMV minimization is

not considered. A step change in Q∗g is applied from 0 to −3.075 MVAR (−0.615 p.u.) at t = 1/60 s changing the grid power factor from UPF to leading. The grid current leads

the grid voltage as shown in Fig. 8.15(b). At t = 3/60 s, another step change in Q∗g is

applied from −3.075 MVAR (−0.615 p.u.) to 3.075 MVAR (0.615 p.u.). The grid power is changed from leading to the lagging and the grid current lags the grid voltage [Fig. 8.15(b)].

An excellent dynamic response is noticed for the grid reactive power and currents tracking.

During all the operating conditions, the capacitor voltages are well balanced by the boost

converter.

197

−6

−3

2.0

2.25

2.5

2.75

3.0

−1.5 −1.0 −0.5

0.5

1.0

1.5

−8

−4

0 1/60 2/60 3/60 4/60 5/60 6/60

vc1 vc2

vc3

Q∗g

iagvag 3

i∗ag

Unity PF Unity PFLeading PF Lagging PF

Time (s)

(d) dc-link capacitor voltages (kV)

(a) Grid reactive power and its reference (MVAR)

(b) Phase-a grid voltage (kV) and current (kA)

Figure 8.15: Simulation results with step-changes in grid reactive power reference.

198

8.5 Experimental Implementation

8.5.1 Experimental Platform

As shown in Fig. 8.16, a low power (3.6 kW/208 V/10 A) prototype of PMSG-WECS

using the proposed power conversion system is developed. The parameters of the system are

given in Table 8.2. Two mechanically coupled PMSGs are used, where initially the PMSG,

along with the DSP/FPGA controller, is used as a prime mover to provide the required

torque to the second PMSG.

The 4L-BC and 4L-DCI are controlled by a dSPACE DS1003 R&D controller. The control

algorithm has been implemented using a host PC running with MATLAB-Simulink software

through Real-Time Interface (RTI). The required current and voltage measurements are

made by LEM LA55-P and LV25-P sensors, respectively, and sent to the controller through

a CP1103 I/O connector. The prototype has been built by Semikron SKM75GB123D dual-

pack IGBT modules, SKKD75F12 dual-pack diode modules and SKHI22B dual core gate

drivers. The inverter is connected to the grid through an isolation transformer and its

impedance is added to the filter values.

8.5.2 Experimental Results

The experimental comparison between one-step prediction and proposed method is pre-

sented in Fig. 8.17. With a one-step prediction, and without any fsw minimization algorithm,

the switching frequencies for 4L-BC and 4L-DCI are found to 993 and 1380 Hz, respectively.

By using a weighting factor of λswc,b = 0.5, the fsw for the 4L-boost converter is decreased

to 465 Hz. The fsw of 4L-DCI is decreased to 595 Hz by using a λswc,i = 1.2. The switch-

ing frequencies with the proposed method are noted as 482 and 583 Hz for the 4L-BC and

4L-DCI, respectively.

Similar to the simulation results, the proposed method clearly shows better performance

compared to the modified one-step prediction. The Pin contains lower ripple, the capacitor

voltages are well balanced, and lower dv/dt’s are obtained in the inverter waveform compared

to the one-step prediction. The peak magnitude of the harmonics is also lower with the

proposed method. The eig and THD with the one-step prediction are: 3.8 % and 6.2 %,

where, for the proposed method they represent: 2.9 % and 4.35 %, respectively. The tracking

199

error and THD with the proposed method are higher compared to the simulations due to the

delay offered by the current and voltage transducers, dead-time of gate drivers, and losses in

the system. These results confirm that the proposed method gives an optimal performance

compared to the one-step prediction. Through these results, it has been demonstrated

that the current digital platforms can handle the computational capacity of the proposed

method. Having the one-step predictive model of the system, the proposed method can be

easily extended to any complex system to achieve optimal performance with good quality of

the control variables.

(a) Wind Turbine Simulator

B2 B3

(b) Four-Level Boost Converter

D1 D2

D4 D5

D8 D9

D10

(A1) DSP/FPGA controller, (A2) key board, (B1) three-phase diode-rectifier, (B2) input capacitor,

(B3) dc inductor, (B4) semiconductor switches, (B5) IGBT gate drivers, (C1) interface board,

(C2) dc-link capacitors, (D1) prime mover, (D2) non-salient pole PMSG, (D3) isolation transformer,

(D4) three-phase grid, (D5) power converters, (D6) grid-side filters, (D7) voltage and current transducers,

(D8) DS1103 R&D controller, (D9) measurement system, and (D10) MATLAB/Simulink and control desk.

(d) Complete Experimental Platform

Figure 8.16: Photographs of the experimental setup.

200

P∗in Pin i∗ag

iagFFT of iag

vc1 vc2 vc3

vi,ab FFT of vi,ab

(i)

(ii)

(a) Modified one-step prediction

P∗in Pin i∗ag

iagFFT of iag

vc1 vc2 vc3

vi,ab FFT of vi,ab

(i)

(ii)

(b) Proposed two-step prediction

Figure 8.17: Comparison of experimental results during rated wind speed condition.

vaN

i∗ag

iag

vc1 vc2 vc3

λswc,i = 0λswc,i = 0 λswc,i = 0.05λswc,i = 0.05 λswc,i = 2.0λswc,i = 2.0

(a) (b)

Figure 8.18: Experimental results for grid-tied inverter switching frequency minimization.

201

The switching frequency minimization algorithm is experimentally tested and presented

in Fig. 8.18. The weighting factor λswc,i is changed in the order of: 0, 0.05 and 2. The

switching frequencies are minimized in the order of: 583, 375, 146 Hz; eig is increased in the

order of: 2.9 %, 3.7 %, 4.8 %; and THD is increased in the order of: 4.35 %, 5.86 %, 6.72 %.

This switching frequency minimization is achieved without any software or hardware recon-

figuration. As explained in the simulation results section, the dc-link capacitor voltages are

not balanced by the 4L-DCI. This gives fewer numbers of restrictions in the selection of

the best switching state. As a result, the power quality is maintained at an acceptable level

while minimizing the device switching frequency. This test clearly exhibits that the proposed

power conversion system and control strategy is most suitable for megawatt-level applica-

tions, where a lower switching frequency operation and high power quality are mandatory.

The CMV minimization is experimentally evaluated and its impact on the grid currents is

studied. As shown in Fig. 8.19, with the increase of weighting factor λcmv,i from 0 to 0.0008,

the CMV is drastically decreased, but, with little increase in the grid currents reference

tracking error (2.9 % to 4.3 %) and THD (4.35 % to 5.63 %). The capacitor voltages are

not affected by this CMV minimization algorithm. These experimental results validate the

proposed CMV minimization algorithm. This test verifies that the CMV can be minimized

to a certain level with the penalization of cost function. This leads to the lower rating and

thus lower cost for the external hardware used for the CMV minimization.

The experimental study of the dc-link capacitor voltages balancing algorithm with the

faulty dc-link is carried out as shown in Fig. 8.20. The external capacitor Cext is deliberately

connected across the dc-link capacitor−2 to resemble the faulty condition. The Cext value is the same as that of Cdc. The voltage vc2 dropped with the step connection, and recovers

back to the voltage level of vc1 and vc3. This operation is similar to the simulation results

presented in Fig. 8.13. A fast recovery time of 12 ms is noticed. Even during the transient

period, where the net dc-bus voltage recovers back to its reference value, the dc-link capacitor

voltages are well balanced. Similar to the simulations, the grid currents effectively track to

their references even with the faulty dc-link. A robust performance is obtained for the

capacitor voltages balancing, and this test validates the simulation results.

202

vcmv

i∗ag

iag

vc1 vc2 vc3

λcmv,i = 0λcmv,i = 0 λcmv,i = 0.0008λcmv,i = 0.0008

(a) (b)

Figure 8.19: Experimental results for grid-tied inverter common-mode voltage minimization.

ic,ext

i∗ag

iag

vc1 vc2

vc3 vi,ab

Cext is OFF Cext is ON

(a)

(b)

Figure 8.20: Experimental results with step-connection of capacitor Cext across Cdc2.

203

ω∗m

ωm

vas

ias

P∗in Pin

vdc Pg

vc1 vc2 vc3iag

(a)

(b)

(c)

ω∗m = 1.0 p.u. ω ∗ m = 0.8 p.u.

Figure 8.21: Experimental results with step change in ω∗m from 1.0 to 0.8 p.u..

The experimental dynamic response of the system for a step-change in PMSG speed

reference is investigated and presented in Fig. 8.21. The moment of inertia for the PMSG

used in the experimental tests is very low compared to the simulations. Due to this, the

transient duration is lower compared to the simulations. The time duration of the simulation

and experimental tests is 1.5 and 1.0 s, respectively. The reference speed command is directly

given by the user. A step change in the speed reference from 1.0 to 0.8 p.u. is provided

from the control desk. A similar dynamic response is observed in the experimental test.

The control variables shifted their steady-state operation from 1.0 to 0.8 p.u.. The dc-link

capacitor voltages are well balanced even during the transient condition.

204

The experimental results with the step changes in the Q∗g is presented in Fig. 8.22. The

fsw and CMV minimization is not considered. The mechanical speed of the PMSG is main-

tained at 0.8 p.u. which produces 0.512 p.u. active power. The Q∗g pattern is similar to the

simulation results presented in Fig. 8.15. Also similar to the simulation results, the grid

reactive power and currents are tracked to their reference with an excellent dynamic response

and no overshoots. The capacitor voltages are well-balanced by the boost converter during

all the reactive power conditions. A slight error between the Q∗g and Qg results because of

the losses in the system. This test verifies that the proposed power converters and control

scheme can be used in high power wind turbines to meet the grid code requirements.

Q∗g

vag

iag

vc1 vc2 vc3 vi,ab

(a)

(b)

Unity PF Unity PFLeading PF Lagging PF

Figure 8.22: Experimental results with step-changes in grid reactive power reference.

205

8.6 Conclusion

In this chapter, a novel medium voltage power conversion system consisting of diode

rectifier, four-level boost converter and four-level diode-clamped inverter is proposed for

megawatt-level PMSG wind turbines. The proposed topology combines the advantages of

low cost passive generator-side converters and efficient grid-side multilevel operation. The

four-level boost converter ensures the balancing of the dc-link capacitor voltages during all

the operating conditions. Since the capacitor voltages are balanced by the boost converter,

the grid-tied four-level inverter has a control freedom in choosing a best switching state.

With this feature, a significant improvement in the grid power quality has been achieved,

even with the lower switching frequency operation.

The proposed algorithm can also mitigate the perturbations in the dc-link. A good

dynamic and robust response is achieved for capacitor voltages balancing during all operating

conditions. A two-step model predictive strategy is proposed and an optimal performance

is obtained compared to the one-step prediction. The results also indicate that the current

digital signal processors can handle the computational requirement of the proposed two-step

prediction. All the control goals are well achieved by minimizing the cost functions during

each sampling interval. The proposed methodology appears as a promising tool to control

high power converters where the power quality is a major concern. In order to comply with

the high power application, the device switching frequencies and common-mode voltages are

minimized without involving any external hardware.

206

Chapter 9

Predictive Control for Low Voltage

Ride-Through Enhancement of

Three-Level Converter Based WECS

As discussed in Chapter 1, among all the grid codes, the low voltage ride-through (LVRT),

also called as fault ride-through, is the major concern for the wind turbine/power converter

manufacturers [12–14]. According to LVRT requirements, during grid faults, the wind en-

ergy conversion system (WECS) should remain connected to the grid regardless of the tur-

bine/generator/converter configuration being used, and must supply reactive power to help

the grid to recover from the voltage dip.

In this chapter, a predictive control scheme is proposed for the LVRT enhancement of

direct-driven permanent magnet synchronous generator (PMSG)-based megawatt-level wind

turbine. The proposed method uses the turbine-generator rotor inertia to store the surplus

energy during the grid voltage dips. The power conversion system is realized using the

three-level configuration introduced in Chapter 7. The wind turbine requirements, such as

maximum power point tracking, net dc-bus voltage control, balancing of the dc-link capaci-

tor voltages, and reactive power generation, are modeled as the reference control variables.

During each sampling interval, these control goals are achieved based on the minimization

of generator- and grid-side cost functions. The coordination of generator- and grid-side con-

verters and the exchange of references during normal and LVRT operation is formulated such

that the net dc-bus voltage is maintained constant (so as to protect the power converters)

while meeting the grid code requirements. Simulation and experimental results are presented

to validate the proposed strategy.

207

9.1 State-of-the-art LVRT Enhancement Methods

Many methods are proposed in literature for the LVRT enhancement of PMSG wind tur-

bines such as [18,304]: pitch control system, over sizing of dc-link capacitors, dissipation of

surplus energy in dc-link crowbar (resistor), storage of surplus energy in the battery banks

and fly-wheel systems, use of power quality conditioning devices, and relevant control of

power electronic converters. The latter concept has found increased acceptance by industry

and academia [52, 67, 293]. Owing to the large moment of inertia, the mechanical system

response of the MW direct-driven wind turbines is much slower compared to the electrical

system response [2]. Using this feature, the surplus energy can be stored in the mechanical

system inertia during the grid voltage dips [67,293,305,306]. This attractive solution, com-

bined with the converter control, is previously analyzed using back-to-back (BTB) connected

NPC converters [67] and current source converters [293, 305]. The same concept is studied

in [306] for a standard boost converter-based WECS. However, its feasibility is not proved

experimentally.

The previously analyzed converter control solutions [67,72,293,305,306] are based on the

classical approach of using cascaded linear regulators and pulse width/ space vector mod-

ulation. The predictive control approach for the LVRT enhancement of the grid-tied NPC

inverter was previously studied in [299,307] through simulations. However, the generator-side

control and complete WECS response during the grid voltage dips is not analyzed.

In this work, the three-level boost (TLB)-NPC converters are used to realize the power

conversion system for PMSG-WECS. The turbine-generator inertia, along with the converter

control-based system on predictive control is used to enhance the LVRT capability. The

continuous- and discrete-time models of the power converters are presented. The generation

of reference control variables and the coordination between the TLB and NPC converters

during the normal and LVRT operation is presented. The control objectives for the TLB

converter are expressed as generator-side cost function, while the grid-side cost function

deals with the NPC inverter control requirements. During each sampling interval, these

cost functions are minimized using the actual measurements and predicted quantities (using

switching states of the converters). The switching states which minimize these cost functions

have been chosen and applied to the TLB and NPC converters directly. To achieve an optimal

control performance, as suggested by [303], a two-step predictive model is utilized.

208

9.2 Configuration of the PMSG-WECS

The power conversion system for the direct-driven PMSG based WECS is shown in Fig.

9.1. More details about the converters are given in Chapter 7.

The pitch control system regulates the output power of the turbine when the wind speed

is above its rated value. The magnitude, phase and frequency of the grid voltages are

monitored by the grid integration supervisory system. It sends appropriate control signals

to the references generation system in the event of grid faults [293]. During the normal and

LVRT operation, with the help of the reference generation system, the reference inductor

current is generated for the TLB converter, while the reference dq-axis currents are generated

for the NPC inverter.

The control objectives for the power converters include:

• TLB Converter:

– regulation of inductor current, idc

∗ to achieve maximum power point tracking (MPPT) during normal operation ∗ to store the surplus energy in the turbine-generator rotor inertia during LVRT operation

– balancing of dc capacitor voltages during all operating conditions to maintain

semiconductor device voltage stress within safe limits

• NPC Inverter:

– regulation of d-axis grid current

∗ to maintain net dc-bus voltage, vdc at its reference value during normal op- eration

∗ to limit the active power output, Pg during LVRT operation – regulation of q-axis grid current to generate reactive power to the grid

– grid synchronization

The generator- and grid-side controllers take appropriate switching actions in order for

the above-mentioned control objectives to be met during normal and LVRT operation. The

grid synchronization is carried out as per the guidelines given in [14].

209

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W in d

Wind

T u rb in e

D irect

D riv

M V

P M S G

D io d e R ectifi

T h ree-L

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T h ree-L

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B o o st

C o n v erter

N P C

In v erter

D C

L in k -2

D C

L in k -1

F ilter

R g ,L

g i a s

i b s

i c s

i a g

i b g

i c g

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i c 1

i c 2

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v d c

i d c

+ +

−

− − P (1 )

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)

Z (0 )

S 1 a

S 2 a

S 1 b

S 2 b

S 1 c

S 2 c

S 1 a

S 2 a

S 1 b

S 2 b

S 1 c

S 2 c

S 1

S 2

C 1

C 2

D 1

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R d c , L d c

C in

P wP

P s

P d c

P g ,Q

W in d T u rb in e

P itch

C o n tro

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G en era

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C o n v erter

C o n tro

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G en era

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S y stem

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C o n tro

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T L B

G a tin

g S ig n a ls,

S r

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G a tin

g S ig n a ls,

S i

i ∗d c

|v c 1 −

v c 2 | =

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g i ∗q

F ig u re

9 .1 : C o n fi g u ra tio

n o f th ree-lev

el b o o st

co n v erter

a n d N P C

in v erter

b a sed

M W

-M V

P M S G -W

E C S .

210

9.3 Storage of Surplus Energy in Turbine-Generator

Rotor Inertia

As discussed in the previous sections, during grid faults the active power injected to the

grid is zero (Pg = 0). The surplus energy must be managed by the wind turbine system and

power converters. By referring to Fig. 9.1, the following analysis can be made:

Pw − Ps = Pm = ωmJ dωm dt

(9.1)

where Pw is power captured from the wind, Pm is mechanical input power to the electric

generator, Ps is active power output of the generator, J is turbine-generator moment of

inertia, and ωm is mechanical shaft speed. If Ps is decreased without altering the power

captured from the wind (Pw), then the mechanical power (Pm = Pw −Ps) increases, and this scenario leads to an increase in the turbine-generator shaft-speed from ωm,R to ωm,max [67]:∫

Pmdt = 1

2 J

( ω2m,max − ω2m,R

) (9.2)

where ωm,max is the maximum value of shaft speed during grid fault, and ωm,R is rated shaft

speed.

The relation between maximum shaft-speed ωm,max and fault duration (dt = tf) can be

obtained from (9.2) as follows:

ωm,max =

√ 2 Pm tf J

+ ω2m,R. (9.3)

In the practical MW direct-driven wind turbines, the value of inertia constant H (= Jω2m,R 2Pm

) is in the range of 5-6 seconds [2,67,293,305], and it will maintain the shaft speed to

a safe limit.

211

9.4 Control System for the PMSG-WECS

The control systems for the generator- and grid-side converters are presented here. They

force the converters to track to the references during normal and LVRT operation.

9.4.1 Generator-side Converter Controller

The proposed control system for the generator-side converter control is shown in Fig.

9.2. The control objectives for the TLB converter are included in the generator-side cost

function as follows:

ggen(k) = [i ∗ dc(k + 2) − idc(k + 2)]2

+ λdc ∗ [vc1(k + 2) − vc2(k + 2)]2 (9.4)

where i∗dc(k + 2) is the extrapolated reference inductor current, idc(k + 2) is the predicted

inductor current, vc1(k + 2) and vc2(k + 2) are the predicted dc-link capacitor voltages, and

λdc is the weighting factor for the balancing of capacitor voltages. The weighting factor

λdc substantiates the importance of the secondary objective (balancing of dc-link capacitor

voltages) over the primary control requirement (regulation of idc). Equal importance will

be given to primary and secondary objectives when λdc = 1, but this scenario leads to a

poor performance for the primary goal. By setting λdc = 0, a very good response can be

obtained for the primary objective, but the dc-link capacitor voltages cannot be regulated.

In this work, the value for λdc is chosen as 0.1 to ensure acceptable balancing for the dc-link

capacitor voltages and good reference tracking for idc.

Predictions for the future behavior of the inductor current and dc capacitor voltages can

be obtained as follows:⎡ ⎢⎣ idc(k + h)

vc1(k + h)

vc2(k + h)

⎤ ⎥⎦ = Φb

⎡ ⎢⎣ idc(k + h − 1) vc1(k + h − 1) vc2(k + h − 1)

⎤ ⎥⎦ + Γb

⎡ ⎢⎣ vin(k + h − 1) io1(k + h − 1) io2(k + h − 1)

⎤ ⎥⎦ (9.5)

where h is the prediction horizon length. Φb and Γb are given in (7.11).

The dynamic systems in (9.5) suggests that the generator-side control variables (idc, vc1

and vc2) do not require the model of the PMSG and the wind turbine. This feature greatly

simplifies the complexity of the control system compared to the one used with the BTB-NPC

212

converters. The current state (k) measurements and the four switching states are used in

the prediction of future behavior of the control variables. With the optimal selection of

switching signals, the control variables can be effectively controlled.

Output Currents

Calculation (7.10)

Generator-side

Predictive

Controller

using (9.5)

Cost Function

ggen(k)

Minimization

using (9.4)

Extrapolation

iag(k) ibg(k)

icg(k)

io1(k) io2(k)

io1(k + 1) io2(k + 1)

Si(k)

Sr(k)

vc1(k) vc2(k)

vc1(k + 2) vc2(k + 2)

vin(k)

vin(k + 1)

idc(k)

idc(k + 2)

i∗dc(k) i∗dc(k + 2)

|vc1 − vc2| = 0

Figure 9.2: Proposed model predictive controller for the generator-side converter.

SRF-PLL

and

abc/dq

Transformation

Grid-side

Predictive

Controller

using (8.14)

Cost Function

ggrid,(k)

Minimization (9.6)

Extrapolation

iag(k)

vag(k)

ibg(k)

vbg(k)

icg(k)

vcg(k)

Si(k)

vc1(k) vc2(k)

θg(k)

i∗dg(k)

i∗qg(k)

i∗dg(k + 2)

i∗qg(k + 2)

idg(k + 2) iqg(k + 2)vdg(k) vqg(k)

vdg(k + 1) vqg(k + 1)

idg(k) iqg(k)

Figure 9.3: Proposed model predictive controller for grid-side inverter.

213

9.4.2 Grid-side Inverter Controller

The proposed grid-side inverter controller is shown in Fig. 9.3. The grid-side inverter is

used to control the d- and q-axis currents. This control objective is expressed as a grid-side

cost function:

ggrid(k) = [ i∗dg(k + 2) − idg(k + 2)

]2 +

[ i∗qg(k + 2) − iqg(k + 2)

]2 (9.6)

where i∗dg(k + 2) and i ∗ qg(k + 2) are the extrapolated reference currents, and idg(k + 2) and

iqg(k + 2) are the predicted dq-axis currents. The prediction for dq-axis grid currents is

obtained according to the models given in Chapter 8.

Anemometer

MPPT

λT,op×vw(k) rT

−

×÷

vw(k) ωm(k)

ω∗m(k)

Q∗g(k)

v∗dc(k)

vdc(k) vc1(k) vc2(k)

3.062 × vbg

∑

(·)2

(·)2 √ (·)

i∗dc,NORM(k)

i∗dc,LV RT (k)

i∗dc(k)

i∗dg,NORM(k)

i∗dg,LV RT (k)

i∗dg(k)

i∗qg,NORM(k)

i∗qg,LV RT (k)

i∗qg(k)vdg,pu(k)

vdg(k)

≤ 0.9 −1.5 vdg(k)

ibg · √ 2

0 = NORM 1 = LVRT

LVRT

Signal

Look-up Table

G ri d In te g ra ti o n S u p er v is o ry

S y st em

Figure 9.4: Generation of reference control variables during normal and LVRT operation.

214

9.5 Generation of Reference Control Variables

In the previous section, the generator- and grid-side cost functions are designed based on

the assumption that the references are readily available. The generation of such references

is very important in order to allow for the safe operation of power converters and wind

turbines, and also to meet the grid codes. The block diagram of the references generation

system is shown in Fig. 9.4.

9.5.1 Normal Operation

The maximum power point tracking (MPPT) is an important issue in variable speed

WECS. In this research an optimal tip-speed-ratio (OTSR) MPPT algorithm [51] is used.

This algorithm provides reference speed based on the measured wind speed. As shown in

Fig. 9.4, a speed regulator (PI) generates the corresponding inductor current reference. The

PMSG speed, current and electromagnetic torque can be regulated by tracking this reference.

The dq-axis grid current references are generated by a method similar to the classical voltage

oriented control [2]. Through the PI controller-based regulation of net dc-bus voltage, the

d-axis reference current is generated. With the Q∗g command provided by the grid operator,

the q-axis reference current is obtained.

9.5.2 LVRT Operation

The TSOs and DSOs of diverse countries issue different LVRT profiles [13] based on the

experience acquired through the operation of their power systems. The LVRT profiles can

be broadly classified into six different categories as shown in Fig. 1.5. Despite their different

shapes, they all share a common purpose and background, i.e., to keep the electric power

system stable and secure during the grid fault conditions.

Among all the LVRT profiles, the German Transmission and Distribution Utility (E.ON)

regulation [17] is likely to set the standard. According to this grid code, the LVRT function

should start when the grid voltage falls below 90 % of its nominal value. For the grid voltages

in the range of 50−90 %, the generation system should provide 2 % reactive current for each 1 % voltage dip, and when the grid voltage falls below 50 %, the system should provide 100 %

reactive current. In this work, the dq-axis reference grid currents are produced according to

the E.ON grid code and shown in Fig. 9.4.

215

9.6 Simulation Results

To validate the proposed converter and control scheme during grid voltage dips, simula-

tion results are presented using MATLAB/Simulink. The parameters of the PMSG-WECS

are shown in Table 9.1. To better compare the simulation and experimental results, the

computational delay caused by the real-time digital signal processor is considered in the

simulation tests, and this value is set to one sampling period, Ts. Two-step predictive mod-

els are used in all the tests. To reduce simulation run time, the original moment of inertia is

reduced to 14.5 %. The PMSG-WECS is assumed to be operating at the rated wind speed

condition. The average switching frequencies for the TLB and NPC converters are noted

as: 253 and 740 Hz, respectively. The average switching frequencies can be minimized to

lower values by including extra constraint in the cost functions ggen(k) and ggrid(k). The

grid current THD is found to be 4.41 %.

9.6.1 Analysis with Generator-side LVRT Controller Disabled

In the first test, as demonstrated in Figs. 9.5 and 9.6, the generator-side LVRT controller

is disabled meaning that i∗dc(k) = i ∗ dc,NORM(k), and the grid-side LVRT controller is enabled

([i∗dg(k) = i ∗ dg,LV RT (k) and i

∗ qg(k) = i

∗ qg,LV RT (k)](refer to Fig. 9.4). As shown in Fig. 9.5(a),

a dip in the grid voltage is applied from 100 % to 10 % at t = 2.0 s, with a duration of 150

ms.

Since the generator-side references correspond to the MPPT operation, the PMSG shaft

speed (ωm), electromagnetic torque (Te), stator voltage (vs,ab), stator current (ias) and input

dc voltage (vin) do not respond to the LVRT operation as depicted in Fig. 9.6. The PMSG

currents contain significant 5th and 7th harmonics (mainly caused by the diode-bridge recti-

fier) which leads to higher ripple in Te. The use of diode rectifier also leads to the clipping

of the generator terminal voltage. The shape of the generator voltage changes according to

the configuration of the diode rectifier, Cin value and the operating condition [68]. This is

the only disadvantage of using diode-rectifiers for the PMSG turbines. Due to the decoupled

nature of the power converters, these harmonics are not reflected to the grid, and thus they

do not cause any conflict to the grid codes.

During the voltage dip, the active power injected to the grid is zero [i∗dg(k) = 0] [Fig.

9.5(b)], but, the PMSG injects rated power into the dc-link. According to the power balance

216

Table 9.1: Parameters of the proposed PMSG-WECS

Simulation Experimental

Variable Description SI p.u. SI p.u.

Wind Turbine Parameters

PM Rated Power (kW) 3000 1.0 3.6 1.0

TM Rated Torque (kN.m) 1273.3 1.0 0.2292 1.0

NM Rated Speed (rpm) 22.5 1.0 150 1.0

Rgb Gear Ratio 1 1

rT Rotor Radius (m) 43.3553 –

ρ Air Density (kg.m2) 1.225 –

Cp,op Optimal Power Coefficient 0.48 –

λT,op Optimal Tip Speed Ratio 8.5128 –

Permanent Magnet Synchronous Generator Parameters

Pm Rated Mechanical Power (kW) 3000 3.6

Ps Rated Output Active Power (kW) 2962 3.527

vsl Rated Line-Line Voltage (V) 3000 208

vs Rated Phase Voltage (V) 1732.2 1.0 120 1.0

is Rated Stator Current (A) 582 1.0 10 1.0

fs Rated Stator Frequency (Hz) 9.75 1.0 20 1.0

P Fs Rated Power Factor 0.98 0.98

nm,R Rated Rotor Speed (rpm) 22.5 1.0 150 1.0

P P Number of Pole Pairs 26 8

Tm,R Rated Mechanical Torque (kN.m) 1273.24 1.0 0.2292 1.0

λr Rated rms Rotor Flux Linkage (Wb) 28.059 1.0 0.956 1.0

Rs Stator Winding Resistance (mΩ) 37.521 0.013 245 0.021

Ld d-axis Synchronous Inductance (mH) 9.75 0.2 19.1 0.2

Lq q-axis Synchronous Inductance (mH) 9.75 0.2 19.1 0.2

J Moment of Inertia (kg.m2) 6327

H Inertia Time Constant (s) 5.81

Λbs Base Flux Linkage (Wb) 28.059 1.0 0.956 1.0

Zbs Base Impedance (Ω) 2.978 1.0 12.024 1.0

Lbs Base Inductance (mH) 48.606 1.0 95.683 1.0

Cbs Base Capacitance (μF) 5481.9 1.0 661.83 1.0

vbs,peak Peak Base Voltage (V) 2449.7 1.414 169.9 1.414

ibs,peak Peak Base Current (A) 823.1 1.414 14.14 1.414

Medium Voltage Grid Parameters

Sg Rated Apparent Power (kVA) 3000 1.0 3.6 1.0

vgl Rated Line-Line Voltage (V) 3000 208

vg Rated Phase Voltage (V) 1732.2 1.0 120 1.0

ig Rated Stator Current (A) 577.35 1.0 10 1.0

fg Rated Stator Frequency (Hz) 60 1.0 60 1.0

Zbg Base Impedance (Ω) 3 1.0 12.018 1.0

Lbg Base Inductance (mH) 7.96 1.0 31.88 1.0

Cbg Base Capacitance (μF) 884.19 1.0 220.72 1.0

vbg,peak Peak Base Voltage (V) 2449.7 1.414 169.9 1.414

ibg,peak Peak Base Current (A) 816.5 1.414 14.14 1.414

Rectifier and Inverter Parameters

Cin Input Capacitance (base: Cbs) (μF) 18828 3.43 4700 3.43

Cdc Output dc-link Capacitance (μF) 4006 4.53 1000 4.53

Rdc Boost Filter Leakage Resistance (Ω) 0.3 0.01 0.12 0.01

Ldc Boost Filter Inductance (mH) 2.5 0.31 10 0.31

Rg Grid-side Filter Resistance (Ω) 0.027 0.009 0.108 0.009

Lg Grid-side Filter Inductance (mH) 1.65 0.207 6.6 0.207

Controller Parameters

h Prediction horizon length 2 2

Ts Sampling Time (s) 100 μ 100 μ

λdc Weighting Factor 0.1 0.1

v∗ dc

Reference dc-link Voltage (V) 5304 3.062 367 3.062

217

vag vbg vcg

vdg

vqg

iag ibg icg

idg

iqg

vdcv ∗ dc

vc1

vc2

vi,ab

(a)

(b)

(c)

(d)

(e)

Normal LVRT Recovery from LVRT Normal (Theoretical Only)

−1

−1 −2 −3

1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1

Time (s)

Scale = 1/vbg,peak

Scale = 1/ibg,peak

Scale = 1/v∗dc

Figure 9.5: Simulation results during three-phase grid voltage dip with the generator-side LVRT controller disabled (Part–I).

218

vag vbg vcg

vdg

vqg

ωm/ωm,R Te/Tm,R

i∗dc idc

vs,ab/vbs,peak ias/ibs,peak

vin

(a)

(b)

(c)

(d)

(e)

Normal LVRT Recovery from LVRT Normal (Theoretical Only)

−1

−2

−1

−2

1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1

Time (s)

Scale = 1/vbg,peak

Scale = 1/ibs,peak

Scale = 1/vbs,peak

Figure 9.6: Simulation results during three-phase grid voltage dip with the generator-side LVRT controller disabled (Part–II).

219

theorem, the surplus energy should be stored in the dc-bus. As a consequence, the net

dc-bus voltage is increased to 4 times its rated value [Fig. 9.5(c)], and in real systems, this

will destroy both the TLB and NPC converters. For this reason, some works proposed to

dissipate this surplus energy using a resistor in the dc-link (crowbar), and some other works

proposed to store this energy in the battery banks [18,304].

As shown in Fig. 9.5(d), the vc1 and vc2 are balanced by the TLB converter even during

the divergence period (t = 2.0 to 2.15 s). Due to the significant increase in vc1 and vc2, the

inverter voltage magnitude [refer to Eq. (7.1)], the ripple in inductor current [Eq. (9.5)],

and the ripple in dq-axis grid currents [Eq. (8.14)] increases. This scenario leads to non-

compliance of grid codes, in addition to the failure of power converters.

At t = 2.15 s, the grid voltages recover back to its normal operating condition. The

saturation limits of the dc-bus PI controller is set to 1.5 times ibg,peak. This helps to quickly

discharge the capacitor voltages by injecting more active power to the grid. In theory, the

system returns back to its normal operation at t = 2.8 s (only if the power converters do

not fail during the LVRT operation).

9.6.2 Analysis with Generator-side LVRT Controller Enabled

The simulation results using the generator-side LVRT controller are presented in Figs.

9.7 and 9.8. The reference control variables are: i∗dc(k) = i ∗ dc,LV RT (k), i

∗ dg(k) = i

∗ dg,LV RT (k)

and i∗qg(k) = i ∗ qg,LV RT (k). The profile of grid voltage is similar to the previous case. Since the

PMSG speed control loop is disabled, the surplus energy is stored in the inertia of turbine

and generator. As shown in Fig. 9.8(b), with the reduced inertia constant H = 0.4, the

PMSG speed increases to 17 % above its rated value. This can be theoretically conformed

as:

ωm,R = nm,R × 2 × π

60 = 2.3562 rad/s

J = H × 2 × Pm

ω2m,R = 432.3 kg.m2

ωm,max =

√ 2 Pm 150 × 10−3

J + ω2m,R = 2.7629 rad/s

ωm,max − ωm,R ωm,R

× 100 = 17.3 %.

By using the original value of H = 5 [2,67,293,305], the percentage increase in ωm can

be obtained as 1.48 % and 6.02 % for the fault durations of 150 ms and 625 ms, respectively.

220

vag vbg vcg

vdg

vqg

iag ibg icg

idg

iqg

vdcv ∗ dc

vc1 vc2

vi,ab

(a)

(b)

(c)

(d)

(e)

NormalNormal LVRT Recovery from LVRT

−1

−1 −2 −3

1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1

Time (s)

Scale = 1/vbg,peak

Scale = 1/ibg,peak

Scale = 1/v∗dc

Figure 9.7: Simulation results during three-phase grid voltage dip with the generator-side LVRT controller enabled (Part-I).

221

vag vbg vcg

vdg

vqg

ωm/ωm,R

Te/Tm,R

i∗dc idc

vs,ab/vbs,peak

ias/ibs,peak

vin

(a)

(b)

(c)

(d)

(e)

NormalNormal LVRT Recovery from LVRT

−1

−2

−1

−2

1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1

Time (s)

Scale = 1/vbg,peak

Scale = 1/ibs,peak

Scale = 1/vbs,peak

Figure 9.8: Simulation results during three-phase grid voltage dip with the generator-side LVRT controller enabled (Part-II).

222

This analysis conforms that the turbine-side mechanical system response is much slower

compared to the grid-side electrical system response.

During the LVRT interval, t = 2.0 to 2.15 s, the electromagnetic torque is maintained at

zero to allow the PMSG to accelerate as shown in Fig. 9.8(b). The active power generated

by the PMSG is zero, and this can be understood from the zero values of PMSG and inductor

currents [Fig. 9.8(d)]. The magnitude of the net dc-bus voltage is maintained within safe

limits, and the dq-axis grid currents track to their reference values with minimal ripple.

During the step-change in references at t = 2.0 s, the inductor and grid currents follow

their references accurately (shown in box). The input dc voltage magnitude increases with

respect to the generator speed, but, this increase is in the acceptable limits. During the

recovery from the LVRT operation (t = 2.15 s onwards), the inductor current reference is

maintained at its higher saturation level to help the PMSG to decelerate rapidly. At t = 3.8

s, the system recovers back to normal operation without causing any failures to the power

electronic converters.

These results confirm that the proposed converters and predictive control can be used

efficiently in the MW PMSG-WECS. For the compliance with new grid code requirements,

the rather old concept of storing energy in the inertia of rotating masses is applied to wind

energy system, and this approach eliminates the cost and complexity associated with the

conventional approach of dc-link crowbar. This method is more efficient because no energy

is dissipated in the crowbar. Moreover, the proposed approach is safe because most of

the commercial wind turbines are equipped with the over-speed capability. For example,

the Yaskawa R© is offering a MV DD-PMSGs (Enewin-Generators) for wind turbines in the power ratings of 2–5 MW@3000 V. These generators have over-speed capability of 130 % for

2 minutes.

When the fault duration is too long, the generator may cross the threshold level of over-

speed capability, and the output voltage of diode-rectifier vin (≈ 1.35 × vsl) may exceed its threshold limit. When this scenario happens, which ever is first, the pitch mechanism and

brake enter into action to trip the turbine. It should be noted that the vin does not increase

significantly compared to the vdc. As shown in the summary of the state-of-the-art national

grid codes in Table 1.3, the maximum grid voltage sag duration, without allowing wind

turbine tripping is 625 ms. The previous analysis indicates that the increase in vin for the

maximum fault duration is 6.02 % only. Therefore, according to Table 1.3, beyond 625 ms

223

the turbine is allowed to be disconnected from the point of view of grid-connected WECS.

vinFiltered vin

NormalNormal LVRT Recovery from LVRT

1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1

Time (s)

Scale = 1/vbs,peak

Figure 9.9: Simulation result for input dc voltage vin during three-phase grid voltage dip with the generator-side LVRT controller enabled and Cin = 820 μF.

For the simulation results presented in Figs. 9.5, 9.6, 9.7 and 9.8, the value of Cin is

chosen as 3.43 p.u.. The generator-side base capacitance Cbs is much larger compared to the

grid-side base capacitance Cbg due to the lower fundamental frequency of PMSG (refer to

Table 9.1). Due to this reason, the Cin value is much larger compared to Cdc. The Cin has

less impact on the system performance, and thus its value can be decreased significantly to

further reduce the cost and size of overall power converter. The simulation results shown in

Figs. 9.7 and 9.8 are repeated with Cin = 820 μF (0.15 p.u.) and the waveform for vin is

presented in Fig. 9.9. Due to lower value of Cin, the ripple in vin increases, but by using

filtered vin in the control scheme (refer to Fig. 9.2) the system response during normal and

LVRT operation becomes similar to Figs. 9.7 and 9.8. The voltage rating for the Cin is

decided according to the maximum rise in the mechanical shaft speed ωm,max. To fulfill the

state-of-the-art LVRT requirements with the maximum fault duration of 625 ms, the voltage

rating of Cin becomes approximately 4293 V (=1.35 × 3000 × 1.06) [84]. To realize input dc-link, 10 units of 8200 μF, 450 V capacitors can be connected in series. It should be noted

that the cost of input dc-link is very low ($470) compared to the cost of one 6.6 kV, 1200 A

IGCT ($1800) [11]. The work in [113] demonstrated that the power conversion system can

also work without employing Cin. The elimination of Cin, and the analysis of its impact on

torque ripple, grid-side converter control and LVRT operation is considered as future work.

224

9.7 Experimental Results

A low power prototype model is developed as shown in Fig. 9.10.

Wind Turbine Emulator

Grid Fault

Emulator

DSP/ FPGA

Controller

dSPACE DS1103

Controller-2

MATLAB/ Simulink & Control Desk

DS1103 Controller-1

CP1103 Connecter

Gate Drivers & Interface Unit

d c P o w er

S u p p ly

U n it

ω m v in i d c

v c 1

v c 2

v a g

i a g

v b g

i b g

Power Conversion System

(a) Block diagram

H I

J K

(A) key board, (B) DSP/FPGA controller, (C) prime mover, (D) non-salient pole PMSG, (E) NPC inverter, (F) three-level boost converter, (G) grid-side filter, (H) voltage and current transducers, (I) DS1103 R&D controller,

(J) measurement system, (K) control desk, and (L) three-phase grid fault simulator.

(b) Photograph of complete setup

Figure 9.10: Experimental setup.

225

Two mechanically coupled PMSGs are used. The first PMSG, along with a DSP/FPGA

controller, is used as a prime mover to provide the required mechanical torque emulating

the wind for the second PMSG. These machines have been obtained from a real wind farm,

and they feature over-speed capability similar to the MW-DD generators. The TLB and

NPC converters are controlled by a dSPACE DS1003 rapid prototyping board. The grid

fault emulator is developed based on a two-level inverter with an output LC filter, which is

controlled using another DS1103 platform. More details about the experimental setup can

be found in Section 7.4.

It should be noted that slower switching times of the IGBTs does not affect the predictive

control strategy. In the predictive control approach, sampling time (Ts) is selected based

on the minimum execution time required to perform the optimization algorithm during each

sampling interval [81,279]. Unlike in the classical modulation-based control techniques [67],

the selection of Ts is not related to the switching frequency [81, 279]. In other words, for

a given value of Ts, the predictive controller can operate with a wide range of switching

frequencies by just including a constraint in the cost function. In the present experimental

tests, the dSPACE controller can handle all the calculations and two-step predictions related

to the proposed method within 100 μs.

The moment of inertia of the PMSG used in the experimental set-up is very low, which

means that, during grid fault condition, it reaches the over-speed threshold quickly compared

to the PMSG used in simulation analysis. To avoid an unexpected increase in speed, the

fault duration is reduced from 150 to 75 ms, but the depth of the voltage dip is same

as of simulations. Even though the duration of grid fault is different in the simulations

and experiment, the operating principle remains same. Due to hardware restrictions, the

saturation limit of the dc-bus PI controller is set to 1.2 times ibg,peak.

The experimental results with the proposed strategy are presented in Figs. 9.11 and

9.12. The PMSG operates at rated condition and the average switching frequencies for the

TLB and NPC are noted as 280 and 760 Hz, respectively. The THD of the grid currents is

measured as 5.2 %. The transient responses during the grid voltage dip from 100 % to 10 %

are shown in boxes. The voltages generated by the grid fault simulator contain less THD.

But it has been demonstrated in Chapters 5 to 8 that the predictive control technique is

robust against grid voltage harmonics and also grid-side filter parameter variations.

During the LVRT interval, the generator shaft speed and input dc voltage are increased

226

vag vbg vcg

vdg

iag idg

iqg

vdc

(a)

(b)

NormalNormal LVRT Recovery from LVRT

Figure 9.11: Experimental results during three-phase grid voltage dip with the generator-side LVRT controller enabled (Part-I).

227

vc1 vc2 vi,ab

ωm

idc

vs,ab

ias

vin

(a)

(b)

NormalNormal LVRT Recovery from LVRT

Figure 9.12: Experimental results during three-phase grid voltage dip with the generator-side LVRT controller enabled (Part-II).

228

similar to the simulation results. Due to the low moment of inertia, the percentage of speed

increase is high compared to the simulation. This would not be the case with MW turbines.

During this time frame, the inductor current and stator currents are maintained at zero

value. The grid currents corresponding to the active and reactive power are maintained

at their reference values during normal and LVRT operation. The net dc bus voltage is

maintained within safe limits and the dc-link capacitor voltages are well balanced during all

the operating conditions.

A delay time of 3 ms is noticed from the instant the grid voltages become zero and the

reactive current becomes 100 %. This is mainly due to the dead-time caused by the voltage

and current sensors, gate drivers and controller. The E.ON grid codes indicate that the

control actions should be taken within 20 ms if the grid voltage drops below 90 %. The

response time of 3 ms provides excellent compliance with the grid codes. Similar to the

simulations, the grid and inductor currents track their references accurately (shown in box).

This is made possible due to the elimination of the linear regulators and modulation stage in

the controller design. The experimental results presented here confirm that the LVRT com-

pliance can be enhanced efficiently using the proposed power converters and control scheme.

This analysis considers symmetrical grid fault conditions, but it is also possible to include

unsymmetrical grid faults as outlined in [299]. The system analysis with unsymmetrical grid

faults is considered as a possibility for future work.

229

9.8 Conclusion

A model predictive control scheme is proposed for the LVRT enhancement of megawatt

direct-driven PMSG wind turbines. The proposed approach is based on the storage of surplus

energy in the turbine-generator shaft inertia during the grid faults. The reference control

variables are exchanged during the LVRT operation to protect the power converters (by

limiting the dc-bus voltage to safe limits), while meeting the grid code requirements. This

method is most favorable for megawatt direct-driven wind turbines which possess extensive

moment of inertia. The proposed solution is verified for a medium voltage PMSG-WECS

based on a three-level boost and NPC converters. The experimental results indicate that

during the grid faults the proposed predictive control provides smooth transition between

normal and LVRT operation with a response time of 3 ms.

230

Chapter 10

Conclusions

The present wind energy industry indicates a trend towards the research and develop-

ment of megawatt-level wind turbines. The major interests of the current wind turbine

manufacturers include: variable-speed (Type-4) technology, direct-driven (DD) permanent

magnet synchronous generator (PMSG), medium voltage (MV) operation and development

of sophisticated control systems to increase the wind energy conversion efficiency and to

meet stringent grid codes. In this work, by incorporating the aforementioned wind industry

interests as basic components, two novel power converter configurations, and various model

predictive control schemes, have been developed and validated aimed at next generation 3–15

MW wind turbines.

The outcome of the research work presented in this dissertation has brought several

major innovations in the development of next generation converter configurations and con-

trol schemes for the megawatt wind energy systems. The proposed configurations are very

promising for the future development as they have been designed by combining the best

features of the existing commercial wind turbine solutions. The research results presented

here also promote the predictive control strategy as a simple, efficient and high performance

control tool for megawatt power converters which operate at a very low (< 1 kHz) switching

frequency. Various control objectives such as grid/inductor currents, dc-link capacitor volt-

ages, switch changes, common-mode voltage, net dc-bus voltage, grid active power and grid

reactive power are included in the design and operation of the predictive controller. The

modeling and analysis presented in this work can be used in other power electronics and

energy system applications.

231

10.1 Summary of Major Contributions

The major contributions and conclusions of this research work are summarized as follows.

1) A review of the wind energy industry, full-scale power converters and digital

control schemes is presented

• An extensive survey on the past, present and future trends of the wind energy market is presented to fill gaps in the existing literature,

• A review of practical and emerging full-scale power converters is presented. Var- ious technical issues, features and drawbacks are analyzed, and important survey

results are summarized by tables, and

• Various classical and advanced control techniques are discussed and compared based on an intuitive example of load current control.

2) Novel three-level converters are proposed for 3–4 kV WECS

In this dissertation, a novel power converter topology using a diode rectifier, three-

level boost converter and neutral-point-clamped (NPC) inverter is proposed for the

next-generation DD-PMSG based 3–4 kV class WECS. Compared to the commercially

available back-to-back (BTB) connected NPC converter, the proposed configuration

uses less number of active switches and thus it is less expensive and reliable. The

dc-link capacitor voltages are balanced during all operating conditions by the boost

converter. Because of the control freedom for the NPC inverter, the grid current

harmonic distortion is noted to be lower compared to the BTB-NPC converters.

3) Four-level converters are proposed for 4–10 kV WECS

A new power conversion system based on four-level converters is explored aimed at

the next generation 4–10 kV class WECS. The grid current quality has been increased

significantly compared to the three-level converters. To solve the problem of the dc-link

capacitor voltages balancing, which is more complicated compared to the three-level

converters, a four-level boost converter is proposed as an intermediate stage. Despite

the large number of active switches and clamping diodes used in the four-level inverter,

the cost of this configuration is approximately the same as that of the BTB-NPC

converter.

232

4) Continuous- and discrete-time models are presented

In this work, the continuous-time model of the variables to be controlled is presented in

terms of power converter switching states. Several variables, such as load/grid/inductor

currents, dc-link capacitor voltages, switching frequency, common-mode voltage, net

dc-bus voltage, active power and reactive power, are incorporated in the design of the

system model. All the continuous-time models have been converted to discrete-time

so as to incorporate the control delay and prediction horizon.

5) A generalized method is proposed to control the multilevel diode-clamped

converters (MLDCCs)

In this dissertation, similar to those in the classical control methods, a generalized ap-

proach based on FCS-MPC strategy is presented for the load/motor/grid current con-

trol, dc-link capacitor voltages balancing, switching frequency reduction and common-

mode voltage mitigation in MLDCCs. The proposed method shows a promising solu-

tion to controlling the converters with diverse control objectives and constraints.

6) Two advanced techniques are proposed to control the grid-tied converters

The grid-tied multilevel converters are crucial to the dispatch of generated power and

also in meeting the grid codes. In this dissertation, two advanced control schemes

based on FCS-MPC are proposed:

• In the first control strategy, the net dc-bus voltage and grid reactive power are controlled, assuming that the generator-side converter performs MPPT;

• In the second strategy, the grid active and reactive powers are controlled with an assumption that the generator-side converter regulates the net-dc bus voltage;

• In both methods, the voltage stress and switching losses of the semiconductor switches are reduced by balancing the dc-link capacitor voltages and by minimiz-

ing the switching frequency below 1 kHZ, respectively;

• An excellent dynamic response has been achieved by eliminating the internal current control loops and modulators; and

• Compared with the classical decoupled voltage-oriented control, a better reference tracking and power quality has been achieved.

233

7) Complete control systems have been built for the 3L and 4L converters based

WECS

A step-by-step procedure for the design of a complete control system for the proposed

3L and 4L converters based MW-MV-DD-PMSG-WECS is presented. The objectives

such as MPPT, dc-link capacitor voltages balancing, regulation of net dc-bus voltage,

reactive power generation, lower switching frequency operation, and common-mode

voltage minimization are considered in the design of generator- and grid-side cost func-

tions. The proposed solutions can be easily extended to other WECS configurations

and motor drive applications.

8) FCS-MPC strategy is proposed for the low voltage ride-through (LVRT) en-

hancement of PMSG wind turbines

A predictive control scheme is proposed for the LVRT enhancement of DD-PMSG

wind turbines. The proposed approach is based on the storage of surplus energy in the

turbine-generator shaft inertia during the grid faults, and thus no additional dc-link

crowbar (resistor) is required. The exchange of reference control variables between

normal and LVRT operation is suggested to protect the power converters (by limiting

the dc-bus voltage to safe limits), while meeting the grid code requirements. The pro-

posed method is most favorable for the high power wind turbines which possess large

moment of inertia. The E.ON grid code indicates that the control actions should be

taken within 20 ms if the grid voltage drops below 90 %. In this work, a response time

of 3 ms is achieved to switch from the normal to LVRT operation mode.

9) Various challenges related to the FCS-MPC strategy are addressed

• In order to solve the variable switching frequency nature of the predictive control strategy, a look-up table based on weighting factor selection is proposed and

verified. This approach guarantees the regulation of switching frequency within

the set boundary limits (for example 750-850 Hz);

• A detailed empirical procedure for the selection of weighting factors is presented to fill the gap in literature;

• A novel extrapolation method is proposed to estimate the future values of the synchronous reference frame variables. The proposed method eliminates the os-

234

cillations in the reference active and reactive powers (which are control variables

for the case study considered), and the spike in the inverter line-line voltage. This

method leads to safe and reliable operation for the semiconductor devices during

step-changes in the reference control variables;

• A simplified two-step predictive control strategy is proposed to improve the per- formance and also to reduce the computational burden involved in the real-time

implementation. The proposed solution offers accurate tracking to the reference

control variable, lower dv/dt in the output voltage waveform and lower switching

frequency compared to the standard one-step and two-step prediction methods;

• A novel delay compensation technique is introduced for the FCS-MPC. Compared to the state-of-the-art works which compensate the control delay at the expense

of higher switching frequency, the proposed technique shows a better solution

without increasing the converter switching frequency. The proposed solution is

promising for high power applications where lower switching frequency operation

is mandatory; and

• Performance of the proposed predictive control techniques are investigated with the perturbations in the grid-side filter and dc-link parameters. The results indi-

cate that the proposed controllers are robust and can compensate for the system

perturbations, while the control variables continue to effectively track to their

references.

10) Simulation and experimental studies are conducted to verify the system

operations

All the simulation studies are carried out using MATLAB/Simulink software. The

predictive control algorithms are developed using MATLAB S-Builder function for an

easy transfer of code to real-time implementation.

Several low power prototype converters have been built such as BTB 2L-, 3L- and 4L-

VSCs; and 2L-, 3L- and 4L-boost converters. All the theory, control system design and

simulation results are validated through the experimental tests. A dSPACE DS1103

rapid prototyping controller based test platform has been developed. A grid-fault

simulator based on 2L-4Leg-VSC is developed which can generate different symmetrical

and unsymmetrical output voltage waveforms.

235

10.2 Future Works

The following future research works are suggested as an extension to the knowledge

presented in this dissertation.

1) Comparison of proposed controllers with the classical control techniques

To contribute to the ongoing research on predictive control, and to clearly distinguish

this method from classical control techniques, comparison studies can be carried out.

2) Active damping of the LCL filters employed in the grid-connection

The variable switching frequency operation with the FCS-MPC method causes grid

current harmonics to spread over the whole spectrum. These harmonics cause more

challenges for the operation of grid-connected converter even during normal operation.

The proper design of predictive controller with LCL filters should be studied.

3) Investigation of other multilevel converters for wind energy

Since the dc-link capacitor voltages are controlled by the intermediate dc-dc converter,

other multilevel converter configurations can be used to reduce or completely eliminate

the grid-side filter.

4) Operation of the proposed WECS under unbalanced grid voltage dips

Investigation of PMSG-WECS behavior under unbalanced grid fault conditions and

development of new control systems represent a very good research direction to meet

the emerging grid code requirements.

5) Study of stability issues with the predictive control

The stability issues with the FCS-MPC strategy should be studied by employing dif-

ferent discretization methods and prediction horizons.

6) Application of proposed control philosophies to other power electronic con-

verters

The generalized modeling and control approach presented in this dissertation can be

extended to flying capacitor, active NPC and novel power electronic converters.

236

Appendix A

List of Commercial Wind Turbines

The megawatt-level projects based on SCIG/PMSG/WRSG/HTS-SG which are in the

development stage are summarized in Table. A.1.

Table A.1: Future development of full-scale converters based MW wind turbines

Manufacturer Model Gear and Generator Rating Rotor (m) Release By

China Energine CE2 MW Direct Drive PMSG 2.0 MW 93 2014

United Power UP100 − 3000 Direct Drive PMSG 3.0 MW, 690 V 101 − Marvento M3.6 − 118 Direct Drive PMSG 3.6 MW, 3900 V 118 2014

Envision Energy E128 − 3.6 MW Dual Drive PMSG 1.9 MW×2, 730 V 128 2014 Siemens SWT4.0 − 130 Geared SCIG 4.0 MW 130 2015

XEMC-Darwind XE/DD115 PMSG 5.0 MW, 3000 V 115 2014

CSIC CSIC5 MW PMSG 5.0 MW 154 − Goldwind GW5 MW Direct Drive PMSG 5.0 MW − 2014 Hyosung Hyosung5 MW PMSG 5.0 MW 136 − Gamesa G128 − 5.0 MW Medium Speed PMSG 5.0 MW 128 2014

AMSC-Hyundai HQ5500/140 PMSG 5.5 MW 140 2014

Goldwind GW6 MW Direct Drive PMSG 6.0 MW − 2014 Siemens SWT6.0 − 154 Direct Drive PMSG 6.0 MW, 690 V 154 2014

Alstom Power Haliade150 − 6 MW Direct Drive PMSG 6.0 MW, 900 V 150 2014 Nordex N150/6000 Direct Drive PMSG 6.0 MW, 3300 V 150 2015

MingYang SCD6.5 PMSG 6.5 MW 140 2014

Condor Ltd. Condor6 Geared MV SCIG 6.6 MW, 3300 V 125 2015

Bard GmbH BARD6.5 Dual Drive MV PMSG 3.4 MW×2 122 2014 Daewoo Ltd. DSME7.0 PMSG 7.0 MW 160 2014

Mitsubishi SeaAngel 7.0 MW Dual Drive Brushless SG 3.5 MW×2 165 2015 Siemens SWT7.0 − 171 PMSG 7.0 MW, 3300V 171 2014 Vestas V164 − 8.0 MW Medium Speed PMSG 8.0 MW 164 2016 Clipper Britannia Quantum Drive PMSG 2.6 MW×4, 3600 V 150 2015

Sway Turbine AS ST10 Axial Flux PMSG 10 MW, 3500 V 164 2015

AMSC SeaTitan Direct Drive HTS 10 MW, 690 V 190 2015

GE Energy GE15 MW Direct Drive HTS 15 MW 180 2016

237

The summary of few commercial wind turbines which use SCIG/PMSG/WRSG and

full-scale power converters is given in Table A.2.

Table A.2: List of commercial wind turbines using full-scale converters

Manufacturer Model Generator Power (MW) Gear Steps Height (m) Rotor Converter Figure Other

Country (Supplier) Voltage (V) Gear Ratio Dia (m) Speed (rpm) (Supplier) Models

AREVA Wind M5000 PMSG 5.0 1 90 4.5 − 14.8 ABB PCS Fig. 2.5 M5000-135 Germany (ABB) 3300 1 : 10 116 6000

E126/7580 WRSG 7.5 DD 135 5 − 11.7 2L–VSC Fig. 2.4 E126/7500, 690 1 : 1 127 7000,6000

Enercon GmbH E101/3000 WRSG 3.0 DD 99/135/ 4 − 14.5 2L–VSC Fig. 2.4 E82/3000 Germany 690 1 : 1 149; 101

E82/2000 WRSG 2.0 DD 75/85/98/ 6 − 18 2L–VSC Fig. 2.4 E66/2000 400 1 : 1 108/138; 82 E70/2000

WWD-1-D60 PMSG 1.0 1 56/66/70 8 − 26 2L–VSC Fig. 2.4 D56 WinWinD Ltd. (ABB) 690 — 60

Finland WWD-3-D90 PMSG 3.0 2 80/88/90/ 5 − 18 2L–VSC Fig. 2.4 D100, D103 (ABB) 690 1 : 26.66 100; 90 D109, D120

Vensys70 PMSG 1.5 DD 65/85 9 − 19 Boost+ Fig. 2.11 77/82/87 690 1 : 1 70 2L–VSC

Vensys AG Vensys100 PMSG 2.5 DD 100 6.5 − 14.5 2L–VSC Fig. 2.4 109/112 Germany 690 1 : 1 100

Vensys120 PMSG 3.0 DD 90/140 6.5 − 12.8 2L–VSC Fig. 2.4 112− 690 1 : 1 120 3000

G128 PMSG 4.5 2 81/120/140 448 2L–VSC Fig. 2.4 G136

Gamesa 690 1 : 37.88 128

Spain G128 − 5.0 PMSG 5.0 2 80/94 490 2L–VSC Fig. 2.4 G11X/5000 690 1 : 41.405 128

Avantis AV928 PMSG 2.5 DD 80/100 16 ABB ACS Fig. 2.4

China 690 1 : 1 93.2 800

238

Appendix B

System Modeling

In this Appendix, a brief description about various system models and notation employed

in this dissertation is presented.

B.1 Notation of Per-Unit Values

The following notation is employed in representing per-unit (p.u.) values. The rated

values of wind turbine or power converter are selected as base values.

• Base apparent power SB represents the rated power of generator or power converter

• Base active power PB represents the rated generator mechanical input power or rated converter output power

• Base voltage VB represents the phase voltage of generator or grid

• Base frequency ωB = 2πf represents the rated frequency of generator or grid.

• Base current IB = SB3×VB • Base impedance ZB = VBIB • Base inductance LB = ZBωB • Base capacitance CB = 1ωB×ZB • Base flux-linkage ΛB = VBωB • Base torque TB = PBωB

239

B.2 Reference Frame Transformation

The reference frame theory helps to simplify the modeling, analysis, simulation and digital

implementation of control schemes employed in the WECS. In this dissertation, the following

three reference frames were used:

• Natural reference frame (abc)

• Stationary reference frame (αβ)

• Synchronous reference frame (dq)

The transformation of variables between these reference frames is presented below. The

variable x represents either voltage, current or flux linkage.

[ xα

xβ

] =

[ 1 −1

2 −1

0 √ 3 2

− √ 3 2

] ·

⎡ ⎢⎣ xa

⎤ ⎥⎦ (B.1)

⎡ ⎢⎣ xa

⎤ ⎥⎦ =

⎡ ⎢⎣

1 0

−1 2

√ 3 2

−1 2

− √ 3 2

⎤ ⎥⎦ ·

[ xα

xβ

] (B.2)

[ xd

] =

[ cosθ cos(θ − 2π

3 ) cos(θ − 4π

3 )

−sinθ −sin(θ − 2π 3 ) −sin(θ − 4π

3 )

] ·

⎡ ⎢⎣ xa

⎤ ⎥⎦ (B.3)

⎡ ⎢⎣ xa

⎤ ⎥⎦ =

⎡ ⎢⎣

cosθ −sinθ cos(θ − 2π

3 ) −sin(θ − 2π

3 )

cos(θ − 4π 3 ) −sin(θ − 4π

3 )

⎤ ⎥⎦ ·

[ xd

] (B.4)

[ xα

xβ

] =

[ cosθ −sinθ sinθ cosθ

] · [ xd

] (B.5)

[ xd

] =

[ cosθ sinθ

−sinθ cosθ

] · [ xα

xβ

] (B.6)

240

B.3 Wind Turbine Model

The model of the wind turbine is important for the study of the WECS response during

dynamic changes in wind speed and also during grid faults. The model of the wind turbine

also helps to effectively design MPPT algorithms. In this subsection, the model of the wind

turbine is given with additional details about MATLAB/Simulink implementation.

The mechanical output power of a wind turbine can be given as:

PM = 1

2 ρAv3w Cp (B.7)

where ρ is air density (typical value is 1.225 kg/m3), A is rotor swept area, and vw is

wind speed velocity. Cp represents the power coefficient of a blade and it has a theoretical

maximum value of 0.59 according to Betz limit. The Cp value varies between 0.2 and 0.5 for

most of the MW-level commercial wind turbines.

The Cp can be defined in terms of turbine coefficients C1 to C7 as:

Cp = C1

( C2 λi

− C3β − C4β2 − C5 ) e − C6

λi + C7λT (B.8)

where β is the pitch angle which is adjusted by the pitch control system according to the

wind speed. The β value is zero when wind speed is below its rated value. λT corresponds

to optimal tip-speed-ratio (TSR) as defined below:

λT = λT,op = nM,R × 2π60 × rT

vw,R (B.9)

where rT is radius of turbine, nM,R is rated speed of turbine, and vw,R is rated wind speed.

The wind turbine operates at its optimal TSR (λT,op) during all the wind speed conditions.

In (B.8), λi is intermittent TSR and it is related to λT and β as demonstrated below:

λi =

λT + 0.08β − 0.035 β3 − 1. (B.10)

The turbine output torque can be estimated as:

TM = PM ωM

(B.11)

where ωM is turbine shaft speed which can be estimated as follows:

ωM = ωm rgb

(B.12)

241

where ωm is measured generator speed and rgb is gearbox ratio.

The MATLAB/Simulink model of a wind turbine is shown in Fig. B.1, where the inputs

are wind speed velocity vw, pitch angle β and generator speed ωm, while the output is

mechanical torque. The model given here can be used for SCIG, PMSG or WRSG.

Fig. B.2 depicts the MATLAB/Simulink model of the pitch control system. This system

maintains generator active power output at its rated value by producing suitable β value.

Based on the measured generator output voltages and currents, the active power output is

computed and its value is compared to the reference active power which is always 1.0 p.u..

The error is processed by a PI controller whose output value is β which is applied gradually

(through a rate limiter) to the turbine. It is important to recall that the β value becomes

more than 0 only when the generator output power exceeds its rated value.

Figure B.1: MATLAB/Simulink model of wind turbine.

Figure B.2: MATLAB/Simulink model of pitch control system.

242

B.4 Phase-Locked Loop (PLL) Model

The grid synchronization is one of the most important issues in WECS in order to allow

the grid and grid-tied inverter to work in unison. PLL is a widely accepted method to

generate the reference variable (grid voltage angle θg) for the grid synchronization. In this

dissertation, three-phase symmetrical grid voltages are considered (vag + vbg + vcg = 0). The

grid voltage angle θg is also crucial in the transformation of variables between abc and dq

frames, and in the operation of grid-side control system.

For an ideal grid (used in the MATLAB simulations), the following method can be used

to estimate θg:

θg = tan −1 vβ vα

(B.13)

where vα and vβ are stationary frame grid voltages, and they can be estimated from the

three-phase grid voltages using (B.1).

A simplified model for the system is shown in Fig. B.3. In real-time, the grid voltages

contain harmonics and they are distorted. In such cases, SRF-PLL can be used as shown in

Fig. B.4. This method uses a PI controller to force the q-axis grid voltage vqg to zero value.

A feed-forward frequency term ωg (= 2πfg) is added to the output of the PI controller to

improve initial dynamic performance. An integrator is then employed to convert ωg to θg.

To ensure that the θg changes between 0 and 2π, a modulus function is used.

Figure B.3: Simplified model for grid voltage angle estimation.

Figure B.4: Standard SRF-PLL model for grid voltage angle estimation.

243

Appendix C

Performance Assessment

In order to assess the performance of FCS-MPC scheme, various parameters are defined

in this appendix.

The percentage mean absolute current reference tracking error %eig is defined as the

absolute difference between the reference and load/grid currents with respect to the rms

value of load/grid current:

%eig = 1 m

∑m k=0

∣∣i∗g(k) − ig(k)∣∣ rms(ig(k))

× 100 (C.1)

where m represents number of samples. In the simulation and experimental tests, 25000

samples are considered, which corresponds to 15 fundamental cycles.

Similarly, the active and reactive power tracking errors are defined with respect to the

base apparent power Sg as:

%epg = 1 m

∑m k=0

∣∣P∗g (k) − Pg(k)∣∣ Sg

× 100 (C.2)

%eqg = 1 m

∑m k=0

∣∣Q∗g(k) − Qg(k)∣∣ Sg

× 100. (C.3)

The percentage mean absolute dc-link capacitor voltages deviation %evc is formulated

for 3L converter as:

%evc = 1 m

∑m k=0 |vc1(k) − vc2(k)|

v∗dc × 100. (C.4)

For a 4L-converter, the %evc is determined as follows:

%evc = 1 m

∑m k=0

∑ i=1,2,3, j=2,3,1 |vci(k) − vcj(k)|

3 × v∗dc × 100. (C.5)

244

A similar approach can be used to calculate capacitor voltages deviations in other mul-

tilevel converters.

The percentage of total harmonic distortion (THD) is described as follows:

% THD = ∑

x=a,b,c

3 · √ i22,x + i

2 3,x + .. + i

2 n,x

i1,x × 100 (C.6)

where in,x and i1,x are n th order harmonic and fundamental components of phase-x load/grid

currents, respectively.

The average device switching frequency of a 3L-converter is calculated below:

fsw = ∑

x=a,b,c

fsw,1x + fsw,2x 6

. (C.7)

The switching frequency of each upper switch is calculated by measuring the number

of switching changes in the gating signals for 15 fundamental cycles. Similarly, for a 4L-

converter, the average switching frequency is calculated as:

fsw = ∑

x=a,b,c

fsw,1x + fsw,2x + fsw,3x 9

. (C.8)

The switching frequencies of other multilevel converters can be calculated in a similar

manner.

245

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