programming assignment

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microcode_implementation_of_mi.doc

Machine Instruction

[ CONTROL

STORAGE

LOCATION ] [OpCode] [Instruction]

1. Fetch & Increment (00) 8 SAR <‑‑ PSIAR

(01) 25 Read

(02) 21 TMPR <‑‑ ACC

(03) 23 ACC <‑‑ PSIAR + 1

(04) 20 PSIAR <‑‑ ACC

(05) 18 ACC <-- TMPR

(06) 28 CSIAR <‑‑ decoded SDR

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2. Add (10) 6 TMPR <‑‑ SDR

(11) 9 SAR <‑‑ TMPR (rightmost 8 bits)

(12) 25 Read

(13) 6 TMPR <‑‑ SDR

(14) 12 ACC <‑‑ ACC + TMPR

(15) 29 CSIAR <‑‑ 0

=================================================================================

3. Subtract (20) 6 TMPR <‑‑ SDR

(21) 9 SAR <‑‑ TMPR (rightmost 8 bits)

(22) 25 Read

(23) 6 TMPR <‑‑ SDR

(24) 15 ACC <‑‑ ACC ‑ TMPR

(25) 29 CSIAR <‑‑ 0

=================================================================================

4. Load (30) 6 TMPR <‑‑ SDR

(31) 9 SAR <‑‑ TMPR (rightmost 8 bits)

(32) 25 Read

(33) 6 TMPR <‑‑ SDR

(34) 18 ACC <‑‑ TMPR

(35) 29 CSIAR <‑‑ 0

==================================================================================

5. Store (40) 6 TMPR <‑‑ SDR

(41) 9 SAR <‑‑ TMPR (rightmost 8 bits)

(42) 1 SDR <‑‑ ACC

(43) 26 Write

(44) 29 CSIAR <‑‑ 0

=================================================================================

6. Unconditional Branch

(50) 5 PSIAR <‑‑ SDR

(51) 29 CSIAR <‑‑ 0

==================================================================================

7. Conditional Branch (60) 30 SKIP

(61) 29 CSIAR <‑‑ 0

(62) 5 PSIAR <‑‑ SDR

(63) 29 CSIAR <‑‑ 0

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RELATED PRIMARY STORAGE OPERATIONS:

READ - Data from the primary storage location named in the SAR is placed in the SDR.

WRITE - Data in the SDR is placed in the primary storage location named in the SAR

Decode SDR - Set the CSIAR to the address of the proper micro code routine (in control storage) for interpreting the machine language instruction.

SKIP - Add 1 to CSIAR if ACC = 0

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