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_______________________________________________________________ Report Information from ProQuest February 26 2016 02:16 _______________________________________________________________ COLUMBIA SOUTHERN UNIVERSITY LIBRARY

26 February 2016 ProQuest

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1. Personal Computer Companies; Patent Issued for Parameter FIFO (USPTO 9262798)............................ 1

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Document 1 of 1 Personal Computer Companies; Patent Issued for Parameter FIFO (USPTO 9262798) ProQuest document link Abstract: According to news reporting originating from Alexandria, Virginia, by VerticalNews journalists, a patent by the inventors Bratt, Joseph P. (San Jose, CA); Holland, Peter F. (Sunnyvale, CA); Choo, Shing Horng (San Francisco, CA); Millet, Timothy J. (Mountain View, CA), filed on April 28, 2014, was published online on February 16, 2016. Links: Check Full Text Finder for Full Text Full text: 2016 MAR 4 (VerticalNews) -- By a News Reporter-Staff News Editor at Entertainment Newsweekly -- According to news reporting originating from Alexandria, Virginia, by VerticalNews journalists, a patent by the inventors Bratt, Joseph P. (San Jose, CA); Holland, Peter F. (Sunnyvale, CA); Choo, Shing Horng (San Francisco, CA); Millet, Timothy J. (Mountain View, CA), filed on April 28, 2014, was published online on February 16, 2016. The assignee for this patent, patent number 9262798, is Apple Inc. (Cupertino, CA). Reporters obtained the following quote from the background information supplied by the inventors: "This invention is related to the field of graphical information processing, and more particularly to reading and writing registers that store image frame descriptors. "Part of the operation of many computer systems, including portable digital devices such as mobile phones, notebook computers and the like, is the use of some type of display device, such as a liquid crystal display (LCD), to display images, video information/streams, and data. Accordingly, these systems typically incorporate functionality for generating images and data, including video information, which are subsequently output to the display device. Such devices typically include video graphics circuitry to process images and video information for subsequent display. "In digital imaging, the smallest item of information in an image is called a 'picture element', more generally referred to as a 'pixel'. For convenience, pixels are generally arranged in a regular two-dimensional grid. By using this arrangement, many common operations can be implemented by uniformly applying the same operation to each pixel independently. Since each pixel is an elemental part of a digital image, a greater number of pixels can provide a more accurate representation of the digital image. The intensity of each pixel can vary, and in color systems each pixel has typically three or four components such as red, green, blue, and black. "Most images and video information displayed on display devices such as LCD screens are interpreted as a succession of image frames, or frames for short. While generally a frame is one of the many still images that make up a complete moving picture or video stream, a frame can also be interpreted more broadly as simply a still image displayed on a digital (discrete, or progressive scan) display. A frame typically consists of a specified number of pixels according to the resolution of the image/video frame. Most graphics systems use frame buffers to store the pixels for image and video frame information. The term 'frame buffer' therefore often denotes the actual memory used to hold picture/video frames. The information in a frame buffer typically consists of color values for every pixel to be displayed on the screen. Color values are commonly stored in 1-bit monochrome, 4- bit palletized, 8-bit palletized, 16-bit high color and 24-bit true color formats. An additional alpha channel is oftentimes used to retain information about pixel transparency. The total amount of the memory required for frame buffers to store image/video information depends on the resolution of the output signal, and on the color depth and palette size. "The frame buffers can be situated in memory elements dedicated to store image and video information, or they can be situated in the system memory. Consequently, system memory may be used to store a set of pixel data that defines an image and/or video stream for display on a display device. Typically, applications running in

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such a system can write the pixel data into the system memory, from where the pixel data may be obtained to eventually generate a set of image/video signals for generating the image on the display device. In such systems, fetching the frames (pixel information) from system memory may place high demands on the system, as other devices may also be competing for memory access. As consequence, a high bandwidth may be required from memory in order to keep up with the requests for data. In addition, as each system memory access requires a certain amount of processing power, requests for high volume pixel data may eventually result in premature battery depletion in battery-operated devices, such as mobile phones and notebook computers." In addition to obtaining background information on this patent, VerticalNews editors also obtained the inventors' summary information for this patent: "In one set of embodiments, display pipes in a graphics processing/display system may support processing units that include registers programmable to define various parameters associated with a frame. Packets of parameter information may be queued in a parameter FIFO for use in subsequently fetched frames. A relatively large number of parameter settings may be stored, permitting numerous frames to be displayed with the correct parameter settings without requiring processor support during the display operations. The parameter FIFO may be coupled to a DMA engine through a host slave interface to automatically download parameter packets from memory as previously stored parameter packets are transmitted from the parameter FIFO, even further reducing the amount of processor activity required for programming the parameters. "In one set of embodiments, a display pipe may include one or more processing units to perform respective display pipe operations, each processing unit including parameter registers configured to store parameter settings used to process a current display frame. The display pipe may also include a buffer to store a plurality of frame packets, where each frame packet may contain one or more parameter settings to be used for at least one display frame. A control circuit may be coupled to the buffer and the parameter registers, and may operate to update the parameter registers using a first frame packet from the parameter buffer to process a subsequent frame. When updating parameter registers for processing the subsequent frame, the control circuit may put in an idle state the processing units while the parameter registers in those are being updated. Once the parameter registers have been updated, the control circuit may put those processing units in a run state. The control circuit may issue DMA requests to fill the buffer with the frame packets. "In one set of embodiments, a system may include a display pipe to provide image frames to a display controller, with the display pipe containing a parameter buffer to store frame packets, each of which contains one or more parameter settings to be used for at least one display frame. The system may also include system memory with portions of the system memory respectively designated as frame buffers, packet buffers, and transfer buffers. The frame buffers may store display frame information. Each given packet buffer may be associated with a given frame buffer, and each given packet buffer may store a respective frame packet that contains one or more parameter settings for the display frame information contained in the given frame buffer associated with the given packet buffer. Each given transfer buffer may be associated with a given packet buffer, and each given transfer buffer may store a respective DMA descriptor for transferring the respective frame packet contained in the given packet buffer associated with the given transfer buffer. The system may transfer a respective frame packet from a given packet buffer to the parameter buffer according to the respective DMA descriptor contained in the given transfer buffer associated with the given packet buffer. The system may also transfer a respective display frame information from a given frame buffer to the display pipe according to the respective DMA descriptor contained in the given transfer buffer associated with a given packet buffer that is associated with the given frame buffer. In one embodiment, the system may update a first frame buffer with new display frame information while display frame information is transferred from a second frame buffer, and it may also update a first packet buffer with a new frame packet while a frame packet is transferred from a second packet buffer.

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"In one set of embodiments, frame packets may be written into system memory, with each frame packet containing respective parameter settings to be used for displaying an image frame. DMA descriptors may also be written into the system memory, with each DMA descriptor associated with a respective memory location that contains a frame packet, and a DMA request may be issued from a display pipe to transfer a next frame packet from the system memory into a parameter buffer in the display pipe, which may provide image frames to a display controller. In response to the DMA request, the next frame packet may be transferred to the parameter buffer according to the DMA descriptor associated with the memory location that contains the next frame packet. The display pipe may include processing units having parameter registers to store parameter settings used to process a current display frame, and the parameter registers may be updated according to information comprised in the next frame packet, in preparation for displaying the frame associated with the next frame packet. While the next frame packet is transferred from one memory location to the parameter buffer, another memory location also designated to store a frame packet may be updated with a new frame packet, which may be transferred to the parameter buffer as part of a subsequent DMA transfer. DMA requests may be issued in response to the number of frame packets in the parameter buffer dropping below a specified value, and/or in response to the parameter buffer not containing a complete frame packet. Furthermore, DMA requests to transfer frame packets to the parameter buffer may be continually issued as long as there is space for a specified amount of data for a current size of the parameter buffer, while updating parameter registers in the display pipe according to information contained in frame packets in the parameter buffer." For more information, see this patent: Bratt, Joseph P.; Holland, Peter F.; Choo, Shing Horng; Millet, Timothy J.. Parameter FIFO. U.S. Patent Number 9262798, filed April 28, 2014, and published online on February 16, 2016. Patent URL: http://patft.uspto.gov/netacgi/nph- Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=5 0&s1=9262798.PN.&OS=PN/9262798RS=PN/9262798 Keywords for this news article include: Apple Inc., Consumer Electronics, Technology Companies, Personal Computer Companies. Our reports deliver fact-based news of research and discoveries from around the world. Copyright 2016, NewsRx LLC Subject: Inventors; Graphics boards; Product development; Liquid crystal displays--LCDs; Cellular telephones; Color; Patents; Portable computers; Publication title: Entertainment Newsweekly First page: 2486 Publication year: 2016 Publication date: Mar 4, 2016 Publisher: NewsRx Place of publication: Atlanta Country of publication: United States Publication subject: Communications--Television And Cable, Theater, Sports And Games, Music, Motion Pictures ISSN: 19441673 Source type: Trade Journals Language of publication: English

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Document type: Expanded Reporting ProQuest document ID: 1767963749 Document URL: http://search.proquest.com/docview/1767963749?accountid=33337 Copyright: Copyright 2016, NewsRx LLC Last updated: 2016-02-25 Database: ABI/INFORM Complete

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  • Personal Computer Companies; Patent Issued for Parameter FIFO (USPTO 9262798)