Microelectronics HW (MOSFETs,Current Mirror and Sample and Hold circuit design)
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homework_3_s15_ed.docCALIFORNIA STATE UNIVERSITY, NORTHRIDGE
DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
ECE443 – ELECTRONICS I
SPRING 2015
HOMEWORK 3
Problem Three
3
4
1
2
1
2
2
1
÷
ø
ö
ç
è
æ
=
÷
ø
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ç
è
æ
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ø
ö
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L
W
L
W
L
W
L
W
V
V
GS
Using the information above, design the circuit above so that the output vo is equal to 1.5V.
Problem Four
2
4
1
5
2
2
1
1
÷
ø
ö
ç
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æ
=
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ø
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ç
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æ
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=
L
W
L
W
L
W
L
W
V
V
V
V
SG
GS
Using the information given above, find values for IREF and ID3, if ID6 = 100µA.
Problem Five
Design a sample and hold circuit. Design this circuit to such that it will meet the following specifications:
Preamplifier
Closed Loop Gain: ≥ 1 V/V
Input Resistance: ≥ 5MΩ
Output Resistance: ≤ 100Ω
Input Capacitance: ≤ 20pF
Output Capacitance: ≤ 10pF
Switch
On Resistance: ≤ 1Ω
Off Resistance: ≥ 10MΩ
Input/Output Capacitance: ≤ 1pF
Postamplifier
Closed Loop Gain: ≥ 1 V/V
Input Resistance: ≥ 5MΩ
Output Resistance: ≤ 100Ω
Input Capacitance: ≤ 20pF
Output Capacitance: ≤ 10pF
General Characteristics
Hold Capacitance: 100pF ≤ CHOLD ≤ 1uF
Acquisition Time: ≤ 100ns
Droop Rate (During Hold Time): ≥ 1mV/s
RREF
+3.3V
2kΩ
vo
IREF
M1
M2
M3
M4
RREF
+3.3V
vo
vi
M1
M2
M3
M4
M5
M6
