DE2 Remote Control Receiver Design

Homework #5

DE2 Remote Control Receiver Design

NEC Remote Control Transmitter

• Uses “Pulse Distance Encoding”

– Logical ‘0’ is a short voltage pulse followed by 1.125 ms of no pulses

– Logical ‘1’ is a short voltage pulse followed by 2.25 ms of no pulses

• NEC IR Transmission Protocol

– Used in many remote controls, including your DE2 remote

Nippon Electric Company

NEC Transmission Protocol

• Starts with a Leader code

– 9 ms of a positive voltage pulse

– Followed by 4.5 ms of zero voltage

• 8-bit address for the receiving device

• Inverse of the 8-bit address

• 8-bit command (corresponding to the key depressed on the remote)

• Inverse of the 8bit command

Example NEC message

Leader Code Stop Bit

Receiver Design

• We want to build a circuit design which will

– Read in an NEC code

– Display the NEC code onto the 7-segment displays

• There is an IR receiver chip whose output is connected to PIN_Y15

First, let’s try to design the state machine

read_LC_on init check LC_on

count

read_LC_off

check LC_off count

read_data check_data

pos_edge data=‘0’

LC_on counter “in range” LC_on counter “out of range”

pos_edge

pos_edge

LC_off counter “in range”

data_counter = 31

data_counter /= 31

else

else

else

data

Pulse Detection Circuitry

D Q

Q rst

clk

D Q

Q rst

clk

data

clk

pos_edge

clk

pos_edge

Some important numbers

• System clock = 50,000,000 Hz (2e-8s period)

• Leader code on = 9e-3s

• 9e-3/2e-8 = 450000 clock cycles for LC_on

Some Example Code

Use generics. Code can be re-used with different system clock

Outputs to 7-segment displays

Inputs into the receiver

C

Counter keeps track of the LC_on signal

Counter keeps track of the LC_off signal

Counter keeps track of the data signals

Counter keeps track of the number of bits read

Length of each type of signal, in number of system clock periods

Register to hold data bits

Define the state machine

C

test_RC_receiver.vhd

450000 clocks for the leader code “on” signal (50 MHz system clock)

Due to the use of generics, we Can reduce that number of clocks for simulation without Changing the design

Changing the default value of LC_on_max

Set up an array for the 7 seg data, and the expected output

test_RC_receiver.vhd

Read input data from input.csv

Read output data from output.csv

Check for correctness

Input.csv

Output.csv

Simulation Results

Remote Control Receiver

• Simulate your design in ModelSim to test for correct functionality

• Use the testbench that has been developed for you

• Compile circuit in Quartus and implement onto the DE2 board

• Use PIN_Y15 for the IR input

• Use 8 7-seg displays for the 32-bit code

Homework #4 Report

• You should turn in a report detailing the design of the remote control receiver

• The report should include:

– Introduction, design, results, and conclusion

– VHDL code for your design

– Quartus compilation results of your design

– Simulation Results for your design

This homework is a group project! • You should:

– Arrange yourselves into groups of 1-3 students

– Work on the design together

– Develop one design an done report for the group

– Seek help from your professor when having problems

• You should NOT:

– Copy any portion of code across different groups

– Give copies of your designs to other groups

– Copy or give copies of any of your report content

Evidence of code copying receives a 0 for the group who copies and the group who allows their designs to be copied