Logic circuits HW
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hw045.pdf
EE 110 Fall 2015 Homework 04 J. Heynssens Homework is due, Mon October 5
th in class. 25% credit off before midnight (scan and email). After
midnight no credit! 7 problems, 120 points total.
Write your name, the assignment name, and the date at the top of the first page of each assignment. Staple multiple pages together. Number all problems and put them in order in your assignment. Please write clearly and draw a box around numerical answers. You will not get credit if your work is difficult to follow or the answer in a box is not easily seen. You will not get full credit if these directions aren’t followed.
1. (20 pts) The following is a timing diagram showing the inputs
A,B,C to a
logic circuit and its output
f (A,B,C). The horizontal axis represents time.
Using this information, find the minimized SOP expression for
f (A,B,C) and
draw its logic circuit realization. (Hint: Start by converting the timing diagram to a truth table.)
2. (20 pts) Given the following canonical expression
𝑓(𝐴, 𝐵, 𝐶, 𝐷) = ∏ 𝑀(1,3,6,11,15)
a. (15 pts) Use a Karnaugh map to find a minimized SOP expression for
f(w,x,y,z). Show that your solution produces the correct truth table.
b. (15 pts) Use a Karnaugh map to find a minimized POS expression for
f(w,x,y,z). Show that your solution produces the correct truth table.
Draw a separate K-map for parts (a) and (b) – don’t use a single map for both parts (it becomes too hard to read). Clearly show your groupings.
3. (20 pts) Given the following canonical expression (Hint: D(2) means term 2 is a don’t care)
f(r,s,t,u) M(3,5,7,8,9,14,15)D(2,4,13)
a. (15 pts) Use a Karnaugh map to find a minimized SOP expression for
f(r,s,t,u). Show that your solution produces the correct truth table.
b. (15 pts) Use a Karnaugh map to find a minimized POS expression for
f(r,s,t,u). Show that your solution produces the correct truth table.
Draw a separate K-map for parts (a) and (b) – don’t use a single map for both parts (it becomes too hard to read). Clearly show your groupings.
4. (20 pts) Given the following expression
f (A,B,C) (AB)(ABC)(AC)
a. (10 pts) Use a K-map to find the shorthand form canonical SOP expression for
f (A,B,C). (Hint: do the K-map process in reverse)
b. (10 pts) Use the same K-map to find the shorthand canonical POS
expression for
f (A,B,C).
c.
5. (10 pts) (3.55 from Dueck page 158) Redraw the circuit below using all NAND gates:
NOT
NOT
NOT
NOT
OR3
OR3
OR2 AND3
A
B
C
D
Y
6. (20 pts) (3.66 from Dueck page 161) Given inputs A, B, and C to the logic circuit below draw the waveforms for the circuit output Y.
7. (10 pts) (Floyd 5.9) Use AND gates, OR gates and inverters as needed to
implement the following logic functions (do not simplify!)
a. 𝑋 = 𝐴𝐵 + �̅�𝐶 b. 𝑋 = 𝐴(𝐵 + 𝐶̅) c. 𝑋 = 𝐴�̅� + 𝐴𝐵 d. 𝑋 = 𝐴𝐵𝐶̅̅ ̅̅ ̅̅ + 𝐵(𝐸𝐹 + �̅�) e. 𝑋 = 𝐴[𝐵𝐶(𝐴 + 𝐵 + 𝐶 + 𝐷)]
U16
NOR2
U17
NOT
U18
NOT
U19
NOR2
A
B
C
Y
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