Engineering _make a design, and then simulate it by Pspice or LTspice

EE251 Electronics 1 Laboratory Exercise #3

Common Source Amplifier and Frequency Response

3.0 Objectives:

Understand basic amplifier circuits using MOS transistors. Examine design tradeoffs of bias and quiescent point choices and look at frequency response. This lab is similar to the previous one, using an MOS instead of a bipolar transistor, and adding frequency domain work.

3.1 Pre-Lab assignment

Read the material in the book about bipolar transistors and common source amplifiers. We will be using the 2N7000 NMOSFET.

The first part of the preliminary work is to design the bias network. We again will follow the "rule-of-thumb" the textbook gives of making VD = 2/3 of VDD and VS = 1/3 of VDD, which we will set at 12 Volts. Use a Q-point Collector current between about 1/2mA and about 5mA. (Use the same values as you did for the earlier bipolar lab #2.) Choose resistor values (use resistors from your kit or lab stocks.) and then recalculate what ID should be. Note: An important part of this exercise is using the data sheet do determine the value to use for VT, KN. The data sheet does not give KN, but it does give gm for some value of ID. Use that information.

Predict the AC performance. First make CS, CG, and CL "large" so that they do not affect the AC performance of the circuit. Note that CS shorts the source to ground for AC, and CG directly connects our signal source. Calculate the input impedance. Predict what the gain should be. Try the circuit with simulation, and check your bias and gain calculations.

Choose input and output capacitors to give about 10 Hz and 100 Hz poles for those capacitors, respectively. (The RC time constant should correspond to 1/ for those frequencies.) Use a 1K Ohm load, and put a 1K Ohm source resistance between the signal generator and your circuit. Use a “large” capacitor for Cs. Simulate and see if you get “cut off” (rolloff of .71 in Voltage) at the 100 Hz frequency as expected. (In Pspice, use the MbreakN model with parameters for the 2N7000, if you do not find the 2N7000 part.) Get a Bode amplitude plot for your simulation model (a log – log plot of AC gain vs. frequency). Bring your results to lab.

3.2 Build and check bias network

Construct the transistor and bias network part of the circuit, using the component values you calculated earlier. Power it up, and check the Q-point. Record the voltages and currents. If what you see is way off, adjust the resistor values to get at least close to the desired values.

3.3 Complete the amplifier and Measure AC (midband) performance

Add the remaining components, including RL. Use “big” capacitors for CS and CB. Connect the signal generator to the input, and use the oscilloscope to watch both the input and output voltages. Vary the input voltage magnitude and watch what happens to the output. Find the value of input and output that gives "clipping" (the output is no longer sinusoidal). Go to a voltage well below that, and record input and output magnitudes. Then determine the AC gain, and record it. Calculate the Current gain as well.

3.4 Frequency response: Sweep the frequency of the signal generator from 1 Hz up to 1 MHz, recording input and output amplitude at each frequency, so that you will be able to generate a “Bode plot” (log – log plot of gain vs frequency) of your actual amplifier’s response.

3.5 Report: Write a Formal report. Results should be comparable to that for Lab 2, but you have the frequency amplitude response as well. You should compare design/theory vs. simulation modeling vs actual performance. Be sure to include anything ”interesting” in your conclusions.