EE Assignment

Analysis of operational amplifier circuits

You are to design and analyze a simple two-stage CMOS operational amplifier using an NMOS differential pair and a PMOS output stage. Use a diode-connected NMOS transistor and a resistor Rref to set the reference current Iref of the bias circuits, as shown in Fig. 1.

Your op amp design is required to have a minimum dc open-loop voltage gain of 1500 V/V while driving an open-circuited load and must be capable of driving a 10K load resistance to 5V. The supply voltages are 5VDC.

Your design will take the form of a spreadsheet. An example spreadsheet is shown in Fig. 2. The following data are required. You may include other data or intermediate calculations at your discretion.

· Reference current Iref

· Resistor Rref

· W/L ratios of each transistor

· Transconductance of the differential pair

· Output resistance of the differential pair

· Voltage gain (V/V) of the differential pair

· Transconductance of the common-source amplifier

· Output resistance of the common-source amplifier

· Voltage gain of the common-source amplifier driving an open-circuited load

· Overall open-loop voltage gain of the two-stage CMOS op amp while driving an open-circuited load

· Common-mode input voltage range

· Estimated break (3dB) frequency of the open loop gain assuming a compensation capacitor of 30pF

The spreadsheet must have live calculations for these values except for user-defined design parameters (reference current Iref and W/L ratios). Quantities in the spreadsheet must be labeled and must have appropriate units.

Your spreadsheet must have a legible schematic diagram. It may be drawn with Multisim or may be a scanned image of a hand-drawn schematic. The transistors must be clearly identified (Q1, Q2, etc.) on the schematic, and their labels must match designations in the spreadsheet.

The devices available to you are long-channel (gate length L = 5m) PMOS and NMOS devices. The electrical parameters you will need are the following:

Electron mobility (NMOS devices): n = 750cm2/(V-s)

Hole mobility (PMOS devices): p = 250cm2/(V-s)

Oxide thickness: tox = 85nm

Oxide dielectric constant: r = 3.9

Electrical permittivity of free space: o = 8.854 1012 F/m

Channel-length modulation parameter (NMOS): n = 0.01 V1

Channel-length modulation parameter (PMOS): p = 0.03 V1

NMOS threshold voltage: Vtn = +1.0V

PMOS threshold voltage: Vtp = 1.0V

Fig. 1. Diode-connected four-terminal NMOS device and resistor to establish reference current Iref.

Fig. 2. Example spreadsheet for the two-stage CMOS op amp of Fig. 2. Problem parameters are shown in cells with blue background. User-determined design parameters are in yellow cells. Required output values are shown in cells with green background.

Fig. 3. Example schematic of a two-stage CMOS op amp configured for measurement of open-loop gain. This op amp uses a PMOS differential pair and an NMOS common-source amplifier, which is not the configuration required in this quiz.

AC voltage sources V1 and V2, capacitor C1, and resistor R1 are components used for measurement of open-loop gain and do not form a part of the op amp itself. The large resistor and extremely-large capacitor allow the feedback loop to be closed for dc analysis but open for ac analysis. Voltage sources V1 and V2 each have an amplitude of 0.5V and together provide a differential-mode input voltage of 1V. The ac voltage read at Vo is therefore numerically equal to the open-loop gain.

MOS device dimensions (width W and length L) have been removed from this schematic.

Q1

Vdd

5 V

Vss

5 V

Rref

I ref

EENG 4309

Analysis of example two-stage CMOS op amp<< Specified parameters

David M. Beams<< User design parameters

19-Mar-15<< Required outputs

Vdd:5V

m

n:750cm

2

/(V-s)Vov4,5:0.784VVcm(max):1.647V

Vss:-5V

m

p:250cm

2

/(V-s)Vgs4,5:1.784VVcm(min):-3.719V

Vtn:1.00Vtox:85nmGm diff pair:6.374E-04SVov8:1.281V

Vtp:-1.00VL:5

m

mro5:1.333E+05

W

gm8:3.12E-03S

l

n:0.01V

-1

e

o:8.854E-12F/mro7:4.000E+05

W

ro8:5.000E+04

W

l

p:0.03V

-2

e

r:3.9Ro diff pair:100000

W

ro3:1.667E+04

W

W/L 140Cox:4.062E-04F/m

2

Av diff pair:-63.7V/VRo CS amp:12500

W

W/L 240Vov1:1.569VAv diff pair:36.1dBAv cs amp:-39.0V/V

W/L 3160Rref:1.49E+04

W

ID3:2mAAvol:2488V/V

W/L 4, 580Vg:2.431VVG6:-3.094VAvol:67.9dB

W/L 6, 720Vsmax:3.431VVG8:-2.719VCc:30.0pF

W/L 880I_tail:0.5mACmiller:1.20E+03pF

Iref:0.5mAf(-3dB):1.33E+03Hz

Vss

5 V

Q8

Q1Q2Q3

Vdd

5 V

Q4

Q5

Vs

Q6Q7

VG6

Rref

14.9kΩ

VG

C1

100F

R1

1MEGΩ

V1

V2

V-

V+

Cc

30pF

Vo

VG8