ModelSim for VHDL

Section	Points
Introduction	__ / 15
Understanding	__ / 25
VHDL Code	__ / 25
Demonstration / Simulation Results	__ / 20
Conclusion	__ / 15
Total	___ / 100

EGCP 281 – LAB TEMPLATE

Name:

Date:

1. Introduction

In this section it is expected to describe what the lab is about.

Example:

The objective of this lab was to take the truth table provided and create the following:

· Simplified Boolean function

· Circuit schematic

· VHDL design including code

This section should just be describing what the high level process of the lab entails.

2. Understanding

In this section it is expected to explain your understanding of the different tasks / expectations that were given during the lab.

This includes but not limited to:

· Explanations of the work done for each task

· Analysis of why the work is being done.

· Analysis of what the code for section 3 is doing.

This section needs to emphasize that there was an understanding of the purpose of this lab along with what you had done in the lab. It needs to be shown you understand the code you wrote and that you can give details as to what it is doing.

3. VHDL Code

This section should only include your code that was used for the simulation and that is being described in the understanding section. This will be graded for completeness of the expected task.

4. Demonstration / Simulation Results

This section is for the simulation results that were obtained for simulating the VHDL code. This will mainly include graphics or figures.

Also in this section it is expected to have any other pertinent work including: k-map solving, circuit schematics, etc… mentioning these other pieces of work are attached will suffice if they are included in the lab this section.

5. Conclusion

This section should include your analysis of the lab overall. If there are any complications that you ran into along the way and couldn’t get around, those can be explained here. If any specific parts of the lab were found to be challenging then discuss those here along with how they were overcome.