Computer Science assignment

CS 271: Fall, 2014 Assignment 2 Due: 10/15/2014

CS 271, Assignment 2 page 1 Revised: Fall 2014

Finish reading chapter 3 and begin reading chapter 4. Do the following questions. To receive full credit, please show all work. [Total = 42 points] 1. (Modified from problem 3.1, page 105.) Consider the instruction format for the

hypothetical machine in Figure 3.4 on page 71. In addition, there are two more instructions (note that is a modification of the textbook problem):

0110 = Load AC (the accumulator register) from an I/O device 1110 = Store AC to an I/O device With these two instructions, a particular I/O device is identified by replacing the 12-bit

address portion with a 12-bit device number. Remember that a number ending with a small ‘h’ means the number is a hexadecimal number.

a. What is the length, in bits, of an instruction? [2 points] b. What is the length, in bits, of an op code? [2 points] c. Assuming the machine is byte-addressable, what is the largest memory size that

can be directly addressed by this machine? (Hint: the number of unique addresses that can be generated by N bits is 2N.) [2 points]

What is the hexadecimal string that expresses the following instructions? d. Load AC from memory location 732h. [2 points] e. Add the contents of memory location 14h to AC. [2 points] f. Store AC to I/O device number 9h. [2 points] g. Store AC to memory location 9h. [2 points] The next question involves calculating a maximum transfer rate for a bus. This rate is

expressed in units of memory per unit of time: for example, bytes per second, kilobytes per second, or megawords per second if the word size is not known. To calculate the rate, we will use the following analogy. Imagine the bus as a conveyor belt and the attached peripherals as robots standing along side the moving belt. A word is placed on the belt at one end, and the word is labeled for one of the robots down the line. When a robot recognizes that the word is addressed for it, it removes that word from the belt and places the word in a container by its side. This may take some time. Another robot, robot #1, stands at the beginning of the belt and places words on the belt. Only one word may be on the belt at any given time, and a word may be placed on the belt only if the robot to which it is addressed is ready to remove the word. With this analogy, the maximum transfer rate of the bus is the fastest possible rate at which robot #1 can place words on the bus.

2. Assume a processor has a 16 bit bus, and a 64 MHz clock. The bus cycle is equal to 3

clock cycles. This means that data can be placed on the bus every 3 clock cycles. [4 points each]

CS 271, Assignment 2 page 2 Revised: Fall 2014

a. What is the clock cycle time in nanoseconds? b. What is the bus cycle time in nanoseconds? c. What is the maximum transfer rate for the bus in megabytes per second? To keep

the calculations simpler, use powers of 10, not powers of powers of 2 for megabytes and assume a word can be placed on the bus every bus cycle.

d. Suppose the width of the bus is doubled from 16 bits to 32 bits. What is the maximum transfer rate of the bus in megabytes per second?

e. Suppose that the bus remains at 16 bits but the clock frequency is tripled from 64 MHz to 192 MHz. What is the maximum transfer rate of the bus in megabytes per second?

The third question involves not a maximum transfer rate but a sustained transfer rate.

For a sustained rate, imagine there is a large pile of data to be sent down the bus. A word is sent down the bus, and as soon as the bus is free again and there is a receiving device ready, another word is sent down the bus. This is sometimes called burst mode. We ignore the beginning of this process and are concerned only with the time in the middle. The way to calculate a sustained rate is to create a timing diagram of the process. This is essentially a diagram of the activity on the bus where one axis is time. Look for a section of this diagram that is periodic; i.e., the diagram can be sliced into sections of this length and each slice would look the same. For example, the graphs of the trigonometric functions are periodic. Once a repeating section of the graph is found, count the number of bytes that are sent down the bus during this time period and divide by the length of the time period.

3. A bus is 16 bits wide and has N memory modules attached to it. When a 16-bit word is

sent down the bus, it requires 125ns for the word to be received. At the end of the 125ns, the bus is free again. When a memory module receives a word, it takes 500ns for the module to process the word. During the time a module is processing the word, it cannot accept another word. However, each memory module is independent, so while one module is processing a word, another module can receive and process a different word.

For example, suppose N = 2, i.e. there are two memory modules: MM0 and MM1. At

time t = 0ns, a word is sent to MM0. The bus is busy until t = 125ns and then MM0 is busy until t = 625ns processing the word. However, at t = 125 a second word can be sent to MM1. The bus is free again at t = 250ns, but a word cannot be sent down the bus because both memory module are busy. It is not until t = 625ns that a word may be sent to MM0. At t = 750, the bus is free and so is MM1, so another word may be sent to MM1. If this pattern is continued, it can be seen that eventually 2 16-bit words are sent down the bus every 625ns. This translates to a sustained rate of 6.4 MB/sec.

a. What is the sustained rate if N = 3? [4 points] b. What is the sustained rate if N = 5? [4 points]