Digital design

Fall 2014 DSD

Name __________________________ abc123 _________________________ Date ______________

1. Design a 4 bit ripple carry adder and use gate delay of 5 ns calculate the delay for a 4 bit add

2. Design a 4 bit carry look ahead adder and use gate delay of 5ns and calculate the delay for a 4 bit add

3. Does the delay difference between the designs increase linearly or not as the number of bits increases?