DEVRY ECET220 FINAL MULTIPLE QUESTIONS 100%

Week 8 : Final Week - Final Exam

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Final Exam - Page 1

1. (TCO 1) Which of the following accurately depicts the relationship between the collector, base, and emitter currents in an NPN bipolar junction transistor? (Points : 5)

I C = I

B + I

E

I E = I

B

I E = (1+ ) I

B

All of the above

2. (TCO 1) The n-type region in an pnp bipolar junction transistor is _____. (Points : 5)

collector base emitter collector and emitter

3. (TCO 1) How must the two junctions of an npn transistor in common-base configuration be biased so the transistor is in saturation region? (Points : 5)

The base-emitter junction is forward-biased and collector-base junction is reverse biased.

The base-emitter junction is reverse-biased and collector-base junction is forward biased.

The base-emitter and collector-base junctions are both forward-biased. The base-emitter and collector-base junctions are both reverse-biased.

4. (TCO 1) A transistor has = 150 and I C = 6 mA. What is the value for the base current,

I B ? (Points : 5)

30 A 40 A 90 A 25 A

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5. (TCO 1) For the transistor switching circuit shown below, find V CE

when V CC

= 10 V and

V IN

= 5 V.

(Points : 5)

0 V 10 V 5 V 1 V

6. (TCO 2) A power amplifier has a gain of 20 dB and an input level of 2 volts. Assuming that the input and output impedances are the same, what is the voltage level at the amplifier output? (Points : 5)

10 V 20 V 30 V 40 V

7. (TCO 1) Which best describes a field-effect transistor? (Points : 5)

A unipolar device in which the voltage at the gate controls the drain current A bipolar device attributed to having high input impedance A unipolar device in which current at the gate controls the collector voltage A bipolard device in which voltage at the gate controls the gate current

8. (TCO 1) Which statement is true for a common-gate FET configuration? (Points : 5)

Vin is applied to drain and Vout is taken from the gate. Vin is applied to source and Vout is taken from the gate. Vin is applied to gate and Vout is taken from the drain. Vin is applied to source and Vout is taken from the drain.

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9. (TCO 3) In the JFET voltage-divider configuration circuit shown below, R 1 = 2.2 M , R

2 =

270 k , R D = 3 k , and R

S = 1.2 k . What is the input impedance Z

in ?

(Points : 5)

2.2 M 4.2 k 240 k 270 k

10. (TCO 4) What is the typical open loop gain of an op-amp? (Points : 5)

200 20,000 200,000 20,000,000

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11. (TCO 4) Determine the output voltage Vo if Rf = 210 k , Ri = 19 k , Vi = -1.5 V, and Vcc = 15 V.

(Points : 5)

16.6 V -16.6 V 13 V 5 V

12. (TCO 4) Determine the output voltage Vo if Rf = 100 k , Ri = 4.7 k , Vi = 1.2 V, and Vcc = 15 V.

(Points : 5)

0 V 13 V -26.7 V 26.7 V

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