microp

1

ECE 371 - HOMEWORK 3 due: 11:59 pm Thurs 7/3/14 __________________________________________________________ Please scan your homework solutions and email to grader ([email protected]) with a copy to me ([email protected]). 1 . It is desired to interface a 74LS373 latch as Input Port A0 hex in a computer system that used "isolated I/O" with bus signals IOR* and IOW*. (The "*" indicates that these are low-active signals.) Assume that 8-bit port addresses are used, so that only address bus lines A0 - A7 need to be used in your interface. Using the decoder shown below and with a minimum number of 2- input logic gates, show how to interface this port to the address bus, data bus, and control signals. (You don't need to show bus drivers or bus controller chips.) Assume that the input device we are trying to read from, with the help of the latch, is a set of 8 switches.

05

02

00 01

03 04

A0 A1

A2

E1 E2 E3 07

06

74LS138 (Decoder)

D0-D7 Q0-Q7

OUTPUT CONTROL G

74LS373 (Latch)

2

2. It is desired to implement seven 8-bit output ports using memory mapped I/O. Details of the interface specification are: • The memory region from 12380 hex through 123FF hex is to be mapped from memory to I/O, so that the memory mapped I/O method can be used. • Within the above address region, the linear select method is to be used to interface the 7 output ports. (a) Give the addresses, in hex, of the 7 resulting port addresses. (b) Assume that a Programmable Array Logic (PAL) device has been programmed to decode the upper 13 lines from the system address bus. The PAL output shown in the diagram below will be low only when the values on A19-A7 are equal to the upper 13 bits of the memory mapped region specified above. In the diagram below, show how to interface one of the 7 Output ports, the one with highest address, to the address bus, data bus, and control signals of the computer. Assume that the available control signals are MEMR*, MEMW*, IOR*, and IOW*.

D0-D7 Q0-Q7

OUTPUT CONTROLCLK

74LS374 (Latch)

LEDs

PAL

outx

A19-A7

3. (a) Memory addresses F89C0 through F89FF are to reallocated from memory to I/O so that a group of I/O devices can be interfaced using memory-mapped

3

I/O using these addresses. A PAL device is used to generate a low active signal when and only when an address in the above range is present on the address bus. List the Address Bus lines that should be connected to the PAL and give their unique values that should cause PAL output to go low.

4

(b) In the figure below, show how to interface the I/O device from part a which has the highest port address. Assume that this device is a 74LS373 latch used as input port. (You can also assume that inputs to the 74LS373 are simple switches.) Use the PAL output, the decoder, and a minimum number of 2-input logics gates to implement your interface. (Note that linear select is not to be used for interfacing in this problem.)

PAL

outx 05

02

00 01

03 04

A0 A1

A2

E1 E2

E3 07 06

74LS138 (Decoder)

PAL inputs

D0-D7 Q0-Q7

OUTPUT CONTROL G

74LS373 (Latch)

5

4. The linear select method is to be used to interface a group of 16 output ports to computer system that uses a 16-bit address bus. In the diagram below, show how to implement this interface for one of these 16 devices. Assume that the device below is the one with the lowest address in the group. (Memory-mapped I/O is NOT to be used for this problem.) Assume that the output port below is to be connected to 8 LED’s.

D0-D7 Q0-Q7

OUTPUT CONTROL CLK

74LS374 (Latch)

6

5. (a) Give a set of 4 software instructions which would initialize Port H on the MC9SDPS256B microcontroller so that bits 0-3 and inputs and 4-7 are outputs. The inputs are to use the built-in pull-up option. Full drive is to be used for the outputs. (b) Give software which will wait until the input signal presented to bit 3 of Port H is high, then send a single pulse (low-to-high-to-low) from bit 5 of Port H, without affecting the other output pins.

7

(c) Give software which will wait until input signals presented bits 0 and 1 of Port H are both high, then send a single pulse (high-to-low-to high) from bit 6 of Port H, without affecting the other output pins. (d) Give software which will wait until at least one of the input signals presented bits 0 and 1 of Port H are high, then do the following: If only bit 0 is high, send a single pulse (low-to-high-to-low) from bit 5 of Port H, without affecting the other output pins. If only bit 1 is high, send a single pulse (low-to-high-to-low) from bit 6 of Port H, without affecting the other output pins. If both bits 0 and 1 are high, send a single pulse (low-to-high-to-low) from bit 7 of Port H, without affecting the other output pins.

8

6. Unit 8 of the courses notes begins with an example of interfacing a hex keypad to the MC9S12DP256B microcontroller. The layout of the keypad in that example is shown below: 0 1 2 3 4 5 6 7 8 9 A B C D E F. If the layout of the keypad were changed to the following: 0 4 8 C 1 5 9 D 2 6 A E 3 7 B F, What modifications would have to be made in the software shown on slide 6 of Unit 8? (Show the modified lines of code.) This slide is labeled "Read Keypad Procedure."