Project 8

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itt_432_project_8.docx

ITT 432 Project 8 Due: Apr. 29, 2013 Name________________________

Execute the following instructions in the pipelined datapath for five clock cycles. If branch is taken, you need to stall the voided instructions by writing “bubble” on top of the voided stages.

Initial status: $s1=100, $s2=100, $s3=40, $s4=3,, mem[200] = 35, mem[204] = 80, PC = 800

(a) Write down only the instruction name (lw, sub, etc.) on top of each stage of the pipeline.

(b) List all control signals where they are utilized and input and output values of all participating blocks.

800 beq $s3, $s4, 2

804 lw $s5, 100($s1)

808 add $s6, $s1, $s2

812 sw $s3, 104($s2)

816 sub $s7, $s2, $s1

CC1

f04-51-P374493

CC2

f04-51-P374493

CC3

\

f04-51-P374493 CC4

f04-51-P374493

CC5

f04-51-P374493