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TestIEGRE303Fall2020Full.pdf
EGRE 303 – Electronic Devices, Fall 2020
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Name:
SCHOOL OF ENGINEERING
Virginia Commonwealth University
Richmond, Virginia
COURSE: EGRE 303, Electronic Devices
EXAM: Test II
DATE: October 30, 2020
INSTRUCTIONS:
1. Open book and open notes exam. The use of quiz and HW solutions is not allowed.
2. Search for the answers in Internet is not allowed
3. There is a Formula Sheet at the end of the test.
4. Read all problems thoroughly. Information on other questions may help you with the question you
are working on.
5. JUSTIFY YOUR ANSWERS: SHOW ALL WORK in the space provided. For short answer
questions add short comments to justify your answer. Give units!
NO partial credit is given if work is not shown.
6. Write legibly, your answer will be considered wrong if I can’t read it. Work in a sequential and
organized manner.
7. Be specific and concise in your answers. No essays! You will lose points if you write something
wrong.
8. If you think that something is wrong and/or you need additional information in any of the
problems justify your case and proceed by making appropriate assumptions.
9. You have 150 minutes to complete this exam. Utilize your time wisely.
HONOR PLEDGE:
“On my honor, I have observed the VCU honor code during this exam.”
Student’s Signature:
Total points possible: 108
EGRE 303 – Electronic Devices, Fall 2020
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MULTIPLE CHOICE AND SHORT ANSWER QUESTIONS
1. (24 points) Ideal diode quiz (circle all what applies). a) (6 pts) Which of the following statements is (are) TRUTH for a p-n junction?
(i) The space-charge region about the metallurgical junction is due to exposed donors and acceptors on n-side and p-side, respectively, near the metallurgical junction.
(ii) The depletion region on one side of the metallurgical junction can be decreased by increasing the doping on the opposite side.
(iii) At equilibrium, the net total charge in the depletion region is independent on the doping levels (iv) The reverse saturation current is primarily due to drift of minority carriers
(v) Diffusion capacitance is due to minority carriers on both sides of the depletion region
(vi) The total current through p-n junction is independent on minority carrier lifetime.
b) (4 pts) Under forward bias, the most important physical processes occurring in the quasi neutral
regions near the p-n junction are:
(i) Diffusion and generation
(ii) Drift and diffusion
(iii) Drift and recombination
(iv) Diffusion and recombination
(v) Drift and generation
c) (4 pts) Under reverse bias, the most important physical processes occurring in the quasi neutral
regions near the p-n junction are:
(i) Drift and diffusion
(ii) Diffusion and recombination
(iii) Generation and diffusion
(iv) Generation and drift
d) (6 pts) Circle all that apply Which of the following statements are TRUTH concerning reverse
bias breakdown of a reverse-biased p-n junction?
(i) For tunneling (the Zener process) to occur in a P-N junction diode, the depletion width must be very small (< 10-6 cm)
(ii) Avalanche breakdown involves tunneling
(iii) Zener breakdown only occurs only for reverse bias of a large magnitude (> 7 V for a Si diode)
(iv) Breakdown can be observed both in reverse and forward biases
(v) Breakdown voltage is (to first order) inversely proportional to the doping on the lightly doped side of p + - n and n + -p junctions
(vi) Avalanching breakdown is destructive for a p-n junction while Zener breakdown is not
e) (4 pts) Which of the following will VIOLATE conditions assumed in deriving the ideal diode
equation:
(i) Generation-recombination in the depletion region
(ii) Low-level injection
(iii) No other processes (i.e., no photogeneration, avalanching, tunneling etc.)
(iv) Ideal Ohmic contacts on n- and p-side
EGRE 303 – Electronic Devices, Fall 2020
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2. (8 points) Explain the origin of the diffusion and junction capacitance. Explain under what conditions each of
them is prevail. If necessary, illustrate you answer with schematics.
3. (10 points) Compare p-n junction and Schottky (M-S) diodes (use a hypothetical ideal rectifier as a reference).
Explain the difference bewteen forward-bias and reverse-bias IV characteristics of these devices.
Can you tell for what kinds of applications Schottky diodes would be a prefereble choice and why?
4. (6 points) The storage time, ts, in the turn-off transient of a p+n diode can be increased by:
__ increasing τp on the n-side and increasing the forward bias on the diode.
__ increasing τp on the n-side and decreasing the forward bias on the diode.
__ decreasing τp on the n-side and decreasing the forward bias on the diode.
__ decreasing τp on the n-side and increasing the forward bias on the diode.
EGRE 303 – Electronic Devices, Fall 2020
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PROBLEMS
5. (22 points) Below is the energy band diagram for an ideal p-n step junction maintained at 300 K is shown in the
Figure below (Thin dash lines are just to guide eye). Ei = EG/2, EG = 2.0 eV, KS = 10, ε0 = 8.85 x 10 -14
F/cm,
diode area A = 10 -2
cm 2 , xp = xn = 10
-3 cm. Answer the following questions:
a) (2 points) Is the diode forward or reverse biased. Explain how you arrived at your answer.
b) (3 points) What is the magnitude of bias?
c) (5 points) What is the built-in potential, Vbi, of
the junction?
d) (4 points) What is the electric field in the depletion region? Provide both symbolic and numerical answer.
e) (4 points) What is the capacitance exhibited by the diode at the pictured point?
f) (2 points) Is it junction (depletion-layer) capacitance or diffusion capacitance? Justify your answer.
g) (2 points) If the diode were pulsed from the depicted bias point to a large reverse bias at time t = 0, would
you expect to observe a current transient characterized by a storage delay time tS? Justify your answer.
EGRE 303 – Electronic Devices, Fall 2020
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6. (18 points) For an ideal p-n junction diode shown below
(a) (1 pts) What is the doping on the p-side?
(b) (1 pts) What is the doping on the n-side?
(c) (2 pts) What is the intrinsic carrier
concentration?
(d) (10 points) sketch to correct scale on the y-axis the minority and majority carrier densities as a function of
position in the quasi-neutral regions on both sides of a p-n junction if VA = +29.9337 kT/q (e 29.9337 = 1013). Label
each curve clearly.
Is high level injection occuring? If so, indicate clearly where (on which, n or p side) high level injection exists.
Hint: your need to invoke the law of junction.
(e) (4 pts) How the minority carrier density vs. depth plot would change, in case if the material on n-side were have
shorter minority carrier lifetime. Sketch it in the same plot labeling the curves with τ1 and τ 2, where τ1 > τ 2
Ln(p) or ln(n)
102 104 106 108 1010 1012 1014 1016 1018
NP
nn0pp0
pn0 np0
EGRE 303 – Electronic Devices, Fall 2020
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7. (20 points) A p-n junction diode has the doping profile shown in the following sketch. Mathematically ND – NA
= N0[exp(αx) – 1], where N0 and α are constants.
a) Give a concise statement of the depletion approximation.
b) (2 points) Invoking the depletion approximation, make a sketch of
the charge density inside the diode on the provided coordinate frame.
c) (12 points) Based on depletion approximation, establish an
expression for the electric field, E(x), inside the depletion region.
d) (4 points) Explain you would complete the electrostatic development to eventually obtain an expression for
the depletion width, W. Be as specific as possible about the equations to be solved and the boundary
conditions to be employed. Organize your answer into steps – step 1, step 2, etc.
Don’t perform actual mathematical manipulations.
EGRE 303 – Electronic Devices, Fall 2020
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Formula Sheet
For nondegenerate semiconductors at equilibrium:
( )
( )
F i
i F
E E kT
i
E E kT
i
n n e
p n e
−
−
=
=
2
i np n=
For a pn step-junction having NA and ND doping concentrations in the p and n regions, respectively, under applied
bias VA (VA > 0 indicates forward bias):
“Law of junction”: 2 AqV kT
i np n e=
( ) ( )
( ) ( )
0
2
0
2
2
s D p bi A
A A D A D
bi
i s A
n bi A
D A D
K N x V V
q N N N N NkT V ln
q n K N
x V V q N N N
= − +
=
= − +
For the equations above, the semiconductors are assumed to be “nondegenerate”, i.e. the Fermi levels are not
closer than 3kT to the band edges.
Poisson’s Equation: 0s
d
dx K
= where is the electric field in the semiconductor, x is the position
coordinate, is the charge density, Ks0 is the permittivity of the semiconductor.
dV
dx = − , where V is the electrostatic potential
______________________________________________________
Thermal energy at room temperature: kT = 0.026 eV
For Si at room temperature: ni = 1010 cm-3, Eg = 1.12 eV
Electron charge: q = 1.6 x 10-19 C
EGRE 303 – Electronic Devices, Fall 2020
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Diodes
EGRE 303 – Electronic Devices, Fall 2020
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