Computer science lab assignment

profileHimaoeen
Switch_MSP432asm.zip
Home>Computer Science homework help>Computer science lab assignment

Switch_MSP432asm/.ccsproject

Switch_MSP432asm/.cproject

Switch_MSP432asm/.launches/Switch_MSP430asm.launch

Switch_MSP432asm/.project

Switch_MSP432asm org.eclipse.cdt.managedbuilder.core.genmakebuilder org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder full,incremental, com.ti.ccstudio.core.ccsNature org.eclipse.cdt.core.cnature org.eclipse.cdt.managedbuilder.core.managedBuildNature org.eclipse.cdt.core.ccnature org.eclipse.cdt.managedbuilder.core.ScannerConfigNature

Switch_MSP432asm/.settings/org.eclipse.cdt.codan.core.prefs

eclipse.preferences.version=1 inEditor=false onBuild=false

Switch_MSP432asm/.settings/org.eclipse.cdt.debug.core.prefs

eclipse.preferences.version=1 org.eclipse.cdt.debug.core.toggleBreakpointModel=com.ti.ccstudio.debug.CCSBreakpointMarker

Switch_MSP432asm/.settings/org.eclipse.core.resources.prefs

eclipse.preferences.version=1 encoding//Debug/makefile=UTF-8 encoding//Debug/objects.mk=UTF-8 encoding//Debug/sources.mk=UTF-8 encoding//Debug/subdir_rules.mk=UTF-8 encoding//Debug/subdir_vars.mk=UTF-8

Switch_MSP432asm/Debug/Switch_MSP430asm.map

****************************************************************************** TI ARM Linker PC v5.2.4 ****************************************************************************** >> Linked Sat Jun 20 15:39:05 2015 OUTPUT FILE NAME: <Switch_MSP430asm.out> ENTRY POINT SYMBOL: "_c_int00" address: 00000461 MEMORY CONFIGURATION name origin length used unused attr fill ---------------------- -------- --------- -------- -------- ---- -------- MAIN 00000000 00040000 00000570 0003fa90 R X INFO 00200000 00004000 00000000 00004000 R X SRAM_CODE 01000000 00010000 00000000 00010000 RW X SRAM_DATA 20000000 00010000 00000014 0000ffec RW SEGMENT ALLOCATION MAP run origin load origin length init length attrs members ---------- ----------- ---------- ----------- ----- ------- 00000000 00000000 00000570 00000570 r-x 00000000 00000000 00000144 00000144 r-- .intvecs 00000144 00000144 0000042c 0000042c r-x .text 20000000 20000000 00000014 00000014 rw- 20000000 20000000 00000014 00000014 rw- .data SECTION ALLOCATION MAP output attributes/ section page origin length input sections -------- ---- ---------- ---------- ---------------- .intvecs 0 00000000 00000144 00000000 00000144 msp432_startup_ccs.obj (.intvecs) .text 0 00000144 0000042c 00000144 000000d6 SwitchTestMain.obj (.text) 0000021a 00000002 --HOLE-- [fill = 0] 0000021c 000000a0 Switch.obj (.text) 000002bc 0000009c rtsv7M4_T_le_v4SPD16_eabi.lib : memcpy_t2.obj (.text) 00000358 0000009a msp432_startup_ccs.obj (.text) 000003f2 00000002 --HOLE-- [fill = 0] 000003f4 0000006c rtsv7M4_T_le_v4SPD16_eabi.lib : autoinit.obj (.text) 00000460 00000050 : boot.obj (.text) 000004b0 0000004c : cpy_tbl.obj (.text) 000004fc 00000044 : exit.obj (.text) 00000540 00000018 : args_main.obj (.text) 00000558 00000014 : _lock.obj (.text) 0000056c 00000004 : pre_init.obj (.text) .cinit 0 00000000 00000000 UNINITIALIZED .data 0 20000000 00000014 20000000 00000008 rtsv7M4_T_le_v4SPD16_eabi.lib : _lock.obj (.data) 20000008 00000008 : exit.obj (.data) 20000010 00000004 : stkdepth_vars.obj (.data) .TI.persistent * 0 20000000 00000000 UNINITIALIZED .stack 0 20010000 00000000 UNINITIALIZED GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name address name ------- ---- 000003ad ADC14_IRQHandler 000003b5 AES256_IRQHandler 00000273 Board_Init 000002b1 Board_Input 000004fd C$$EXIT 00000389 COMP_E0_IRQHandler 0000038b COMP_E1_IRQHandler 0000037f CS_IRQHandler 000003b9 DMA_ERR_IRQHandler 000003c1 DMA_INT0_IRQHandler 000003bf DMA_INT1_IRQHandler 000003bd DMA_INT2_IRQHandler 000003bb DMA_INT3_IRQHandler 00000377 DebugMon_Handler 000003cf DisableInterrupts 0000039d EUSCIA0_IRQHandler 0000039f EUSCIA1_IRQHandler 000003a1 EUSCIA2_IRQHandler 000003a3 EUSCIA3_IRQHandler 000003a5 EUSCIB0_IRQHandler 000003a7 EUSCIB1_IRQHandler 000003a9 EUSCIB2_IRQHandler 000003ab EUSCIB3_IRQHandler 000003d5 EnableInterrupts 000003e5 EndCritical 00000387 FLCTL_IRQHandler 00000385 FPU_IRQHandler 00000381 PCM_IRQHandler 000003c3 PORT1_IRQHandler 000003c5 PORT2_IRQHandler 000003c7 PORT3_IRQHandler 000003c9 PORT4_IRQHandler 000003cb PORT5_IRQHandler 000003cd PORT6_IRQHandler 0000037d PSS_IRQHandler 00000379 PendSV_Handler 000003b7 RTC_C_IRQHandler UNDEFED SHT$$INIT_ARRAY$$Base UNDEFED SHT$$INIT_ARRAY$$Limit 00000375 SVC_Handler 000003db StartCritical 00000235 Switch_Init 00000267 Switch_Input 0000037b SysTick_Handler 000003af T32_INT1_IRQHandler 000003b1 T32_INT2_IRQHandler 000003b3 T32_INTC_IRQHandler 0000038d TA0_0_IRQHandler 0000038f TA0_N_IRQHandler 00000391 TA1_0_IRQHandler 00000393 TA1_N_IRQHandler 00000395 TA2_0_IRQHandler 00000397 TA2_N_IRQHandler 00000399 TA3_0_IRQHandler 0000039b TA3_N_IRQHandler 4000480c WDTCTL_SYM 00000383 WDT_A_IRQHandler 000003ed WaitForInterrupt 20010000 __STACK_END 00000000 __STACK_SIZE UNDEFED __TI_CINIT_Base UNDEFED __TI_CINIT_Limit UNDEFED __TI_Handler_Table_Base UNDEFED __TI_Handler_Table_Limit 000003f5 __TI_auto_init 20000008 __TI_cleanup_ptr 2000000c __TI_dtors_ptr 00000000 __TI_static_base__ 000002bd __aeabi_memcpy 000002bd __aeabi_memcpy4 000002bd __aeabi_memcpy8 ffffffff __binit__ ffffffff __c_args__ 20010000 __stack 00000541 _args_main 00000461 _c_int00 20000000 _lock 00000567 _nop 0000055f _register_lock 00000559 _register_unlock 0000056d _system_pre_init 20000004 _unlock 00000501 abort ffffffff binit 000004b1 copy_in 00000509 exit 00000000 interruptVectors 00000175 main 20000010 main_func_sp 000002bd memcpy GLOBAL SYMBOLS: SORTED BY Symbol Address address name ------- ---- 00000000 __STACK_SIZE 00000000 __TI_static_base__ 00000000 interruptVectors 00000175 main 00000235 Switch_Init 00000267 Switch_Input 00000273 Board_Init 000002b1 Board_Input 000002bd __aeabi_memcpy 000002bd __aeabi_memcpy4 000002bd __aeabi_memcpy8 000002bd memcpy 00000375 SVC_Handler 00000377 DebugMon_Handler 00000379 PendSV_Handler 0000037b SysTick_Handler 0000037d PSS_IRQHandler 0000037f CS_IRQHandler 00000381 PCM_IRQHandler 00000383 WDT_A_IRQHandler 00000385 FPU_IRQHandler 00000387 FLCTL_IRQHandler 00000389 COMP_E0_IRQHandler 0000038b COMP_E1_IRQHandler 0000038d TA0_0_IRQHandler 0000038f TA0_N_IRQHandler 00000391 TA1_0_IRQHandler 00000393 TA1_N_IRQHandler 00000395 TA2_0_IRQHandler 00000397 TA2_N_IRQHandler 00000399 TA3_0_IRQHandler 0000039b TA3_N_IRQHandler 0000039d EUSCIA0_IRQHandler 0000039f EUSCIA1_IRQHandler 000003a1 EUSCIA2_IRQHandler 000003a3 EUSCIA3_IRQHandler 000003a5 EUSCIB0_IRQHandler 000003a7 EUSCIB1_IRQHandler 000003a9 EUSCIB2_IRQHandler 000003ab EUSCIB3_IRQHandler 000003ad ADC14_IRQHandler 000003af T32_INT1_IRQHandler 000003b1 T32_INT2_IRQHandler 000003b3 T32_INTC_IRQHandler 000003b5 AES256_IRQHandler 000003b7 RTC_C_IRQHandler 000003b9 DMA_ERR_IRQHandler 000003bb DMA_INT3_IRQHandler 000003bd DMA_INT2_IRQHandler 000003bf DMA_INT1_IRQHandler 000003c1 DMA_INT0_IRQHandler 000003c3 PORT1_IRQHandler 000003c5 PORT2_IRQHandler 000003c7 PORT3_IRQHandler 000003c9 PORT4_IRQHandler 000003cb PORT5_IRQHandler 000003cd PORT6_IRQHandler 000003cf DisableInterrupts 000003d5 EnableInterrupts 000003db StartCritical 000003e5 EndCritical 000003ed WaitForInterrupt 000003f5 __TI_auto_init 00000461 _c_int00 000004b1 copy_in 000004fd C$$EXIT 00000501 abort 00000509 exit 00000541 _args_main 00000559 _register_unlock 0000055f _register_lock 00000567 _nop 0000056d _system_pre_init 20000000 _lock 20000004 _unlock 20000008 __TI_cleanup_ptr 2000000c __TI_dtors_ptr 20000010 main_func_sp 20010000 __STACK_END 20010000 __stack 4000480c WDTCTL_SYM ffffffff __binit__ ffffffff __c_args__ ffffffff binit UNDEFED SHT$$INIT_ARRAY$$Base UNDEFED SHT$$INIT_ARRAY$$Limit UNDEFED __TI_CINIT_Base UNDEFED __TI_CINIT_Limit UNDEFED __TI_Handler_Table_Base UNDEFED __TI_Handler_Table_Limit [90 symbols]

Switch_MSP432asm/Debug/Switch_MSP430asm_linkInfo.xml

TI ARM Linker PC v5.2.4 Copyright (c) 1996-2015 Texas Instruments Incorporated 0x5585cf69 0x0 Switch_MSP430asm.out _c_int00 0x461 .\ object Switch.obj Switch.obj .\ object SwitchTestMain.obj SwitchTestMain.obj .\ object msp432_startup_ccs.obj msp432_startup_ccs.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.4\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib boot.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.4\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib exit.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.4\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib pre_init.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.4\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib stkdepth_vars.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.4\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib _lock.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.4\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib args_main.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.4\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib autoinit.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.4\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib cpy_tbl.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.4\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib memcpy_t2.obj .intvecs 0x0 0x0 0x144 .text 0x144 0x144 0xd6 .text 0x21c 0x21c 0xa0 .text 0x2bc 0x2bc 0x9c .text 0x358 0x358 0x9a .text 0x3f4 0x3f4 0x6c .text 0x460 0x460 0x50 .text 0x4b0 0x4b0 0x4c .text 0x4fc 0x4fc 0x44 .text 0x540 0x540 0x18 .text 0x558 0x558 0x14 .text 0x56c 0x56c 0x4 .stack true 0x20010000 0x0 .stack true 0x20010000 0x0 .data 0x20000000 0x20000000 0x8 .data 0x20000008 0x20000008 0x8 .data 0x20000010 0x20000010 0x4 .debug_info 0x0 0x0 0x182 .debug_info 0x182 0x182 0x125 .debug_info 0x2a7 0x2a7 0x105 .debug_info 0x3ac 0x3ac 0xf2 .debug_info 0x49e 0x49e 0x169e .debug_info 0x1b3c 0x1b3c 0x84 .debug_info 0x1bc0 0x1bc0 0x136 .debug_info 0x1cf6 0x1cf6 0x174 .debug_info 0x1e6a 0x1e6a 0x119 .debug_info 0x1f83 0x1f83 0x1f0 .debug_info 0x2173 0x2173 0x12b .debug_info 0x229e 0x229e 0xec .debug_info 0x238a 0x238a 0x107 .debug_info 0x2491 0x2491 0xf6 .debug_info 0x2587 0x2587 0x202 .debug_info 0x2789 0x2789 0x149 .debug_info 0x28d2 0x28d2 0x14a .debug_info 0x2a1c 0x2a1c 0x5e .debug_info 0x2a7a 0x2a7a 0x2a0 .debug_info 0x2d1a 0x2d1a 0x15a .debug_info 0x2e74 0x2e74 0x39 .debug_info 0x2ead 0x2ead 0xcd .debug_info 0x2f7a 0x2f7a 0x1c3 .debug_info 0x313d 0x313d 0x166 .debug_info 0x32a3 0x32a3 0x2c .debug_info 0x32cf 0x32cf 0x2c .debug_info 0x32fb 0x32fb 0xf8 .debug_info 0x33f3 0x33f3 0xaa .debug_line 0x0 0x0 0x99 .debug_line 0x99 0x99 0x7b .debug_line 0x114 0x114 0x3b .debug_line 0x14f 0x14f 0x3b .debug_line 0x18a 0x18a 0x55a .debug_line 0x6e4 0x6e4 0x20 .debug_line 0x704 0x704 0x52 .debug_line 0x756 0x756 0x71 .debug_line 0x7c7 0x7c7 0x2a .debug_line 0x7f1 0x7f1 0x7a .debug_line 0x86b 0x86b 0x40 .debug_line 0x8ab 0x8ab 0x33 .debug_line 0x8de 0x8de 0x20 .debug_line 0x8fe 0x8fe 0x2b .debug_line 0x929 0x929 0x68 .debug_line 0x991 0x991 0x2b .debug_line 0x9bc 0x9bc 0x50 .debug_line 0xa0c 0xa0c 0x2b .debug_line 0xa37 0xa37 0x81 .debug_line 0xab8 0xab8 0x79 .debug_line 0xb31 0xb31 0x2e .debug_line 0xb5f 0xb5f 0x73 .debug_line 0xbd2 0xbd2 0x80 .debug_line 0xc52 0xc52 0x68 .debug_line 0xcba 0xcba 0x2e .debug_line 0xce8 0xce8 0x72 .debug_line 0xd5a 0xd5a 0x88 .debug_abbrev 0x0 0x0 0x3b .debug_abbrev 0x3b 0x3b 0x3b .debug_abbrev 0x76 0x76 0x5d .debug_abbrev 0xd3 0xd3 0x29 .debug_abbrev 0xfc 0xfc 0xf8 .debug_abbrev 0x1f4 0x1f4 0x1f .debug_abbrev 0x213 0x213 0x3e .debug_abbrev 0x251 0x251 0x6b .debug_abbrev 0x2bc 0x2bc 0x29 .debug_abbrev 0x2e5 0x2e5 0xba .debug_abbrev 0x39f 0x39f 0x55 .debug_abbrev 0x3f4 0x3f4 0x27 .debug_abbrev 0x41b 0x41b 0x45 .debug_abbrev 0x460 0x460 0x29 .debug_abbrev 0x489 0x489 0x6f .debug_abbrev 0x4f8 0x4f8 0x8e .debug_abbrev 0x586 0x586 0x68 .debug_abbrev 0x5ee 0x5ee 0x49 .debug_abbrev 0x637 0x637 0x9a .debug_abbrev 0x6d1 0x6d1 0x7e .debug_abbrev 0x74f 0x74f 0x24 .debug_abbrev 0x773 0x773 0x4b .debug_abbrev 0x7be 0x7be 0x9c .debug_abbrev 0x85a 0x85a 0x8c .debug_abbrev 0x8e6 0x8e6 0x24 .debug_abbrev 0x90a 0x90a 0x24 .debug_abbrev 0x92e 0x92e 0x3e .debug_abbrev 0x96c 0x96c 0xf .debug_aranges 0x0 0x0 0x38 .debug_aranges 0x38 0x38 0x20 .debug_aranges 0x58 0x58 0x1c8 .debug_aranges 0x220 0x220 0x20 .debug_aranges 0x240 0x240 0x30 .debug_aranges 0x270 0x270 0x20 .debug_aranges 0x290 0x290 0x30 .debug_aranges 0x2c0 0x2c0 0x20 .debug_aranges 0x2e0 0x2e0 0x20 .debug_aranges 0x300 0x300 0x20 .debug_aranges 0x320 0x320 0x20 .debug_pubnames 0x0 0x0 0x52 .debug_pubnames 0x52 0x52 0x1b .debug_pubnames 0x6d 0x6d 0x27 .debug_pubnames 0x94 0x94 0x474 .debug_pubnames 0x508 0x508 0x1f .debug_pubnames 0x527 0x527 0x3a .debug_pubnames 0x561 0x561 0x35 .debug_pubnames 0x596 0x596 0x27 .debug_pubnames 0x5bd 0x5bd 0x23 .debug_pubnames 0x5e0 0x5e0 0x28 .debug_pubnames 0x608 0x608 0x43 .debug_pubnames 0x64b 0x64b 0x21 .debug_pubnames 0x66c 0x66c 0x25 .debug_pubnames 0x691 0x691 0x1e .debug_pubnames 0x6af 0x6af 0x1d .debug_frame 0x0 0x0 0x404 .debug_frame 0x404 0x404 0xb3 .debug_frame 0x4b7 0x4b7 0x7f .debug_frame 0x536 0x536 0xa1 .debug_frame 0x5d7 0x5d7 0x7f .debug_frame 0x656 0x656 0x8a .debug_frame 0x6e0 0x6e0 0x8e .debug_str 0x0 0x0 0xf5 .debug_str 0xf5 0xf5 0xb9 .debug_str 0x1ae 0x1ae 0xc5 .debug_str 0x273 0x273 0x14f .debug_str 0x3c2 0x3c2 0xba .debug_str 0x47c 0x47c 0xf8 .debug_pubtypes 0x0 0x0 0xed .debug_pubtypes 0xed 0xed 0x1f .debug_pubtypes 0x10c 0x10c 0x1f .debug_pubtypes 0x12b 0x12b 0x1b .debug_pubtypes 0x146 0x146 0x32 .debug_pubtypes 0x178 0x178 0x50 .debug_pubtypes 0x1c8 0x1c8 0x23 .debug_pubtypes 0x1eb 0x1eb 0x1d .intvecs 0x0 0x0 0x144 .text 0x144 0x144 0x42c .const 0x0 0x0 .cinit 0x0 0x0 .pinit 0x0 0x0 .flashMailbox 0x0 0x0 .vtable 0x0 0x0 .sysmem 0x0 0x0 .stack 0x20010000 0x0 .TI.noinit 0x0 0x0 .bss 0x0 0x0 BSS_GROUP 0x0 0x0 .TI.persistent 0x20000000 0x0 .data 0x20000000 0x20000000 0x14 DATA_GROUP 0x20000000 0x20000000 0x14 .debug_info 0x0 0x0 0x349d .debug_line 0x0 0x0 0xde2 .debug_abbrev 0x0 0x0 0x97b .debug_aranges 0x0 0x0 0x340 .debug_pubnames 0x0 0x0 0x6cc .debug_frame 0x0 0x0 0x76e .debug_str 0x0 0x0 0x574 .debug_pubtypes 0x0 0x0 0x208 SEGMENT_0 0x0 0x0 0x570 0x5 SEGMENT_1 0x20000000 0x20000000 0x14 0x6 MAIN 0x0 0x0 0x40000 0x570 0x3fa90 RX 0x0 0x144 0x144 0x42c 0x570 0x3fa90 INFO 0x0 0x200000 0x4000 0x0 0x4000 RX SRAM_CODE 0x0 0x1000000 0x10000 0x0 0x10000 RWX SRAM_DATA 0x0 0x20000000 0x10000 0x14 0xffec RW 0x20000000 0x14 0x20000014 0xffec 0x20010000 0x0 WDTCTL_SYM 0x4000480c binit 0xffffffff __binit__ 0xffffffff __STACK_SIZE 0x0 __STACK_END 0x20010000 __c_args__ 0xffffffff __TI_static_base__ 0x0 Switch_Init 0x235 Board_Init 0x273 Switch_Input 0x267 Board_Input 0x2b1 main 0x175 T32_INT2_IRQHandler 0x3b1 PendSV_Handler 0x379 SysTick_Handler 0x37b EUSCIA3_IRQHandler 0x3a3 SVC_Handler 0x375 EUSCIB1_IRQHandler 0x3a7 PORT4_IRQHandler 0x3c9 AES256_IRQHandler 0x3b5 FPU_IRQHandler 0x385 EUSCIB2_IRQHandler 0x3a9 PORT1_IRQHandler 0x3c3 RTC_C_IRQHandler 0x3b7 TA2_0_IRQHandler 0x395 TA3_N_IRQHandler 0x39b DMA_INT3_IRQHandler 0x3bb PORT2_IRQHandler 0x3c5 StartCritical 0x3db TA0_0_IRQHandler 0x38d PSS_IRQHandler 0x37d TA1_N_IRQHandler 0x393 EUSCIA1_IRQHandler 0x39f EUSCIA2_IRQHandler 0x3a1 COMP_E0_IRQHandler 0x389 WDT_A_IRQHandler 0x383 EUSCIB0_IRQHandler 0x3a5 FLCTL_IRQHandler 0x387 EndCritical 0x3e5 DMA_INT1_IRQHandler 0x3bf PCM_IRQHandler 0x381 ADC14_IRQHandler 0x3ad T32_INTC_IRQHandler 0x3b3 DMA_INT2_IRQHandler 0x3bd TA3_0_IRQHandler 0x399 EUSCIA0_IRQHandler 0x39d DMA_ERR_IRQHandler 0x3b9 DisableInterrupts 0x3cf PORT5_IRQHandler 0x3cb TA1_0_IRQHandler 0x391 TA2_N_IRQHandler 0x397 COMP_E1_IRQHandler 0x38b EUSCIB3_IRQHandler 0x3ab WaitForInterrupt 0x3ed interruptVectors 0x0 EnableInterrupts 0x3d5 PORT6_IRQHandler 0x3cd TA0_N_IRQHandler 0x38f T32_INT1_IRQHandler 0x3af DebugMon_Handler 0x377 DMA_INT0_IRQHandler 0x3c1 PORT3_IRQHandler 0x3c7 CS_IRQHandler 0x37f _c_int00 0x461 __stack 0x20010000 C$$EXIT 0x4fd abort 0x501 exit 0x509 __TI_dtors_ptr 0x2000000c __TI_cleanup_ptr 0x20000008 _system_pre_init 0x56d main_func_sp 0x20000010 _nop 0x567 _lock 0x20000000 _unlock 0x20000004 _register_lock 0x55f _register_unlock 0x559 _args_main 0x541 __TI_auto_init 0x3f5 copy_in 0x4b1 memcpy 0x2bd __aeabi_memcpy 0x2bd __aeabi_memcpy8 0x2bd __aeabi_memcpy4 0x2bd __TI_Handler_Table_Base 0x0 __TI_Handler_Table_Limit 0x0 __TI_CINIT_Limit 0x0 __TI_CINIT_Base 0x0 SHT$$INIT_ARRAY$$Limit 0x0 SHT$$INIT_ARRAY$$Base 0x0 Link successful

Switch_MSP432asm/Debug/Switch_MSP432asm.map

****************************************************************************** TI ARM Linker PC v5.2.2 ****************************************************************************** >> Linked Thu Jul 02 17:23:11 2015 OUTPUT FILE NAME: <Switch_MSP432asm.out> ENTRY POINT SYMBOL: "_c_int00" address: 00000475 MEMORY CONFIGURATION name origin length used unused attr fill ---------------------- -------- --------- -------- -------- ---- -------- MAIN 00000000 00040000 00000584 0003fa7c R X INFO 00200000 00004000 00000000 00004000 R X SRAM_CODE 01000000 00010000 00000000 00010000 RW X SRAM_DATA 20000000 00010000 00000014 0000ffec RW SEGMENT ALLOCATION MAP run origin load origin length init length attrs members ---------- ----------- ---------- ----------- ----- ------- 00000000 00000000 00000584 00000584 r-x 00000000 00000000 00000144 00000144 r-- .intvecs 00000144 00000144 00000440 00000440 r-x .text 20000000 20000000 00000014 00000014 rw- 20000000 20000000 00000014 00000014 rw- .data SECTION ALLOCATION MAP output attributes/ section page origin length input sections -------- ---- ---------- ---------- ---------------- .intvecs 0 00000000 00000144 00000000 00000144 msp432_startup_ccs.obj (.intvecs) .text 0 00000144 00000440 00000144 000000ea SwitchTestMain.obj (.text) 0000022e 00000002 --HOLE-- [fill = 0] 00000230 000000a0 Switch.obj (.text) 000002d0 0000009c rtsv7M4_T_le_v4SPD16_eabi.lib : memcpy_t2.obj (.text) 0000036c 0000009a msp432_startup_ccs.obj (.text) 00000406 00000002 --HOLE-- [fill = 0] 00000408 0000006c rtsv7M4_T_le_v4SPD16_eabi.lib : autoinit.obj (.text) 00000474 00000050 : boot.obj (.text) 000004c4 0000004c : cpy_tbl.obj (.text) 00000510 00000044 : exit.obj (.text) 00000554 00000018 : args_main.obj (.text) 0000056c 00000014 : _lock.obj (.text) 00000580 00000004 : pre_init.obj (.text) .cinit 0 00000000 00000000 UNINITIALIZED .data 0 20000000 00000014 20000000 00000008 rtsv7M4_T_le_v4SPD16_eabi.lib : _lock.obj (.data) 20000008 00000008 : exit.obj (.data) 20000010 00000004 : stkdepth_vars.obj (.data) .TI.persistent * 0 20000000 00000000 UNINITIALIZED .stack 0 20010000 00000000 UNINITIALIZED GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name address name ------- ---- 000003c1 ADC14_IRQHandler 000003c9 AES256_IRQHandler 00000287 Board_Init 000002c5 Board_Input 00000511 C$$EXIT 0000039d COMP_E0_IRQHandler 0000039f COMP_E1_IRQHandler 00000393 CS_IRQHandler 000003cd DMA_ERR_IRQHandler 000003d5 DMA_INT0_IRQHandler 000003d3 DMA_INT1_IRQHandler 000003d1 DMA_INT2_IRQHandler 000003cf DMA_INT3_IRQHandler 0000038b DebugMon_Handler 000003e3 DisableInterrupts 000003b1 EUSCIA0_IRQHandler 000003b3 EUSCIA1_IRQHandler 000003b5 EUSCIA2_IRQHandler 000003b7 EUSCIA3_IRQHandler 000003b9 EUSCIB0_IRQHandler 000003bb EUSCIB1_IRQHandler 000003bd EUSCIB2_IRQHandler 000003bf EUSCIB3_IRQHandler 000003e9 EnableInterrupts 000003f9 EndCritical 0000039b FLCTL_IRQHandler 00000399 FPU_IRQHandler 00000395 PCM_IRQHandler 000003d7 PORT1_IRQHandler 000003d9 PORT2_IRQHandler 000003db PORT3_IRQHandler 000003dd PORT4_IRQHandler 000003df PORT5_IRQHandler 000003e1 PORT6_IRQHandler 00000391 PSS_IRQHandler 0000038d PendSV_Handler 000003cb RTC_C_IRQHandler UNDEFED SHT$$INIT_ARRAY$$Base UNDEFED SHT$$INIT_ARRAY$$Limit 00000389 SVC_Handler 000003ef StartCritical 00000249 Switch_Init 0000027b Switch_Input 0000038f SysTick_Handler 000003c3 T32_INT1_IRQHandler 000003c5 T32_INT2_IRQHandler 000003c7 T32_INTC_IRQHandler 000003a1 TA0_0_IRQHandler 000003a3 TA0_N_IRQHandler 000003a5 TA1_0_IRQHandler 000003a7 TA1_N_IRQHandler 000003a9 TA2_0_IRQHandler 000003ab TA2_N_IRQHandler 000003ad TA3_0_IRQHandler 000003af TA3_N_IRQHandler 4000480c WDTCTL_SYM 00000397 WDT_A_IRQHandler 00000401 WaitForInterrupt 20010000 __STACK_END 00000000 __STACK_SIZE UNDEFED __TI_CINIT_Base UNDEFED __TI_CINIT_Limit UNDEFED __TI_Handler_Table_Base UNDEFED __TI_Handler_Table_Limit 00000409 __TI_auto_init 20000008 __TI_cleanup_ptr 2000000c __TI_dtors_ptr 00000000 __TI_static_base__ 000002d1 __aeabi_memcpy 000002d1 __aeabi_memcpy4 000002d1 __aeabi_memcpy8 ffffffff __binit__ ffffffff __c_args__ 20010000 __stack 00000555 _args_main 00000475 _c_int00 20000000 _lock 0000057b _nop 00000573 _register_lock 0000056d _register_unlock 00000581 _system_pre_init 20000004 _unlock 00000515 abort ffffffff binit 000004c5 copy_in 0000051d exit 00000000 interruptVectors 0000017d main 20000010 main_func_sp 000002d1 memcpy GLOBAL SYMBOLS: SORTED BY Symbol Address address name ------- ---- 00000000 __STACK_SIZE 00000000 __TI_static_base__ 00000000 interruptVectors 0000017d main 00000249 Switch_Init 0000027b Switch_Input 00000287 Board_Init 000002c5 Board_Input 000002d1 __aeabi_memcpy 000002d1 __aeabi_memcpy4 000002d1 __aeabi_memcpy8 000002d1 memcpy 00000389 SVC_Handler 0000038b DebugMon_Handler 0000038d PendSV_Handler 0000038f SysTick_Handler 00000391 PSS_IRQHandler 00000393 CS_IRQHandler 00000395 PCM_IRQHandler 00000397 WDT_A_IRQHandler 00000399 FPU_IRQHandler 0000039b FLCTL_IRQHandler 0000039d COMP_E0_IRQHandler 0000039f COMP_E1_IRQHandler 000003a1 TA0_0_IRQHandler 000003a3 TA0_N_IRQHandler 000003a5 TA1_0_IRQHandler 000003a7 TA1_N_IRQHandler 000003a9 TA2_0_IRQHandler 000003ab TA2_N_IRQHandler 000003ad TA3_0_IRQHandler 000003af TA3_N_IRQHandler 000003b1 EUSCIA0_IRQHandler 000003b3 EUSCIA1_IRQHandler 000003b5 EUSCIA2_IRQHandler 000003b7 EUSCIA3_IRQHandler 000003b9 EUSCIB0_IRQHandler 000003bb EUSCIB1_IRQHandler 000003bd EUSCIB2_IRQHandler 000003bf EUSCIB3_IRQHandler 000003c1 ADC14_IRQHandler 000003c3 T32_INT1_IRQHandler 000003c5 T32_INT2_IRQHandler 000003c7 T32_INTC_IRQHandler 000003c9 AES256_IRQHandler 000003cb RTC_C_IRQHandler 000003cd DMA_ERR_IRQHandler 000003cf DMA_INT3_IRQHandler 000003d1 DMA_INT2_IRQHandler 000003d3 DMA_INT1_IRQHandler 000003d5 DMA_INT0_IRQHandler 000003d7 PORT1_IRQHandler 000003d9 PORT2_IRQHandler 000003db PORT3_IRQHandler 000003dd PORT4_IRQHandler 000003df PORT5_IRQHandler 000003e1 PORT6_IRQHandler 000003e3 DisableInterrupts 000003e9 EnableInterrupts 000003ef StartCritical 000003f9 EndCritical 00000401 WaitForInterrupt 00000409 __TI_auto_init 00000475 _c_int00 000004c5 copy_in 00000511 C$$EXIT 00000515 abort 0000051d exit 00000555 _args_main 0000056d _register_unlock 00000573 _register_lock 0000057b _nop 00000581 _system_pre_init 20000000 _lock 20000004 _unlock 20000008 __TI_cleanup_ptr 2000000c __TI_dtors_ptr 20000010 main_func_sp 20010000 __STACK_END 20010000 __stack 4000480c WDTCTL_SYM ffffffff __binit__ ffffffff __c_args__ ffffffff binit UNDEFED SHT$$INIT_ARRAY$$Base UNDEFED SHT$$INIT_ARRAY$$Limit UNDEFED __TI_CINIT_Base UNDEFED __TI_CINIT_Limit UNDEFED __TI_Handler_Table_Base UNDEFED __TI_Handler_Table_Limit [90 symbols]

Switch_MSP432asm/Debug/Switch_MSP432asm_linkInfo.xml

TI ARM Linker PC v5.2.2 Copyright (c) 1996-2015 Texas Instruments Incorporated 0x5595b9cf 0x0 Switch_MSP432asm.out _c_int00 0x475 .\ object Switch.obj Switch.obj .\ object SwitchTestMain.obj SwitchTestMain.obj .\ object msp432_startup_ccs.obj msp432_startup_ccs.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.2\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib boot.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.2\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib exit.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.2\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib pre_init.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.2\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib stkdepth_vars.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.2\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib _lock.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.2\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib args_main.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.2\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib autoinit.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.2\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib cpy_tbl.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.2\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib memcpy_t2.obj .intvecs 0x0 0x0 0x144 .text 0x144 0x144 0xea .text 0x230 0x230 0xa0 .text 0x2d0 0x2d0 0x9c .text 0x36c 0x36c 0x9a .text 0x408 0x408 0x6c .text 0x474 0x474 0x50 .text 0x4c4 0x4c4 0x4c .text 0x510 0x510 0x44 .text 0x554 0x554 0x18 .text 0x56c 0x56c 0x14 .text 0x580 0x580 0x4 .stack true 0x20010000 0x0 .stack true 0x20010000 0x0 .data 0x20000000 0x20000000 0x8 .data 0x20000008 0x20000008 0x8 .data 0x20000010 0x20000010 0x4 .debug_info 0x0 0x0 0x18a .debug_info 0x18a 0x18a 0x127 .debug_info 0x2b1 0x2b1 0x105 .debug_info 0x3b6 0x3b6 0xf2 .debug_info 0x4a8 0x4a8 0x169e .debug_info 0x1b46 0x1b46 0x84 .debug_info 0x1bca 0x1bca 0x138 .debug_info 0x1d02 0x1d02 0x174 .debug_info 0x1e76 0x1e76 0x119 .debug_info 0x1f8f 0x1f8f 0x1f0 .debug_info 0x217f 0x217f 0x12b .debug_info 0x22aa 0x22aa 0xec .debug_info 0x2396 0x2396 0x107 .debug_info 0x249d 0x249d 0xf6 .debug_info 0x2593 0x2593 0x202 .debug_info 0x2795 0x2795 0x149 .debug_info 0x28de 0x28de 0x14a .debug_info 0x2a28 0x2a28 0x5e .debug_info 0x2a86 0x2a86 0x2a0 .debug_info 0x2d26 0x2d26 0x15a .debug_info 0x2e80 0x2e80 0x39 .debug_info 0x2eb9 0x2eb9 0xcd .debug_info 0x2f86 0x2f86 0x1c3 .debug_info 0x3149 0x3149 0x17f .debug_info 0x32c8 0x32c8 0x2c .debug_info 0x32f4 0x32f4 0x2c .debug_info 0x3320 0x3320 0xfa .debug_info 0x341a 0x341a 0xaa .debug_line 0x0 0x0 0x99 .debug_line 0x99 0x99 0x7f .debug_line 0x118 0x118 0x3b .debug_line 0x153 0x153 0x3b .debug_line 0x18e 0x18e 0x55a .debug_line 0x6e8 0x6e8 0x20 .debug_line 0x708 0x708 0x52 .debug_line 0x75a 0x75a 0x71 .debug_line 0x7cb 0x7cb 0x2a .debug_line 0x7f5 0x7f5 0x7a .debug_line 0x86f 0x86f 0x40 .debug_line 0x8af 0x8af 0x33 .debug_line 0x8e2 0x8e2 0x20 .debug_line 0x902 0x902 0x2b .debug_line 0x92d 0x92d 0x68 .debug_line 0x995 0x995 0x2b .debug_line 0x9c0 0x9c0 0x50 .debug_line 0xa10 0xa10 0x2b .debug_line 0xa3b 0xa3b 0x81 .debug_line 0xabc 0xabc 0x79 .debug_line 0xb35 0xb35 0x2e .debug_line 0xb63 0xb63 0x73 .debug_line 0xbd6 0xbd6 0x80 .debug_line 0xc56 0xc56 0x68 .debug_line 0xcbe 0xcbe 0x2e .debug_line 0xcec 0xcec 0x72 .debug_line 0xd5e 0xd5e 0x88 .debug_abbrev 0x0 0x0 0x3a .debug_abbrev 0x3a 0x3a 0x3a .debug_abbrev 0x74 0x74 0x5d .debug_abbrev 0xd1 0xd1 0x29 .debug_abbrev 0xfa 0xfa 0xf8 .debug_abbrev 0x1f2 0x1f2 0x1f .debug_abbrev 0x211 0x211 0x3d .debug_abbrev 0x24e 0x24e 0x6b .debug_abbrev 0x2b9 0x2b9 0x29 .debug_abbrev 0x2e2 0x2e2 0xba .debug_abbrev 0x39c 0x39c 0x55 .debug_abbrev 0x3f1 0x3f1 0x27 .debug_abbrev 0x418 0x418 0x45 .debug_abbrev 0x45d 0x45d 0x29 .debug_abbrev 0x486 0x486 0x6f .debug_abbrev 0x4f5 0x4f5 0x8e .debug_abbrev 0x583 0x583 0x68 .debug_abbrev 0x5eb 0x5eb 0x49 .debug_abbrev 0x634 0x634 0x9a .debug_abbrev 0x6ce 0x6ce 0x7e .debug_abbrev 0x74c 0x74c 0x24 .debug_abbrev 0x770 0x770 0x4b .debug_abbrev 0x7bb 0x7bb 0x9c .debug_abbrev 0x857 0x857 0x8c .debug_abbrev 0x8e3 0x8e3 0x24 .debug_abbrev 0x907 0x907 0x24 .debug_abbrev 0x92b 0x92b 0x3d .debug_abbrev 0x968 0x968 0xf .debug_aranges 0x0 0x0 0x38 .debug_aranges 0x38 0x38 0x20 .debug_aranges 0x58 0x58 0x1c8 .debug_aranges 0x220 0x220 0x20 .debug_aranges 0x240 0x240 0x30 .debug_aranges 0x270 0x270 0x20 .debug_aranges 0x290 0x290 0x30 .debug_aranges 0x2c0 0x2c0 0x20 .debug_aranges 0x2e0 0x2e0 0x20 .debug_aranges 0x300 0x300 0x20 .debug_aranges 0x320 0x320 0x20 .debug_pubnames 0x0 0x0 0x52 .debug_pubnames 0x52 0x52 0x1b .debug_pubnames 0x6d 0x6d 0x27 .debug_pubnames 0x94 0x94 0x474 .debug_pubnames 0x508 0x508 0x1f .debug_pubnames 0x527 0x527 0x3a .debug_pubnames 0x561 0x561 0x35 .debug_pubnames 0x596 0x596 0x27 .debug_pubnames 0x5bd 0x5bd 0x23 .debug_pubnames 0x5e0 0x5e0 0x28 .debug_pubnames 0x608 0x608 0x43 .debug_pubnames 0x64b 0x64b 0x21 .debug_pubnames 0x66c 0x66c 0x25 .debug_pubnames 0x691 0x691 0x1e .debug_pubnames 0x6af 0x6af 0x1d .debug_frame 0x0 0x0 0x404 .debug_frame 0x404 0x404 0xb3 .debug_frame 0x4b7 0x4b7 0x7f .debug_frame 0x536 0x536 0xa1 .debug_frame 0x5d7 0x5d7 0x7f .debug_frame 0x656 0x656 0x8a .debug_frame 0x6e0 0x6e0 0x8e .debug_str 0x0 0x0 0xf5 .debug_str 0xf5 0xf5 0xb9 .debug_str 0x1ae 0x1ae 0xc5 .debug_str 0x273 0x273 0x14f .debug_str 0x3c2 0x3c2 0xba .debug_str 0x47c 0x47c 0xf8 .debug_pubtypes 0x0 0x0 0xed .debug_pubtypes 0xed 0xed 0x1f .debug_pubtypes 0x10c 0x10c 0x1f .debug_pubtypes 0x12b 0x12b 0x1b .debug_pubtypes 0x146 0x146 0x32 .debug_pubtypes 0x178 0x178 0x50 .debug_pubtypes 0x1c8 0x1c8 0x23 .debug_pubtypes 0x1eb 0x1eb 0x1d .intvecs 0x0 0x0 0x144 .text 0x144 0x144 0x440 .const 0x0 0x0 .cinit 0x0 0x0 .pinit 0x0 0x0 .flashMailbox 0x0 0x0 .vtable 0x0 0x0 .sysmem 0x0 0x0 .stack 0x20010000 0x0 .TI.noinit 0x0 0x0 .bss 0x0 0x0 BSS_GROUP 0x0 0x0 .TI.persistent 0x20000000 0x0 .data 0x20000000 0x20000000 0x14 DATA_GROUP 0x20000000 0x20000000 0x14 .debug_info 0x0 0x0 0x34c4 .debug_line 0x0 0x0 0xde6 .debug_abbrev 0x0 0x0 0x977 .debug_aranges 0x0 0x0 0x340 .debug_pubnames 0x0 0x0 0x6cc .debug_frame 0x0 0x0 0x76e .debug_str 0x0 0x0 0x574 .debug_pubtypes 0x0 0x0 0x208 SEGMENT_0 0x0 0x0 0x584 0x5 SEGMENT_1 0x20000000 0x20000000 0x14 0x6 MAIN 0x0 0x0 0x40000 0x584 0x3fa7c RX 0x0 0x144 0x144 0x440 0x584 0x3fa7c INFO 0x0 0x200000 0x4000 0x0 0x4000 RX SRAM_CODE 0x0 0x1000000 0x10000 0x0 0x10000 RWX SRAM_DATA 0x0 0x20000000 0x10000 0x14 0xffec RW 0x20000000 0x14 0x20000014 0xffec 0x20010000 0x0 WDTCTL_SYM 0x4000480c binit 0xffffffff __binit__ 0xffffffff __STACK_SIZE 0x0 __STACK_END 0x20010000 __c_args__ 0xffffffff __TI_static_base__ 0x0 Switch_Init 0x249 Board_Init 0x287 Switch_Input 0x27b Board_Input 0x2c5 main 0x17d T32_INT2_IRQHandler 0x3c5 PendSV_Handler 0x38d SysTick_Handler 0x38f EUSCIA3_IRQHandler 0x3b7 SVC_Handler 0x389 EUSCIB1_IRQHandler 0x3bb PORT4_IRQHandler 0x3dd AES256_IRQHandler 0x3c9 FPU_IRQHandler 0x399 EUSCIB2_IRQHandler 0x3bd PORT1_IRQHandler 0x3d7 RTC_C_IRQHandler 0x3cb TA2_0_IRQHandler 0x3a9 TA3_N_IRQHandler 0x3af DMA_INT3_IRQHandler 0x3cf PORT2_IRQHandler 0x3d9 StartCritical 0x3ef TA0_0_IRQHandler 0x3a1 PSS_IRQHandler 0x391 TA1_N_IRQHandler 0x3a7 EUSCIA1_IRQHandler 0x3b3 EUSCIA2_IRQHandler 0x3b5 COMP_E0_IRQHandler 0x39d WDT_A_IRQHandler 0x397 EUSCIB0_IRQHandler 0x3b9 FLCTL_IRQHandler 0x39b EndCritical 0x3f9 DMA_INT1_IRQHandler 0x3d3 PCM_IRQHandler 0x395 ADC14_IRQHandler 0x3c1 T32_INTC_IRQHandler 0x3c7 DMA_INT2_IRQHandler 0x3d1 TA3_0_IRQHandler 0x3ad EUSCIA0_IRQHandler 0x3b1 DMA_ERR_IRQHandler 0x3cd DisableInterrupts 0x3e3 PORT5_IRQHandler 0x3df TA1_0_IRQHandler 0x3a5 TA2_N_IRQHandler 0x3ab COMP_E1_IRQHandler 0x39f EUSCIB3_IRQHandler 0x3bf WaitForInterrupt 0x401 interruptVectors 0x0 EnableInterrupts 0x3e9 PORT6_IRQHandler 0x3e1 TA0_N_IRQHandler 0x3a3 T32_INT1_IRQHandler 0x3c3 DebugMon_Handler 0x38b DMA_INT0_IRQHandler 0x3d5 PORT3_IRQHandler 0x3db CS_IRQHandler 0x393 _c_int00 0x475 __stack 0x20010000 C$$EXIT 0x511 abort 0x515 exit 0x51d __TI_dtors_ptr 0x2000000c __TI_cleanup_ptr 0x20000008 _system_pre_init 0x581 main_func_sp 0x20000010 _nop 0x57b _lock 0x20000000 _unlock 0x20000004 _register_lock 0x573 _register_unlock 0x56d _args_main 0x555 __TI_auto_init 0x409 copy_in 0x4c5 memcpy 0x2d1 __aeabi_memcpy 0x2d1 __aeabi_memcpy8 0x2d1 __aeabi_memcpy4 0x2d1 __TI_Handler_Table_Base 0x0 __TI_Handler_Table_Limit 0x0 __TI_CINIT_Limit 0x0 __TI_CINIT_Base 0x0 SHT$$INIT_ARRAY$$Limit 0x0 SHT$$INIT_ARRAY$$Base 0x0 Link successful

Switch_MSP432asm/Debug/ccsObjs.opt

"./Switch.obj" "./SwitchTestMain.obj" "./msp432_startup_ccs.obj" "../msp432p401r.cmd" -l"libc.a"

Switch_MSP432asm/Debug/makefile

################################################################################ # Automatically-generated file. Do not edit! ################################################################################ SHELL = cmd.exe CG_TOOL_ROOT := C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7 GEN_OPTS__FLAG := GEN_CMDS__FLAG := ORDERED_OBJS += \ "./Switch.obj" \ "./SwitchTestMain.obj" \ "./msp432_startup_ccs.obj" \ "../msp432p401r.cmd" \ $(GEN_CMDS__FLAG) \ -l"libc.a" \ -include ../makefile.init RM := DEL /F RMDIR := RMDIR /S/Q # All of the sources participating in the build are defined here -include sources.mk -include subdir_vars.mk -include subdir_rules.mk -include objects.mk ifneq ($(MAKECMDGOALS),clean) ifneq ($(strip $(S_DEPS)),) -include $(S_DEPS) endif ifneq ($(strip $(S_UPPER_DEPS)),) -include $(S_UPPER_DEPS) endif ifneq ($(strip $(S62_DEPS)),) -include $(S62_DEPS) endif ifneq ($(strip $(C64_DEPS)),) -include $(C64_DEPS) endif ifneq ($(strip $(ASM_DEPS)),) -include $(ASM_DEPS) endif ifneq ($(strip $(CC_DEPS)),) -include $(CC_DEPS) endif ifneq ($(strip $(S55_DEPS)),) -include $(S55_DEPS) endif ifneq ($(strip $(C67_DEPS)),) -include $(C67_DEPS) endif ifneq ($(strip $(CLA_DEPS)),) -include $(CLA_DEPS) endif ifneq ($(strip $(C??_DEPS)),) -include $(C??_DEPS) endif ifneq ($(strip $(CPP_DEPS)),) -include $(CPP_DEPS) endif ifneq ($(strip $(S??_DEPS)),) -include $(S??_DEPS) endif ifneq ($(strip $(C_DEPS)),) -include $(C_DEPS) endif ifneq ($(strip $(C62_DEPS)),) -include $(C62_DEPS) endif ifneq ($(strip $(CXX_DEPS)),) -include $(CXX_DEPS) endif ifneq ($(strip $(C++_DEPS)),) -include $(C++_DEPS) endif ifneq ($(strip $(ASM_UPPER_DEPS)),) -include $(ASM_UPPER_DEPS) endif ifneq ($(strip $(K_DEPS)),) -include $(K_DEPS) endif ifneq ($(strip $(C43_DEPS)),) -include $(C43_DEPS) endif ifneq ($(strip $(INO_DEPS)),) -include $(INO_DEPS) endif ifneq ($(strip $(S67_DEPS)),) -include $(S67_DEPS) endif ifneq ($(strip $(SA_DEPS)),) -include $(SA_DEPS) endif ifneq ($(strip $(S43_DEPS)),) -include $(S43_DEPS) endif ifneq ($(strip $(OPT_DEPS)),) -include $(OPT_DEPS) endif ifneq ($(strip $(PDE_DEPS)),) -include $(PDE_DEPS) endif ifneq ($(strip $(S64_DEPS)),) -include $(S64_DEPS) endif ifneq ($(strip $(C_UPPER_DEPS)),) -include $(C_UPPER_DEPS) endif ifneq ($(strip $(C55_DEPS)),) -include $(C55_DEPS) endif endif -include ../makefile.defs # Add inputs and outputs from these tool invocations to the build variables EXE_OUTPUTS += \ Switch_MSP432asm.out \ EXE_OUTPUTS__QUOTED += \ "Switch_MSP432asm.out" \ BIN_OUTPUTS += \ Switch_MSP432asm.hex \ BIN_OUTPUTS__QUOTED += \ "Switch_MSP432asm.hex" \ # All Target all: Switch_MSP432asm.out # Tool invocations Switch_MSP432asm.out: $(OBJS) $(CMD_SRCS) $(GEN_CMDS) @echo 'Building target: $@' @echo 'Invoking: MSP432 Linker' "C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/bin/armcl" -mv7M4 --code_state=16 --float_support=FPv4SPD16 --abi=eabi -me --advice:power=all -g --gcc --define=__MSP432P401R__ --define=TARGET_IS_MSP432P4XX --define=ccs --diag_wrap=off --display_error_number --diag_warning=225 -z -m"Switch_MSP432asm.map" --heap_size=0 --stack_size=0 --cinit_hold_wdt=off -i"C:/ti/ccsv6/ccs_base/arm/include" -i"C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/lib" -i"C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/include" --reread_libs --display_error_number --diag_wrap=off --warn_sections --xml_link_info="Switch_MSP432asm_linkInfo.xml" -o "Switch_MSP432asm.out" $(ORDERED_OBJS) @echo 'Finished building target: $@' @echo ' ' Switch_MSP432asm.hex: $(EXE_OUTPUTS) @echo 'Invoking: MSP432 Hex Utility' "C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/bin/armhex" -o "Switch_MSP432asm.hex" $(EXE_OUTPUTS__QUOTED) @echo 'Finished building: $@' @echo ' ' # Other Targets clean: -$(RM) $(EXE_OUTPUTS__QUOTED)$(BIN_OUTPUTS__QUOTED) -$(RM) "msp432_startup_ccs.pp" -$(RM) "Switch.obj" "SwitchTestMain.obj" "msp432_startup_ccs.obj" -$(RM) "Switch.pp" "SwitchTestMain.pp" -@echo 'Finished clean' -@echo ' ' .PHONY: all clean dependents .SECONDARY: -include ../makefile.targets

Switch_MSP432asm/Debug/objects.mk

################################################################################ # Automatically-generated file. Do not edit! ################################################################################ USER_OBJS := LIBS := -l"libc.a"

Switch_MSP432asm/Debug/sources.mk

################################################################################ # Automatically-generated file. Do not edit! ################################################################################ O_SRCS := CPP_SRCS := K_SRCS := LD_SRCS := S67_SRCS := LDS_SRCS := CMD_SRCS := EXE_SRCS := CXX_SRCS := CMD_UPPER_SRCS := ELF_SRCS := C43_SRCS := S55_SRCS := LD_UPPER_SRCS := C62_SRCS := S_UPPER_SRCS := A_SRCS := SA_SRCS := C55_SRCS := LDS_UPPER_SRCS := C_UPPER_SRCS := OUT_SRCS := INO_SRCS := OBJ_SRCS := S62_SRCS := LIB_SRCS := PDE_SRCS := ASM_SRCS := ASM_UPPER_SRCS := C++_SRCS := CLA_SRCS := S??_SRCS := C_SRCS := C67_SRCS := S_SRCS := S43_SRCS := OPT_SRCS := C64_SRCS := CC_SRCS := C??_SRCS := S64_SRCS := OBJS := BIN_OUTPUTS := S_DEPS := S_UPPER_DEPS := S62_DEPS := C64_DEPS := ASM_DEPS := CC_DEPS := S55_DEPS := C67_DEPS := CLA_DEPS := C??_DEPS := CPP_DEPS := S??_DEPS := C_DEPS := C62_DEPS := EXE_OUTPUTS := CXX_DEPS := C++_DEPS := ASM_UPPER_DEPS := K_DEPS := C43_DEPS := INO_DEPS := S67_DEPS := SA_DEPS := S43_DEPS := OPT_DEPS := PDE_DEPS := S64_DEPS := C_UPPER_DEPS := C55_DEPS := CPP_DEPS__QUOTED := C67_DEPS__QUOTED := INO_DEPS__QUOTED := C??_DEPS__QUOTED := S_UPPER_DEPS__QUOTED := CLA_DEPS__QUOTED := ASM_UPPER_DEPS__QUOTED := C62_DEPS__QUOTED := CXX_DEPS__QUOTED := EXE_OUTPUTS__QUOTED := S67_DEPS__QUOTED := BIN_OUTPUTS__QUOTED := C_DEPS__QUOTED := C_UPPER_DEPS__QUOTED := OPT_DEPS__QUOTED := S_DEPS__QUOTED := K_DEPS__QUOTED := S??_DEPS__QUOTED := C64_DEPS__QUOTED := C++_DEPS__QUOTED := OBJS__QUOTED := CC_DEPS__QUOTED := S43_DEPS__QUOTED := S55_DEPS__QUOTED := SA_DEPS__QUOTED := C55_DEPS__QUOTED := PDE_DEPS__QUOTED := C43_DEPS__QUOTED := S62_DEPS__QUOTED := ASM_DEPS__QUOTED := S64_DEPS__QUOTED := # Every subdirectory with source files must be described here SUBDIRS := \ . \

Switch_MSP432asm/Debug/subdir_rules.mk

################################################################################ # Automatically-generated file. Do not edit! ################################################################################ # Each subdirectory must supply rules for building sources it contributes Switch.obj: ../Switch.asm $(GEN_OPTS) $(GEN_HDRS) @echo 'Building file: $<' @echo 'Invoking: MSP432 Compiler' "C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/bin/armcl" -mv7M4 --code_state=16 --float_support=FPv4SPD16 --abi=eabi -me --include_path="C:/ti/ccsv6/ccs_base/arm/include" --include_path="C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/include" --include_path="C:/ti/ccsv6/ccs_base/arm/include/CMSIS" --advice:power=all -g --gcc --define=__MSP432P401R__ --define=TARGET_IS_MSP432P4XX --define=ccs --diag_wrap=off --display_error_number --diag_warning=225 --preproc_with_compile --preproc_dependency="Switch.pp" $(GEN_OPTS__FLAG) "$<" @echo 'Finished building: $<' @echo ' ' SwitchTestMain.obj: ../SwitchTestMain.asm $(GEN_OPTS) $(GEN_HDRS) @echo 'Building file: $<' @echo 'Invoking: MSP432 Compiler' "C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/bin/armcl" -mv7M4 --code_state=16 --float_support=FPv4SPD16 --abi=eabi -me --include_path="C:/ti/ccsv6/ccs_base/arm/include" --include_path="C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/include" --include_path="C:/ti/ccsv6/ccs_base/arm/include/CMSIS" --advice:power=all -g --gcc --define=__MSP432P401R__ --define=TARGET_IS_MSP432P4XX --define=ccs --diag_wrap=off --display_error_number --diag_warning=225 --preproc_with_compile --preproc_dependency="SwitchTestMain.pp" $(GEN_OPTS__FLAG) "$<" @echo 'Finished building: $<' @echo ' ' msp432_startup_ccs.obj: ../msp432_startup_ccs.c $(GEN_OPTS) $(GEN_HDRS) @echo 'Building file: $<' @echo 'Invoking: MSP432 Compiler' "C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/bin/armcl" -mv7M4 --code_state=16 --float_support=FPv4SPD16 --abi=eabi -me --include_path="C:/ti/ccsv6/ccs_base/arm/include" --include_path="C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/include" --include_path="C:/ti/ccsv6/ccs_base/arm/include/CMSIS" --advice:power=all -g --gcc --define=__MSP432P401R__ --define=TARGET_IS_MSP432P4XX --define=ccs --diag_wrap=off --display_error_number --diag_warning=225 --preproc_with_compile --preproc_dependency="msp432_startup_ccs.pp" $(GEN_OPTS__FLAG) "$<" @echo 'Finished building: $<' @echo ' '

Switch_MSP432asm/Debug/subdir_vars.mk

################################################################################ # Automatically-generated file. Do not edit! ################################################################################ # Add inputs and outputs from these tool invocations to the build variables CMD_SRCS += \ ../msp432p401r.cmd ASM_SRCS += \ ../Switch.asm \ ../SwitchTestMain.asm C_SRCS += \ ../msp432_startup_ccs.c OBJS += \ ./Switch.obj \ ./SwitchTestMain.obj \ ./msp432_startup_ccs.obj ASM_DEPS += \ ./Switch.pp \ ./SwitchTestMain.pp C_DEPS += \ ./msp432_startup_ccs.pp C_DEPS__QUOTED += \ "msp432_startup_ccs.pp" OBJS__QUOTED += \ "Switch.obj" \ "SwitchTestMain.obj" \ "msp432_startup_ccs.obj" ASM_DEPS__QUOTED += \ "Switch.pp" \ "SwitchTestMain.pp" ASM_SRCS__QUOTED += \ "../Switch.asm" \ "../SwitchTestMain.asm" C_SRCS__QUOTED += \ "../msp432_startup_ccs.c"

Switch_MSP432asm/Switch.asm

; Switch.asm ; Runs on MSP432 ; Provide functions that initialize a GPIO as an input pin and ; allow reading of two negative logic switches on P1.1 and P1.4 ; and an external switch on P1.5. ; Daniel and Jonathan Valvano ; April 22, 2015 ; This example accompanies the book ; "Embedded Systems: Introduction to the MSP432 Microcontroller", ; ISBN: 978-1512185676, Jonathan Valvano, copyright (c) 2015 ; Section 4.2.2, Program 4.2, Figure 4.7 ;Copyright 2015 by Jonathan W. Valvano, [email protected] ; You may use, edit, run or distribute this file ; as long as the above copyright notice remains ;THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED ;OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF ;MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ;VALVANO SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, ;OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. ;For more information about my classes, my research, and my books, see ;http://users.ece.utexas.edu/~valvano/ ; built-in LED1 connected to P1.0 ; negative logic built-in Button 1 connected to P1.1 ; negative logic built-in Button 2 connected to P1.4 ; positive logic switch connected to P1.5 ; built-in red LED connected to P2.0 ; built-in green LED connected to P2.1 ; built-in blue LED connected to P2.2 .thumb .text .align 2 P1IN .field 0x40004C00,32 ; Port 1 Input P1OUT .field 0x40004C02,32 ; Port 1 Output P1DIR .field 0x40004C04,32 ; Port 1 Direction P1REN .field 0x40004C06,32 ; Port 1 Resistor Enable P1SEL0 .field 0x40004C0A,32 ; Port 1 Select 0 P1SEL1 .field 0x40004C0C,32 ; Port 1 Select 1 SW1 .equ 0x02 ; on the left side of the LaunchPad board SW2 .equ 0x10 ; on the right side of the LaunchPad board SWEXT .equ 0x20 ; external switch .global Switch_Init .global Switch_Input .global Board_Init .global Board_Input ;------------Switch_Init------------ ; Initialize GPIO Port 1 bit 5 for input. An external pull-down ; resistor is used. ; Input: none ; Output: none ; Modifies: R0, R1 Switch_Init: .asmfunc ; configure P1.5 as GPIO LDR R1, P1SEL0 LDRB R0, [R1] BIC R0, R0, #0x20 ; configure P1.5 as GPIO STRB R0, [R1] LDR R1, P1SEL1 LDRB R0, [R1] BIC R0, R0, #0x20 ; configure P1.5 as GPIO STRB R0, [R1] ; make P1.5 in LDR R1, P1DIR LDRB R0, [R1] BIC R0, R0, #0x20 ; input direction STRB R0, [R1] ; disable pull resistor on P1.5 LDR R1, P1REN LDRB R0, [R1] BIC R0, R0, #0x20 ; disable pull resistor STRB R0, [R1] BX LR .endasmfunc ;------------Switch_Input------------ ; Read and return the status of GPIO Port 1 bit 5. ; Input: none ; Output: R0 0x20 if P1.5 high ; R0 0x00 if P1.5 low ; Modifies: R1 Switch_Input: .asmfunc LDR R1, P1IN LDRB R0, [R1] ; 8-bit contents of register AND R0, R0, #0x20 ; get just P1.5 BX LR ; return 0x20 or 0x00 .endasmfunc ;------------Board_Init------------ ; Initialize GPIO Port 1 for negative logic switches on P1.1 and ; P1.4 as the LaunchPad is wired. Weak internal pull-up ; resistors are enabled. ; Input: none ; Output: none ; Modifies: R0, R1 Board_Init: .asmfunc ; configure P1.4 and P1.1 as GPIO LDR R1, P1SEL0 LDRB R0, [R1] BIC R0, R0, #0x12 ; configure P1.4 and P1.1 as GPIO STRB R0, [R1] LDR R1, P1SEL1 LDRB R0, [R1] BIC R0, R0, #0x12 ; configure P1.4 and P1.1 as GPIO STRB R0, [R1] ; make P1.4 and P1.1 in LDR R1, P1DIR LDRB R0, [R1] BIC R0, R0, #0x12 ; input direction STRB R0, [R1] ; enable pull resistors on P1.4 and P1.1 LDR R1, P1REN LDRB R0, [R1] ORR R0, R0, #0x12 ; enable pull resistors STRB R0, [R1] ; P1.4 and P1.1 are pull-up LDR R1, P1OUT LDRB R0, [R1] ORR R0, R0, #0x12 ; pull-up resistors STRB R0, [R1] BX LR .endasmfunc ;------------Board_Input------------ ; Read and return the status of the switches. ; Input: none ; Output: 0x10 if only Switch 1 is pressed ; 0x02 if only Switch 2 is pressed ; 0x00 if both switches are pressed ; 0x12 if no switches are pressed ; Modifies: R1 Board_Input: .asmfunc LDR R1, P1IN LDRB R0, [R1] ; 8-bit contents of register AND R0, R0, #0x12 ; get just input pins P1.4 and P1.1 BX LR .endasmfunc .end

Switch_MSP432asm/main.asm

; SwitchTestMain.asm ; Runs on MSP432 ; Test the switch initialization functions by setting the LED ; color according to the status of the switches. ; Daniel and Jonathan Valvano ; July 2, 2015 ; This example accompanies the book ; "Embedded Systems: Introduction to the MSP432 Microcontroller", ; ISBN: 978-1512185676, Jonathan Valvano, copyright (c) 2015 ; Section 4.2.2, Program 4.2, Figure 4.9 ;Copyright 2015 by Jonathan W. Valvano, [email protected] ; You may use, edit, run or distribute this file ; as long as the above copyright notice remains ;THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED ;OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF ;MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ;VALVANO SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, ;OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. ;For more information about my classes, my research, and my books, see ;http://users.ece.utexas.edu/~valvano/ ; built-in LED1 connected to P1.0 ; negative logic built-in Button 1 connected to P1.1 ; negative logic built-in Button 2 connected to P1.4 ; positive logic switch connected to P1.5 ; built-in red LED connected to P2.0 ; built-in green LED connected to P2.1 ; built-in blue LED connected to P2.2 .thumb .text .align 2 P1IN .field 0x40004C00,32 ; Port 1 Input P2IN .field 0x40004C01,32 ; Port 2 Input P2OUT .field 0x40004C03,32 ; Port 2 Output P1OUT .field 0x40004C02,32 ; Port 1 Output P1DIR .field 0x40004C04,32 ; Port 1 Direction P2DIR .field 0x40004C05,32 ; Port 2 Direction P1REN .field 0x40004C06,32 ; Port 1 Resistor Enable P2REN .field 0x40004C07,32 ; Port 2 Resistor Enable P1DS .field 0x40004C08,32 ; Port 1 Drive Strength P2DS .field 0x40004C09,32 ; Port 2 Drive Strength P1SEL0 .field 0x40004C0A,32 ; Port 1 Select 0 P2SEL0 .field 0x40004C0B,32 ; Port 2 Select 0 P1SEL1 .field 0x40004C0C,32 ; Port 1 Select 1 P2SEL1 .field 0x40004C0D,32 ; Port 2 Select 1 SW1 .equ 0x02 ; on the left side of the LaunchPad board SW2 .equ 0x10 ; on the right side of the LaunchPad board SWEXT .equ 0x20 ; external switch RED .equ 0x01 GREEN .equ 0x02 BLUE .equ 0x04 LED1 .equ 0x01 .global main .global Switch_Init .global Switch_Input .global Board_Init .global Board_Input .thumbfunc main main: .asmfunc BL Switch_Init ; P1.5 is input BL Board_Init ; initialize P1.1 and P1.4 and make them inputs (P1.1 and P1.4 built-in buttons) ; initialize P2.2-P2.0 and make them outputs (P2.2-P2.0 built-in RGB LEDs) ; configure built-in RGB LEDs as GPIO LDR R1, P2SEL0 LDRB R0, [R1] BIC R0, R0, #(RED+GREEN+BLUE) ; configure built-in RGB LEDs as GPIO STRB R0, [R1] LDR R1, P2SEL1 LDRB R0, [R1] BIC R0, R0, #(RED+GREEN+BLUE) ; configure built-in RGB LEDs as GPIO STRB R0, [R1] ; make built-in RGB LEDs high drive strength LDR R1, P2DS LDRB R0, [R1] ORR R0, R0, #(RED+GREEN+BLUE) ; high drive strength STRB R0, [R1] ; make built-in RGB LEDs out LDR R1, P2DIR LDRB R0, [R1] ORR R0, R0, #(RED+GREEN+BLUE) ; output direction STRB R0, [R1] ; initialize P1.0 and make it output (P1.0 built-in LED1) ; configure built-in LED1 as GPIO LDR R1, P1SEL0 LDRB R0, [R1] BIC R0, R0, #LED1 ; configure built-in LED1 as GPIO STRB R0, [R1] LDR R1, P1SEL1 LDRB R0, [R1] BIC R0, R0, #LED1 ; configure built-in LED1 as GPIO STRB R0, [R1] ; make built-in LED1 out LDR R1, P1DIR LDRB R0, [R1] ORR R0, R0, #LED1 ; output direction STRB R0, [R1] LDR R4, P1OUT ; R4 = &P1OUT (pointer) LDR R5, P2OUT ; R5 = &P2OUT (pointer) loop LDRB R6, [R5] ; 8-bit contents of register P2OUT BIC R6, R6, #(RED+GREEN+BLUE) ; turn off RGB LEDs BL Board_Input CMP R0, #0x10 ; R0 == 0x10? BEQ sw1pressed ; if so, switch 1 pressed CMP R0, #0x02 ; R0 == 0x02? BEQ sw2pressed ; if so, switch 2 pressed CMP R0, #0x00 ; R0 == 0x00? BEQ bothpressed ; if so, both switches pressed CMP R0, #0x12 ; R0 == 0x12? BEQ nopressed ; if so, neither switch pressed ; if none of the above, unexpected return value ORR R6, R6, #(RED+GREEN+BLUE) ; all LEDs on B continue sw1pressed ORR R6, R6, #BLUE ; R6 = R6|BLUE (blue LED on) B continue sw2pressed ORR R6, R6, #RED ; R6 = R6|RED (red LED on) B continue bothpressed ORR R6, R6, #GREEN ; R6 = R6|GREEN (green LED on) B continue nopressed ; (no LEDs on) continue STRB R6, [R5] ; store R6 into 8-bit P2OUT BL Switch_Input ; status = R0 = 0x00 or 0x20 LSR R0, R0, #5 ; R0 = R0>>5 = status>>5 (shift status of P1.5 into bit P1.0) AND R0, R0, #LED1 ; R0 = R0&LED1 = (status>>5)&LED1 (clear any extraneous bits) LDRB R6, [R4] ; R6 = [R4] = 8-bit contents of register P1OUT BIC R6, R6, #LED1 ; R6 = R6&~LED1 = P1OUT&~LED1 (turn off LED1) ORR R6, R6, R0 ; R6 = R6|R0 = (P1OUT&LED1)|((status>>5)&LED1) STRB R6, [R4] ; [R4] = R6 (store R6 into 8-bit P1OUT) B loop .endasmfunc .end

Switch_MSP432asm/msp432_startup_ccs.c

//***************************************************************************** // // Copyright (C) 2012 - 2014 Texas Instruments Incorporated - http://www.ti.com/ // // Redistribution and use in source and binary forms, with or without // modification, are permitted provided that the following conditions // are met: // // Redistributions of source code must retain the above copyright // notice, this list of conditions and the following disclaimer. // // Redistributions in binary form must reproduce the above copyright // notice, this list of conditions and the following disclaimer in the // documentation and/or other materials provided with the // distribution. // // Neither the name of Texas Instruments Incorporated nor the names of // its contributors may be used to endorse or promote products derived // from this software without specific prior written permission. // // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. // // MSP432 Family Interrupt Vector Table for CGT // //**************************************************************************** #include <stdint.h> /* Forward declaration of the default fault handlers. */ static void resetISR(void); static void nmiISR(void); static void faultISR(void); static void defaultISR(void); //Weak Function Deffinitions, can be written / declared in other files extern void SVC_Handler(void) __attribute__((weak)); /* SVCall handler */ extern void DebugMon_Handler(void) __attribute__((weak)); /* Debug monitor handler */ extern void PendSV_Handler(void) __attribute__((weak)); /* The PendSV handler */ extern void SysTick_Handler(void) __attribute__((weak)); /* The SysTick handler */ extern void PSS_IRQHandler(void) __attribute__((weak)); /* PSS ISR */ extern void CS_IRQHandler(void) __attribute__((weak)); /* CS ISR */ extern void PCM_IRQHandler(void) __attribute__((weak)); /* PCM ISR */ extern void WDT_A_IRQHandler(void) __attribute__((weak)); /* WDT ISR */ extern void FPU_IRQHandler(void) __attribute__((weak)); /* FPU ISR */ extern void FLCTL_IRQHandler(void) __attribute__((weak)); /* FLCTL ISR */ extern void COMP_E0_IRQHandler(void) __attribute__((weak)); /* COMP0 ISR */ extern void COMP_E1_IRQHandler(void) __attribute__((weak)); /* COMP1 ISR */ extern void TA0_0_IRQHandler(void) __attribute__((weak)); /* TA0_0 ISR */ extern void TA0_N_IRQHandler(void) __attribute__((weak)); /* TA0_N ISR */ extern void TA1_0_IRQHandler(void) __attribute__((weak)); /* TA1_0 ISR */ extern void TA1_N_IRQHandler(void) __attribute__((weak)); /* TA1_N ISR */ extern void TA2_0_IRQHandler(void) __attribute__((weak)); /* TA2_0 ISR */ extern void TA2_N_IRQHandler(void) __attribute__((weak)); /* TA2_N ISR */ extern void TA3_0_IRQHandler(void) __attribute__((weak)); /* TA3_0 ISR */ extern void TA3_N_IRQHandler(void) __attribute__((weak)); /* TA3_N ISR */ extern void EUSCIA0_IRQHandler(void) __attribute__((weak)); /* EUSCIA0 ISR */ extern void EUSCIA1_IRQHandler(void) __attribute__((weak)); /* EUSCIA1 ISR */ extern void EUSCIA2_IRQHandler(void) __attribute__((weak)); /* EUSCIA2 ISR */ extern void EUSCIA3_IRQHandler(void) __attribute__((weak)); /* EUSCIA3 ISR */ extern void EUSCIB0_IRQHandler(void) __attribute__((weak)); /* EUSCIB0 ISR */ extern void EUSCIB1_IRQHandler(void) __attribute__((weak)); /* EUSCIB1 ISR */ extern void EUSCIB2_IRQHandler(void) __attribute__((weak)); /* EUSCIB2 ISR */ extern void EUSCIB3_IRQHandler(void) __attribute__((weak)); /* EUSCIB3 ISR */ extern void ADC14_IRQHandler(void) __attribute__((weak)); /* ADC14 ISR */ extern void T32_INT1_IRQHandler(void) __attribute__((weak)); /* T32_INT1 ISR */ extern void T32_INT2_IRQHandler(void) __attribute__((weak)); /* T32_INT2 ISR */ extern void T32_INTC_IRQHandler(void) __attribute__((weak)); /* T32_INTC ISR */ extern void AES256_IRQHandler(void) __attribute__((weak)); /* AES ISR */ extern void RTC_C_IRQHandler(void) __attribute__((weak)); /* RTC ISR */ extern void DMA_ERR_IRQHandler(void) __attribute__((weak)); /* DMA_ERR ISR */ extern void DMA_INT3_IRQHandler(void) __attribute__((weak)); /* DMA_INT3 ISR */ extern void DMA_INT2_IRQHandler(void) __attribute__((weak)); /* DMA_INT2 ISR */ extern void DMA_INT1_IRQHandler(void) __attribute__((weak)); /* DMA_INT1 ISR */ extern void DMA_INT0_IRQHandler(void) __attribute__((weak)); /* DMA_INT0 ISR */ extern void PORT1_IRQHandler(void) __attribute__((weak)); /* PORT1 ISR */ extern void PORT2_IRQHandler(void) __attribute__((weak)); /* PORT2 ISR */ extern void PORT3_IRQHandler(void) __attribute__((weak)); /* PORT3 ISR */ extern void PORT4_IRQHandler(void) __attribute__((weak)); /* PORT4 ISR */ extern void PORT5_IRQHandler(void) __attribute__((weak)); /* PORT5 ISR */ extern void PORT6_IRQHandler(void) __attribute__((weak)); /* PORT6 ISR */ /* External declaration for the reset handler that is to be called when the */ /* processor is started */ extern void _c_int00(void); /* Linker variable that marks the top of the stack. */ extern unsigned long __STACK_END; /* External declarations for the interrupt handlers used by the application. */ /* To be added by user */ /* Intrrupt vector table. Note that the proper constructs must be placed on this to */ /* ensure that it ends up at physical address 0x0000.0000 or at the start of */ /* the program if located at a start address other than 0. */ #pragma DATA_SECTION(interruptVectors, ".intvecs") void (* const interruptVectors[])(void) = { (void (*)(void))((uint32_t)&__STACK_END), /* The initial stack pointer */ resetISR, /* The reset handler */ nmiISR, /* The NMI handler */ faultISR, /* The hard fault handler */ defaultISR, /* The MPU fault handler */ defaultISR, /* The bus fault handler */ defaultISR, /* The usage fault handler */ 0, /* Reserved */ 0, /* Reserved */ 0, /* Reserved */ 0, /* Reserved */ SVC_Handler, /* SVCall handler */ DebugMon_Handler, /* Debug monitor handler */ 0, /* Reserved */ PendSV_Handler, /* The PendSV handler */ SysTick_Handler, /* The SysTick handler */ PSS_IRQHandler, /* PSS ISR */ CS_IRQHandler, /* CS ISR */ PCM_IRQHandler, /* PCM ISR */ WDT_A_IRQHandler, /* WDT ISR */ FPU_IRQHandler, /* FPU ISR */ FLCTL_IRQHandler, /* FLCTL ISR */ COMP_E0_IRQHandler, /* COMP0 ISR */ COMP_E1_IRQHandler, /* COMP1 ISR */ TA0_0_IRQHandler, /* TA0_0 ISR */ TA0_N_IRQHandler, /* TA0_N ISR */ TA1_0_IRQHandler, /* TA1_0 ISR */ TA1_N_IRQHandler, /* TA1_N ISR */ TA2_0_IRQHandler, /* TA2_0 ISR */ TA2_N_IRQHandler, /* TA2_N ISR */ TA3_0_IRQHandler, /* TA3_0 ISR */ TA3_N_IRQHandler, /* TA3_N ISR */ EUSCIA0_IRQHandler, /* EUSCIA0 ISR */ EUSCIA1_IRQHandler, /* EUSCIA1 ISR */ EUSCIA2_IRQHandler, /* EUSCIA2 ISR */ EUSCIA3_IRQHandler, /* EUSCIA3 ISR */ EUSCIB0_IRQHandler, /* EUSCIB0 ISR */ EUSCIB1_IRQHandler, /* EUSCIB1 ISR */ EUSCIB2_IRQHandler, /* EUSCIB2 ISR */ EUSCIB3_IRQHandler, /* EUSCIB3 ISR */ ADC14_IRQHandler, /* ADC14 ISR */ T32_INT1_IRQHandler, /* T32_INT1 ISR */ T32_INT2_IRQHandler, /* T32_INT2 ISR */ T32_INTC_IRQHandler, /* T32_INTC ISR */ AES256_IRQHandler, /* AES ISR */ RTC_C_IRQHandler, /* RTC ISR */ DMA_ERR_IRQHandler, /* DMA_ERR ISR */ DMA_INT3_IRQHandler, /* DMA_INT3 ISR */ DMA_INT2_IRQHandler, /* DMA_INT2 ISR */ DMA_INT1_IRQHandler, /* DMA_INT1 ISR */ DMA_INT0_IRQHandler, /* DMA_INT0 ISR */ PORT1_IRQHandler, /* PORT1 ISR */ PORT2_IRQHandler, /* PORT2 ISR */ PORT3_IRQHandler, /* PORT3 ISR */ PORT4_IRQHandler, /* PORT4 ISR */ PORT5_IRQHandler, /* PORT5 ISR */ PORT6_IRQHandler, /* PORT6 ISR */ defaultISR, /* Reserved 41 */ defaultISR, /* Reserved 42 */ defaultISR, /* Reserved 43 */ defaultISR, /* Reserved 44 */ defaultISR, /* Reserved 45 */ defaultISR, /* Reserved 46 */ defaultISR, /* Reserved 47 */ defaultISR, /* Reserved 48 */ defaultISR, /* Reserved 49 */ defaultISR, /* Reserved 50 */ defaultISR, /* Reserved 51 */ defaultISR, /* Reserved 52 */ defaultISR, /* Reserved 53 */ defaultISR, /* Reserved 54 */ defaultISR, /* Reserved 55 */ defaultISR, /* Reserved 56 */ defaultISR, /* Reserved 57 */ defaultISR, /* Reserved 58 */ defaultISR, /* Reserved 59 */ defaultISR, /* Reserved 60 */ defaultISR, /* Reserved 61 */ defaultISR, /* Reserved 62 */ defaultISR, /* Reserved 63 */ defaultISR /* Reserved 64 */ }; /* This is the code that gets called when the processor first starts execution */ /* following a reset event. Only the absolutely necessary set is performed, */ /* after which the application supplied entry() routine is called. Any fancy */ /* actions (such as making decisions based on the reset cause register, and */ /* resetting the bits in that register) are left solely in the hands of the */ /* application. */ void resetISR(void) { /* Jump to the CCS C Initialization Routine. */ __asm(" .global _c_int00\n" " LDR R0,WDT\n" " LDR R1,HOLD\n" " STRH R1,[R0]\n" // turn off watchdog " b.w _c_int00\n" "WDT .field 0x4000480C,32\n" // pointer to 16-bit register "HOLD .field 0x00005A80,32"); // WDTPW | WDTHOLD } /* This is the code that gets called when the processor receives a NMI. This */ /* simply enters an infinite loop, preserving the system state for examination */ /* by a debugger. */ static void nmiISR(void) { /* Fault trap exempt from ULP advisor */ #pragma diag_push #pragma CHECK_ULP("-2.1") /* Enter an infinite loop. */ while(1) { } #pragma diag_pop } /* This is the code that gets called when the processor receives a fault */ /* interrupt. This simply enters an infinite loop, preserving the system state */ /* for examination by a debugger. */ static void faultISR(void) { /* Fault trap exempt from ULP advisor */ #pragma diag_push #pragma CHECK_ULP("-2.1") /* Enter an infinite loop. */ while(1) { } #pragma diag_pop } /* This is the code that gets called when the processor receives an unexpected */ /* interrupt. This simply enters an infinite loop, preserving the system state */ /* for examination by a debugger. */ static void defaultISR(void) { /* Fault trap exempt from ULP advisor */ #pragma diag_push #pragma CHECK_ULP("-2.1") /* Enter an infinite loop. */ while(1) { } #pragma diag_pop } //These Functions are all weakly defined, so the user can write over them in an external file void SVC_Handler(void){ while(1){}} /* SVCall handler */ void DebugMon_Handler(void){ while(1){}} /* Debug monitor handler */ void PendSV_Handler(void){ while(1){}} void SysTick_Handler(void){ while(1){}} void PSS_IRQHandler(void){ while(1){}} /* PSS ISR */ void CS_IRQHandler(void){ while(1){}} /* CS ISR */ void PCM_IRQHandler(void){ while(1){}} /* PCM ISR */ void WDT_A_IRQHandler(void){ while(1){}} /* WDT ISR */ void FPU_IRQHandler(void){ while(1){}} /* FPU ISR */ void FLCTL_IRQHandler(void){ while(1){}} /* FLCTL ISR */ void COMP_E0_IRQHandler(void){ while(1){}} /* COMP0 ISR */ void COMP_E1_IRQHandler(void){ while(1){}} /* COMP1 ISR */ void TA0_0_IRQHandler(void){ while(1){}} /* TA0_0 ISR */ void TA0_N_IRQHandler(void){ while(1){}} /* TA0_N ISR */ void TA1_0_IRQHandler(void){ while(1){}} /* TA1_0 ISR */ void TA1_N_IRQHandler(void){ while(1){}} /* TA1_N ISR */ void TA2_0_IRQHandler(void){ while(1){}} /* TA2_0 ISR */ void TA2_N_IRQHandler(void){ while(1){}} /* TA2_N ISR */ void TA3_0_IRQHandler(void){ while(1){}} /* TA3_0 ISR */ void TA3_N_IRQHandler(void){ while(1){}} /* TA3_N ISR */ void EUSCIA0_IRQHandler(void){ while(1){}} /* EUSCIA0 ISR */ void EUSCIA1_IRQHandler(void){ while(1){}} /* EUSCIA1 ISR */ void EUSCIA2_IRQHandler(void){ while(1){}} /* EUSCIA2 ISR */ void EUSCIA3_IRQHandler(void){ while(1){}} /* EUSCIA3 ISR */ void EUSCIB0_IRQHandler(void){ while(1){}} /* EUSCIB0 ISR */ void EUSCIB1_IRQHandler(void){ while(1){}} /* EUSCIB1 ISR */ void EUSCIB2_IRQHandler(void){ while(1){}} /* EUSCIB2 ISR */ void EUSCIB3_IRQHandler(void){ while(1){}} /* EUSCIB3 ISR */ void ADC14_IRQHandler(void){ while(1){}} /* ADC14 ISR */ void T32_INT1_IRQHandler(void){ while(1){}} /* T32_INT1 ISR */ void T32_INT2_IRQHandler(void){ while(1){}} /* T32_INT2 ISR */ void T32_INTC_IRQHandler(void){ while(1){}} /* T32_INTC ISR */ void AES256_IRQHandler(void){ while(1){}} /* AES ISR */ void RTC_C_IRQHandler(void){ while(1){}} /* RTC ISR */ void DMA_ERR_IRQHandler(void){ while(1){}} /* DMA_ERR ISR */ void DMA_INT3_IRQHandler(void){ while(1){}} /* DMA_INT3 ISR */ void DMA_INT2_IRQHandler(void){ while(1){}} /* DMA_INT2 ISR */ void DMA_INT1_IRQHandler(void){ while(1){}} /* DMA_INT1 ISR */ void DMA_INT0_IRQHandler(void){ while(1){}} /* DMA_INT0 ISR */ void PORT1_IRQHandler(void){ while(1){}} /* PORT1 ISR */ void PORT2_IRQHandler(void){ while(1){}} /* PORT2 ISR */ void PORT3_IRQHandler(void){ while(1){}} /* PORT3 ISR */ void PORT4_IRQHandler(void){ while(1){}} /* PORT4 ISR */ void PORT5_IRQHandler(void){ while(1){}} /* PORT5 ISR */ void PORT6_IRQHandler(void){ while(1){}} /* PORT6 ISR */ //****************************************************************************** // // Useful functions. // //****************************************************************************** extern void DisableInterrupts(void) ; extern void EnableInterrupts(void) ; extern void StartCritical(void) ; extern void EndCritical(void); extern void WaitForInterrupt (void); //*********** DisableInterrupts *************** // disable interrupts // inputs: none // outputs: none void DisableInterrupts(void){ __asm (" CPSID I\n" " BX LR\n"); } //*********** EnableInterrupts *************** // emable interrupts // inputs: none // outputs: none void EnableInterrupts(void){ __asm (" CPSIE I\n" " BX LR\n"); } //*********** StartCritical ************************ // make a copy of previous I bit, disable interrupts // inputs: none // outputs: previous I bit void StartCritical(void){ __asm (" MRS R0, PRIMASK ; save old status \n" " CPSID I ; mask all (except faults)\n" " BX LR\n"); } //*********** EndCritical ************************ // using the copy of previous I bit, restore I bit to previous value // inputs: previous I bit // outputs: none void EndCritical(void){ __asm (" MSR PRIMASK, R0\n" " BX LR\n"); } //*********** WaitForInterrupt ************************ // go to low power mode while waiting for the next interrupt // inputs: none // outputs: none void WaitForInterrupt(void){ __asm (" WFI\n" " BX LR\n"); }

Switch_MSP432asm/msp432p401r.cmd

/****************************************************************************** * * Copyright (C) 2012 - 2015 Texas Instruments Incorporated - http://www.ti.com/ * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Default linker command file for Texas Instruments MSP432P401R * * File creation date: 2015-01-20 * *****************************************************************************/ --retain=interruptVectors --retain=flashMailbox MEMORY { MAIN (RX) : origin = 0x00000000, length = 0x00040000 INFO (RX) : origin = 0x00200000, length = 0x00004000 SRAM_CODE (RWX): origin = 0x01000000, length = 0x00010000 SRAM_DATA (RW) : origin = 0x20000000, length = 0x00010000 } /* The following command line options are set as part of the CCS project. */ /* If you are building using the command line, or for some reason want to */ /* define them here, you can uncomment and modify these lines as needed. */ /* If you are using CCS for building, it is probably better to make any such */ /* modifications in your CCS project and leave this file alone. */ /* */ /* A heap size of 1024 bytes is recommended when you plan to use printf() */ /* for debug output to the console window. */ /* */ /* --heap_size=1024 */ /* --stack_size=512 */ /* --library=rtsv7M4_T_le_eabi.lib */ /* Section allocation in memory */ SECTIONS { .intvecs: > 0x00000000 .text : > MAIN .const : > MAIN .cinit : > MAIN .pinit : > MAIN .flashMailbox : > 0x00200000 .vtable : > 0x20000000 .data : > SRAM_DATA .bss : > SRAM_DATA .sysmem : > SRAM_DATA .stack : > SRAM_DATA (HIGH) } /* Symbolic definition of the WDTCTL register for RTS */ WDTCTL_SYM = 0x4000480C;

Switch_MSP432asm/targetConfigs/MSP432P401R.ccxml

Switch_MSP432asm/targetConfigs/readme.txt

The 'targetConfigs' folder contains target-configuration (.ccxml) files, automatically generated based on the device and connection settings specified in your project on the Properties > General page. Please note that in automatic target-configuration management, changes to the project's device and/or connection settings will either modify an existing or generate a new target-configuration file. Thus, if you manually edit these auto-generated files, you may need to re-apply your changes. Alternatively, you may create your own target-configuration file for this project and manage it manually. You can always switch back to automatic target-configuration management by checking the "Manage the project's target-configuration automatically" checkbox on the project's Properties > General page.