Computer Science Engineering ( Intel Quartus Prime Lite)

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CSE/EEE 120 Capstone Design Project Spring 2019

Project Summary

A car seat is designed to ensure that a parent does not forget a sleeping child in the back of their

car. There are two sensors in the car seat. The first one is located directly under the child. The

purpose of this sensor is to detect if the seat is being occupied by a child. The other sensor

detects if a fob key is 10 meters away from the seat. If the key is over 10 meters away, the sensor

will give a high reading. If the key is less than 10 meters away, the key will give a low reading.

There are two outputs to this machine. The first is a notification that is sent to the parent if the

child is left in the car, and the second is a cooling system that turns on if the child remains in the

car while the parent is away.

If the child is in the seat and the parent walks away with the fob key, then the circuit will

move into a first violation state and a notification will be sent to the parent. If this same reading

is made on the next clock cycle, then the machine will move into a second violation state and

another notification will be sent. If this happens again the machine will move toward an

emergency state where both the cooling system is turned on and the notification is sent. In this

emergency state, the cooling system will only be turned off if the child is removed from the seat.

However, if a parent approaches a car, within 10 meters, while in the emergency state the

machine will not send a notification, but it will keep the cooling system on.

Assumption: The inputs are clocked every minute.

Be sure to use the debounced pushbuttons for driving the clock input to the flip-flops in

your hardware design.

All information to complete this design may not be specified. Write down and report any

assumptions that you make in your design.

Deliverables

• You are to design TWO finite-state synchronous machines, one being a Moore design and

the other being a Mealy design. Depending on the application you have to decide whether

you have to synchronize the outputs of the Mealy machine or not. You can use D flip

flops or J-K flip flops for your designs. Mixing different types of flip flops with different

trigger edge sensitivity is possible but not recommended. Note that two designs which

differ by only the type of flip flop (e.g., J-K vs. D) or number of states (i.e., changing the

type of FF or inserting more unnecessary states) is not considered conceptually different.

• Second, you will need to upload ONE design on to the Terasic DE10-Lite FPGA board.

You are responsible for picking the pin assignments, but you should be able to

demonstrate that all states are being reached and that all input conditions are properly

handled by the hardware design.

You will need to sign up for a demonstration time slot during your regular lab time at

which you will demonstrate both of your designs in simulation and one design on hardware

to the TA on duty in GWC 273.

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Checklist

• First, you will need to implement and simulate BOTH designs using Quartus.

• You must have your report template completed and bring a paper printout with you

to your in-lab demonstration. You cannot print the report in the GWC 273 lab!

• Your lab report template needs to have your Quartus circuits and timing diagrams

pasted in.

• You have to demonstrate a working timing diagram simulation for BOTH designs

during your in-lab demonstration You may demo this by either (1) opening your file

using the computer in the lab or (2) asking the TA to test your circuit on your laptop.

You must have your design simulation working before asking the TA to test it because

you will be given only one chance to prove that it works. You must also be able to

defend your design; the TA will be asking questions to make sure that your design is

your own original work.

• Upon completion of your simulation demonstration, the TA will apply a grade to the

simulation portion of your report template.

• Second, you will need to be able to upload ONE design on to the Terasic DE10-Lite

FPGA board. You can use any part that you have available, J-K or D flip flops.

• The TA will test your hardware implementation, apply a grade to your hardware

portion and stamp the design pages of your completed report template. You must be able

to explain why your circuit responds the way it does to a given input data stream.

• Your completed report template will be collected by the TA at the conclusion of

your demonstration.

Lab project make-ups will ONLY be allowed with written permission from your instructor.

You may discuss this project with each other; however, you must provide an individual report.

In addition:

(1) You must individually to demonstrate your simulation of both designs AND

(2) You must individually implement one circuit on the FPGA board in order to have your

individual report count.

Grading Policy

The grade will be allocated as follows:

30% Design Simulation With Quartus/Modelsim

• 15% for the design of the first circuit and demonstration.

• 15% for the design of the second circuit and demonstration.

70% Build One Design in the Lab on Hardware and Lab Report

• 30% demonstration of one design on the hardware in the lab.

• 11% for documentation in the report of how the first circuit performs the application.

• 11% for documentation in the report of how the second circuit performs the application.

• 5% for establishing reasonable criteria for picking one design as the “best” design. (The

one design you build in the hardware lab does not need to be the “best” design.)

• 8% for picking a preferred, “best” design.

• 5% for following template guidelines.

2% (Extra Credit) Completed Self-Assessment Worksheet

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Helpful Hints for the Capstone Project Lab

Assumptions

1. The benefit of the assumptions task is for you to tell the grader: "These are the limitations

of the machine that I am going to build".

2. Assumptions list is like a "Users' Manual" of how to operate the machine that you built. It

should be given to the user to let them know the DO's and DONT's.

3. A good designing engineer should take all possible input combinations into consideration

rather than assuming some of them will not happen. Do not assume that an input

combination (for example the input 01) will not happen at any state. All input

combinations need to be taken into consideration while writing your state diagram.

However, if there is some input combination that is meaningless at a particular state, then

mention this in your assumptions and justify it.

4. While filling in the assumptions section, always remember that it is up to you to assume

what you want as long as it will make common sense.

5. We don't want a large list of assumptions. 2-3 assumptions are enough.

6. You don't have to list the assumptions before finishing your design. You might need to

modify it while designing your machine. That is the nature of any design process.

7. Your assumptions for Design 2 could be the same as those for Design 1, but don't have to.

8. Answers to (some) the following questions might be good candidates to be your

assumptions:

a. Does your machine need/use an asynchronous reset?

b. What should the state of the system be before the parent places a child in the seat?

If during previous use of the car that happened a couple of days ago the system

detected a single violation, does the user need to do anything to reset the system?

c. What if the preceding use has put the seat in a "permanent shut down” state?

What should the user do before using the car seat again?

Check List

1. First step is to define the inputs and outputs of your design, as well as the values that each

input and output might take.

2. Make sure you have included your assumptions for your project.

3. Make sure your state diagram is complete: no missing arrows/states/inputs/outputs.

4. Make sure your state diagram is readable: Which value mentioned on the arrow

corresponds to which input.

5. Make sure to use a synchronization flip flop at the output of the Mealy machine. We will

not penalize if you don't have it, but if you test your circuit without it, you need to know

how to verify your circuit is working. It needs some experience.

6. In task 4-5, the clocks of the flip flops need to be connected to a “Pushbutton”. Some

students connect them to a manual switch. If you have a manual switch, don't use it to

feed the clock. Remember that the pushbuttons output a logic one when not pushed

down!

7. If your system has more than one input, which one is what (on your state diagram)? (Also

don't forget to name your input switches in your Quartus files. Graders might consider

your Quartus files not working if you did not label your input switches: CLOCK,

Reset....etc.).

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8. When filling in the column of the output in the Moore transition table, you need to look at

the present state not at the next state because in a Moore state transition table, the output

depends on the present state and not the next state. Thus, if you found your output

changes with the change in the input when you simulate your Moore circuit, then you

have probably missed this fact.

9. Any state diagram should be complete: Each state has to have 2n arrows coming out of it,

where n is the number of inputs to the system. This is the case for both the Mealy and the

Moore machine.

10. Don't forget to connect the PRE' and the CLR' of your chips to the Vcc while you build

your schematic.

11. Do not build the FFs from scratch when simulating your design on Quartus. Use the FFs

built-in already in Quartus. They are found under the “Primitives -> Storage” folder in the

Quartus software.

Tasks 4-3 and 4-4

In Task 4-5 you will be asked to build one of these two designs on hardware, so you need to

choose one of them to build. Which one will you choose? Answering Tasks 4-3 and 4-4 will

answer this question for you. In these tasks you have to think about some criteria upon which you

decide which design to build. These criteria differ from a student to the other. It may include (but

is not limited to):

1- Number of gates

2- Number of chips

3- Number of wires (tedious to count)

4- Your understanding to the machine

5- Is it working?

6- Amount of time needed to build it on Hardware.

You need to give a weight to each criteria based on how important you think this criteria is (for

example: I care about the cost more than I care about the time needed to implement the system,

so I will give criteria 1 more weight than criteria 6). The sum of weights should add up to 100.

Then start dividing this weights among the Moore and the Mealy. So for example my weights

are:

1- 60 ----> (out of the 60, I will assign 40 points for the first design and only 20 for the

second since the second requires more gates).

2- 10 ----> (7 and 3)

3- 0

4- 20----> (5 and 15)

5- 0

6- 10

Then you add the weights for the 1st design and compare them with the sum of the weights for

the 2nd. The design giving you higher aggregate weight wins. Note that you don't have to use all

these criterion (this is why some of them have 0 weights indicating that I don't care about these

criterion). So it's up to you what to choose. Feel free to add more criteria that you care about. The

weights do not have to be numerical, although numerical weights will allow you to arrive at a

quantitative answer. If you want to arrive at a qualitative judgment, you might choose a

weighting system such as ‘very important’, ‘important’, or ‘somewhat important’. Answer these

tasks using a table whenever possible.

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Guidelines

Read the following guidelines to get the most out of this project.

1. DO NOT submit a project other than the one assigned. If you happen to know what

project we assigned to students in previous semesters, DO NOT submit their project. This

is considered an academic integrity violation that will NOT be tolerated.

2. Your design has to be synchronous which means that all clocks of all FFs have to be

connected to a single switch. This switch should not be connected to anything else.

Asynchronous designs will not be accepted.

3. Start ASAP because, unlike previous labs, the project doesn't have step by step procedure.

It comes based on your understanding to the topic of “Design of Moore and Mealy

Machines”.

4. You will need 5-variable K-maps to finish this project completely. Contact your

instructor if you don’t know how to use them.

5. Although we allow and encourage cooperation and discussions, inside or outside the

Piazza discussion board, we will not tolerate copying or sharing answers. Even if there

might be some similarities between your design and the designs of your peers, your

solution has to be written by yourself in your own way of presenting it. Ideas allowing

you to understand the project can be shared, solutions cannot.

6. If you scanned/photo’d your handwriting to include it in your report, make sure the

scanned version is clean and the grader can read it easily.

7. If your design is not working in simulation, make sure to include in your report what the

problem is (i.e. how it is working), and what solutions you advice yourself to do if you

had more time to spend on the project. The same goes for the hardware task. Please note

that there are not many points dedicated to a working simulation as there are points for

your correct explanations and showing how much you understand what you are doing.

The grader will deduct points depending on how much they see you have accomplished in

this project. A working design is not the main goal of the project (although it is

important), a deep understanding of the system is.

8. Make sure you have included two designs in your report. We always ask students NOT to

just add hardware to one of the designs to make it look different. Rather we ask them to

start from scratch and make use of the systematic procedure that we teach them in class to

build the second design.

9. Building one Mealy and one Moore machines yields a conceptually different design. This

is what most of the students do and what we encourage them to do.

10. Although you will implement two designs in Quartus, only implement one design on the

hardware board (Task 4-5)