MIPS Assembly language questions help

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Due Mar 16 at 11:59pm Points 5 Questions 20 Available Mar 15 at 6am - Mar 16 at 11:59pm 1 day Time Limit 45 Minutes Allowed Attempts 2 Requires Respondus LockDown Browser

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Score for this attempt: 1.09 out of 5 Submitted Mar 16 at 6:34pm This attempt took 8 minutes.

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0.13 / 0.25 ptsQuestion 1PartialPartial

What are different addressing mode related to instruction 'addi $t0, $t1, 0x23'?

Immediate addressing

Register addressing

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Base or displacement addressing

PC relative addressing

Pseudo-direct addressing

0.08 / 0.25 ptsQuestion 2PartialPartial

What are different addressing mode related to instruction 'sw $s0, 0x8($s1)'?

Pseudo-direct addressing

PC Relative addressing

Register addressing

Base or displacement addressing

Immediate addressing

0 / 0.25 ptsQuestion 3IncorrectIncorrect

What is the maximum number of instructions can be there between a 'bne' instruction and the instruction where it'll jump to if condition is met?

131071

Consider addressing mode of 'bne' instruction to transfer control to L2. Think what the 'immediate' field signifies for 'bne' or 'beq'.

0 / 0.25 ptsQuestion 4IncorrectIncorrect

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A 32-bit MIPS is executing a 'j 0x3A387F8' when PC contains 0x2A8956B8. The next instruction will be executed from which address? [Answer in 0xNNNNNNNN form with all capital for A-F]

MIPS Green Sheet (https://sjsu.instructure.com/courses/1311483/modules/items/9883508)

0xAE8E1FE0

'j' instruction follows Pseudo-direct addressing. Consult MIPS Green sheet page. Make sure you give answer in 0xNNNNNNNN form with hex digits in upper case if applicable (e.g. 0x3F45678A).

0.06 / 0.25 ptsQuestion 5PartialPartial

An I-type instruction in MIPS may use which of these following addressing mode.

PC relative addressing

Immediate addressing

Register addressing

Base / Displacement addressing

Pseudo-direct addressing

0.08 / 0.25 ptsQuestion 6PartialPartial

Which of the following statements are true.

.ascii stores string in memory and terminate it with NULL character.

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There is an assembler directive to arrange / place floating point values in static data memory.

There is no way in MIPS assembly programming to reserve some static data memory without initialization to a specific value.

Assembler arranges multi-byte data in memory from first available aligned lower address to higher address.

MARS always uses setting '.set noat'

0 / 0.25 ptsQuestion 7IncorrectIncorrect

Which type of instruction is least common in MIPS instruction set?

All of the types are equally common.

I Type

J Type

R Type

0.13 / 0.25 ptsQuestion 8PartialPartial

In the following code which are the global data labels.

.globl var_c main

.extern var_a 8 .data var_b: .word 0x45 var_c: .byte 0x1 .text

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main: lw $t0, var_b lw $t1, var_c add $s0, $t0, $t1 sw $s0, var_a

var_b

var_c

main

var_a

0 / 0.25 ptsQuestion 9

Answer 1:

IncorrectIncorrect

Review the following code snippet.

main: lw $t0, var_b lw $t1, var_c loop: bne $t0, $zero, end add $s0, $s0, $t1 addi $t1, $t1, -2 addi $t0, $t0, -1 j loop end: sw $s0, var_a

Machine code for instruction at label 'loop' is 0x 1204C76

1204C76

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Incorrect !!!

Make sure you understand what is placed in 'Immediate' field. Consult MIPS Green sheet for instruction format and machine code construction.

0 / 0.25 ptsQuestion 10IncorrectIncorrect

What is the most appropriate high level language (C or JAVA or similar) code block the following MIPS assembly code is representing from line 03 to 07?

00 .text 01 main: lw $t0, var_b 02 lw $t1, var_c 03 loop: bne $t0, $zero, end 04 add $s0, $s0, $t1 05 addi $t1, $t1, -2 06 addi $t0, $t0, -1 07 j loop 08 end: sw $s0, var_a 09 10 .data 11 var_b: .word 0x20 12 var_c: .work 0x456A

IF-THEN-ELSE

FOR loop.

DO-WHILE loop

WHILE loop

Incorrect !!!

You need to infer most appropriate high level code block.

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0.19 / 0.25 ptsQuestion 11PartialPartial

Determine instruction type (MIPS basic or Pseudo) for the following instructions.

1. li $t5, 0x2345 [IT1]

2. addi $s0, $s1, -105 [IT2]

3. sw $t0, 0x800($s0) [IT3]

4. addi $t1, $t5, 0x20AB3 [IT4]

li $t5, 0x2345 Pseudo

add $s0, $s1, $s2 MIPS Basic

sw $t0, 0x800($s0) MIPS Basic

addi $t1, $t5, 0x20AB3 MIPS Basic

0 / 0.25 ptsQuestion 12IncorrectIncorrect

Review the following code.

01 .text 0x00408000 02 main: add $s1, $zero, $zero 03 addi $s0, $zero, 1 04 loop: beq $s0, $zero, end 05 addi $v0, $zero, 5 06 syscall 07 add $s0, $v0, $zero 08 add $s1, $s1, $s0 09 j loop 10 end: add $t0, $s0, $s1

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Answer 1:

Machine code for line 9 (j loop) is 0x 12000006

12000006

Incorrect !!!

First determine which address it is jumping to. Review MIPS green sheet on the explanation of jump address and how pseudo-direct addressing works. Also carefully review the code for start address of the first instruction.

0 / 0.25 ptsQuestion 13IncorrectIncorrect

What is the most appropriate high level language (C or java or equivalent) code block that lines 03-06 is implementing? [It uses MACROS that we already have done in programming assignments]

01 .text 02 main: add $s1, $zero, $zero 03 ask: print_str(ask_str) 04 read_int($s0) 05 add $s1, $s1, $s0 06 bne $s0, $zero, ask 07 print_str(prn_str) 08 print_reg_int($s1) 09 print_str(cr) 10 exit

WHILE loop

IF-THEN-ELSE

DO-WHILE loop

FOR loop

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Incorrect !!!

Try to infer functionality of the code and write high level equivalent code.

0 / 0.25 ptsQuestion 14IncorrectIncorrect

What type of code block you can observe in the following MIPS code snippet?

main: lw $s0, var_a lw $s1, var_b bgt $s0, $s1, L1 add $s2, $s0, $s1 j L2 L1: sub $s2, $s0, $s1 L2: sw $s2, var_c

DO-WHILE loop

WHILE loop

FOR loop

IF-THEN-ELSE

Incorrect !!!

Try write down corresponding high level code.

0 / 0.25 ptsQuestion 15IncorrectIncorrect

How to pass more than 4 arguments to assembly function block?

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By pushing arguments in stack.

There will not be any need to pass more than 4 arguments to a function block.

Use other registers apart from $a* registers.

More than 4 arguments is not permitted.

0.25 / 0.25 ptsQuestion 16

What are the registers in MIPS system affected by 'jal' instruction?

PC and $ra

$ra

None of these

PC

1. $ra is loaded with return address. 2. PC is loaded to target instruction address.

0.05 / 0.25 ptsQuestion 17PartialPartial

You are writing a function in MIPS assembly from label MYFUNC. This function does not need any argument and returns value in $v0. This function also calls another function 'THATFUNC' which takes one argument in $a1 and return value in $v0. To implement your function you are using $t0, $t5, $s1, $t6 and $s2. What are the registers you need to save in the function frame?

$sp

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$t5

$t6

$fp

$v0

$s1

$t0

$ra

$s2

$a1

0 / 0.25 ptsQuestion 18IncorrectIncorrect

What are part of function caller's run time environment (RTE) those are preserved within function's frame?

$zero

$a0-$a3

$ra

$t0-$t9

$s0-$s7

$fp

$gp

Hi

Lo

$v0-$v1

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$k0-$k1

$at

$sp

Consider what are stored in frame.

0 / 0.25 ptsQuestion 19IncorrectIncorrect

You are writing a function in MIPS assembly from label MYFUNC. This function does not need any argument and returns value in $v0. This function also calls another function 'THATFUNC' which takes one argument in $a1 and return value in $v0. To implement your function you are using $t0, $t5, $s1, $t6 and $s2. What's size of frame of your function in byte unit? Assume byte addressable memory is connected to MIPS.

6

Consider size of each registers and how many you need to store in frame.

0.13 / 0.25 ptsQuestion 20PartialPartial

What are the essential MIPS instructions to implement a recursive function?

j

jr

lw

sll

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div

jal

sw

mul

Quiz Score: 1.09 out of 5