Digital Logic

profilerhtstha7
Project_requirement_Oct15.pdf

Combinational  and  Sequential  Logic  Design     (15  required  points+10  bonus  points)  

 

Due  Oct  15  11:59pm  

Purpose:    

Understand  and  verify  basic  combinational  logic  and  sequential  logic  theory.    

Implement  small  practical  applications.  

Software  recommended:  Logicly    https://logic.ly/  select  free  trial  

 

Requirement:    

Task1  (required):  

Step  1.  Select  one  of  the  following  sequential  logic  circuits  we  learned  in  class  and  implement  it  by   Logicly,  verify  the  logic  behavior  of  your  implementation.    

(A)  4-­‐bits  binary  down  counter   (B)   4-­‐bits  binary  up  counter   (C)   4-­‐bits  shift  register  (SIPO  or  SISO  or  PISO  or  POPO)  

Step  2.  Select  one  of  the  following  sequential  logic  circuits,  read  the  reference  material  and   implement  it  by  Logicaly,  verify  the  logic  behavior  of  your  implementation.    

(A)  Cross  walk  traffic  light  controller  (reference:  slide3)   (B)   Rotating  lights  controller  (reference:  Lab  10  of  “GS-­‐DL020_manual.pdf”)   (C)   Lab  11  of  “GS-­‐DL020_manual.pdf”   (D)  Lab  12  of  “GS-­‐DL020_manual.pdf”  

Task2  (bonus):  

Modify  the  applications  of  the  circuit  you  implemented  in  Step  2  of  Task  1,  generate  the  full  logic   description  (including  state  truth  table,  output  signal  truth  table)  by  yourself.  Implement  your  circuit   by  Logicly  and  verify  the  logic  behavior  of  your  design.    

 

Report:  

Include  following  contents  in  your  report.  

Task1  (required):  

1.   Description  of  the  circuit  function   2.   Circuit  diagram  for  step  1   3.   Circuit  diagram,  state  truth  table  and  output  signal  table  for  step  2   4.   Screen  shot(s)  of  your  implementation  in  Logicaly   5.   Your  comments  of  the  implementation.  

Task2  (bonus):  

1.   Description  of  the  circuit  function   2.   State  truth  table  and  output  signal  table   3.   Next-­‐state  equations   4.   Complete  circuit  diagram   5.   Screen  shot(s)  of  your  implementation  in  Logicaly   6.   Your  comments  of  the  implementation.  

Submission:  

Compress  your  project  report  and  Logicly  files  into  one  file  (e.g.zip  file).  You  should  have  several   Logicly  files  with  proper  name:  

e.g.    

1.  FengJiang_report.pdf  

2.  FengJiang_Task1_step1_upcounter.logicly  

3.  FengJiang_Task1_step2_rotatelight.logicly  

4.  FengJiang_Task2_rotatelight.logicly  

Submit  the  compressed  file  through  blackboard.  

Presentation:  

Excellent  report(s)  will  be  selected  to  present  an  in-­‐class  presentation/demo.