Programable Logic controller questions 1-3

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PLC-7-1.pdf

MODULE TITLE: PROGRAMMABLE LOGIC CONTROLLERS

TOPIC TITLE: ADDITIONAL FACILITIES

LESSON 1: DIGITAL TO ANALOGUE CONVERSION

PLC - 7 - 1

© Teesside University 2011

Published by Teesside University Open Learning (Engineering)

School of Science & Engineering

Teesside University

Tees Valley, UK

TS1 3BA

+44 (0)1642 342740

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________________________________________________________________________________________

INTRODUCTION ________________________________________________________________________________________

This lesson deals with the idea of obtaining an analogue output from a machine

which is, itself, operated on purely digital principles. A simple network used for the

production of analogue outputs is examined from the point of view of a network

analysis, to determine the levels of output which could be possible in theory. These

output levels are not often those achieved in actual practice and reasons for non-

theoretical outputs and methods of counteracting them are also discussed.

The lesson continues by looking at the possible need to improve the analogue

output level to make it capable of supplying a greater range of loads.

Finally, the problem of maintaining and updating an output from a PLC is

considered by reference to the ladder diagram function and basic block

diagram circuitry found in analogue output modules.

________________________________________________________________________________________

YOUR AIMS ________________________________________________________________________________________

Upon completion of this lesson you should be able to:

• determine the number of analogue output values expected from

specified D/A circuits

• conduct a full voltage analysis on an R/2R network with a specified

number of inputs

• explain the need for amplification and buffering of the D/A output

• understand the use of a function number specified within a program

to effect control over a conversion update process.

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________________________________________________________________________________________

ANALOGUE OUTPUTS FROM PLCs ________________________________________________________________________________________

Lesson 1 of Topic 2 introduced analogue and digital signals and the difference

between them. It was stated that a true analogue signal is one which can have

an infinite number of possible values lying between an upper and a lower limit.

In comparison the digital signal on a single conductor can have only one of

two acceptable values, a logic 1 or a logic 0.

If a PLC, which is a digital machine, is to be used to supply a so called

analogue output, then the best that can be achieved from a single conductor is

two levels of voltage – one level obtained when the conductor is logic 1 and

the other when the conductor is logic 0. Two possible values do not constitute

an infinite number of values and so the analogue output would clearly not be

acceptable.

DIGITAL TO ANALOGUE CONVERSION

Whenever a digital machine/system is required to output an analogue signal

level an electrical conversion circuit (or network) is used to produce the change

from digital signals to analogue signals. Understandably, the network/circuit is

referred to as a digital to analogue (D/A) converter.

Unfortunately, the output from such a circuit will never be truly 'analogue', as

defined by the previous statement, because it is impossible to produce an

infinite number of output values from the circuit. The output number is finite

and is defined by the number of digital inputs going into the converter circuit.

Consider the diagram of FIGURE 1. The converter shown by the symbol has

two digital inputs, A and B. Each of these inputs can have one of two possible

logic levels, i.e. A can be logic 0 or 1 and B can be logic 0 or 1.

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This means that four possibilities of input levels exist (shown by the table of

FIGURE 2). It also means that only four "analogue" output levels are possible.

FIG. 1 FIG. 2

If the D/A converter has three digital input lines, as shown in FIGURE 3, then

as each one has two possible states, eight combinations of input levels exist.

This means that eight ‘analogue’ output levels are possible (FIGURE 4).

FIG. 3 FIG. 4

Digital Inputs Analogue

Output

1

2

3

4

5

6

7

8

C

0

0

0

0

1

1

1

1

B

0

0

1

1

0

0

1

1

A

0

1

0

1

0

1

0

1

A D/A CIRCUIT

Analogue

OutputB C

Digital Inputs

B

0

0

1

1

A

0

1

0

1

Analogue Output

1

2

3

4

A D/A CIRCUIT

Analogue

Output B

Digital Inputs

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If you have not realised yet, the number of outputs is increasing in a particular

fashion.

Two possibilities per line gives us a base of two, and the number of lines

produces a power index to which the base is raised, to produce the output

number. So we have:

one line – 21 = 2 values (i.e. 1 change 0 → 1) two lines – 22 = 4 values (i.e. 3 changes)

three lines – 23 = 8 values (i.e. 7 changes)

four lines – 24 = 16 values (i.e. 15 changes)

five lines – 25 = 32 values, etc. (i.e. 31 changes)

The diagram of FIGURE 5 shows a D/A circuit having 12 input lines. How many

output value levels are possible?

FIG. 5

________________________________________________________________________________________

A

B

C

D

E

F

G

H

I

J

K

L

D/A CIRCUIT

0 volt line

Digital Input Lines

Analogue Output

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A D/A circuit with 12 input lines will have 212 = 4096 possible output values.

A sixteen input D/A circuit produces a possible 65 536 output values. This is

still not truly analogue but the incremental change from value to value may be

small enough for it to be acceptable as an analogue equivalent. If, for example,

the output voltage ranged from 0 volts to 4 volts then the smallest change

possible in the output value would be 1/65 535 of 4 volts = 4/65535 volts

= 0.000061 volts. If the output voltage were being monitored by a 0 to 4 volt

analogue voltmeter then this small change in value would produce such a small

change in pointer deflection that it could not be detected by the human eye. If

this is the case, then a sixteen input D/A circuit would not be necessary, and

perhaps a twelve input or even an eight input D/A would suffice.

This example serves to show that a true analogue output is seldom required and

hence a D/A circuit can be chosen to have the number of inputs to match the

requirements of the device which is detecting or receiving the analogue output

signal. Hence D/A circuits have become acceptable within industry.

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________________________________________________________________________________________

D/A CIRCUIT ________________________________________________________________________________________

The process of drawing little boxes with lines going in and coming out is all

very easy but is it just as easy to understand what the manufacturer will put

inside the box to effect the conversion?

Different circuits exist as D/As and, as you might expect, modern practice is to

use integrated circuit packages because they are small, relatively cheap,

reliable and easy to install. We shall examine one circuit network method of

effecting a D/A conversion. The chosen circuit is simple because it contains

nothing other than resistors and so elementary circuit theory can be employed

to conduct an analysis.

R/2R RESISTOR CIRCUIT

To make the analysis as simple as possible a two input circuit will be used.

The theory of this circuit relies upon the use of only two values of resistor.

One we will call R ohms and the other 2R ohms, 2R being exactly twice the

resistance value of R. The actual values of resistance are not important to the

theory as long as the 1 : 2 ratio is maintained. However, the resistance values

used in practice do need some consideration.

FIGURE 6 shows the two input circuit. Only five resistors are needed and

these are identified as R1, R2, R3, R4 and R5.

Two test point nodes (TP1 and TP2) are also shown for text reference. Notice

that this purely resistive circuit does not have a positive power supply because

it draws its current from the digital circuit which feeds its inputs. To determine

a value of output voltage for each input combination of digital levels we will

need to carry out a circuit analysis.

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FIG. 6

If A = 0 and B = 0 (assumed here to be 0 volts)

If 0 volts is applied to each input then no current will flow in the circuit and no

voltage will be developed across any of the resistors. The output voltage will

therefore be 0 volts. This is the lower limit.

If A = 1 and B = 0

We don't need to specify a value of voltage to represent a logic 1 level, we

could just use V as a symbol. However, if you are not happy with this then

assume that the logic level is 9 volts which is common for CMOS circuits.

If input B is at logic 0 then a 0 volt connection has been made to this input.

The circuit network can now be considered as being that of FIGURE 7. R4 in

parallel with R5 is equivalent to a resistance value of:

R R

R R

R R

R R

R

R R4 5

4 5

22 2 2 2

4 4

×( ) +( ) =

× +

= = ohms

High impedance instrument

0 volt line

R5

R4R1

R2

Analogue output

V

A B

2R

TP2

2R2R

2R

TP1 R3

R

Inputs

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An equivalent circuit (FIGURE 8) can be drawn using this value.

FIG. 7

The equivalent circuit becomes:

FIG. 8

0 volt line

R1

R2

A = 1

R

TP2

2R

2R

TP1 R3

R

V

(Equivalent to R4 and R5)

0 volt line

R5

R1

R2

Analogue output

A

B

TP2

2R

2R

2R

TP1 R3

R

R4 2R V

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Note now that R3 is shown in series with R4 and R5 in parallel. The resistance

values both being R ohms gives a combined resistance of R + R = 2R ohms.

This 2R value is connected across R2 and so the next stage of equivalence can

be shown as FIGURE 9.

FIG. 9

R2 (2R ohms) in parallel with the equivalent resistance of R3, R4 and R5 (2R ohms) again gives a resistance of R ohms.

The circuit is finally reduced to the one shown in FIGURE 10.

R1

R2

A = 1

2R

2R

TP1

(Equivalent to R3, R4 and R5)

2R

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FIG. 10

This last equivalence diagram is that of a simple potential divide network of

two resistors connected in series. The potential at the node between the two

resistors (TP1) will be:

The diagrams of FIGURE 8, FIGURE 9 and FIGURE 10 can all be redrawn

showing this potential.

R

R R

R

R+( ) = =2 3 1 3

of the voltage applied at the input AA.

( 1 3

of 9 volts is 3 volts.)

R1

A = 1

R

2R

TP1

(Equivalent to R2, R3, R4 and R5)

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FIG. 11

The output voltage displayed on the voltmeter will be half the value available

at test point 1 because R3 is in series with the R4/R5 combination of R. The

actual value will therefore be 1/2 × 1/3 = 1/6 of the voltage applied as a logic 1 at the A input. (1/6 of 9 volts = 1.5 volts.)

If A = 0 and B = 1

The circuit analysis is very similar to that already conducted for the 1, 0 input.

This time the potential at test point 2 is 1/3 of the voltage applied at B (if you

doubt this then work through the equivalent circuits yourself). This is also the

value of voltage indicated at the output. (1/3 of 9 volts = 3 volts.)

R1

R2

A

2R

2R

TP1

2R

R1

A

R

2R

TP1 1/3 V

Equivalent to

1/3 V

Equivalent to

R1

R2

A

2R

2R

TP1

R3

R

R

1/3 V 1/6 V (Output voltage)

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If A = 1 and B = 1

To determine the output voltage with this input combination you will need to

consider the potentials that would exist if the R3 resistor were removed from

the circuit. The circuit would then be two potential dividers providing 1/2 of

the voltage at TP1 and 1/2 of the voltage at TP2 i.e. the same potentials. If the

same potentials exist then connecting R3 back into circuit will make no

difference because no current will flow through R3 (there being no potential

difference across it). This means that the output voltage will be 1/2 of the

input voltage (1/2 of 9 volts = 4.5 volts).

FIG. 12

When these output values are tabulated the output trend will appear.

R1

R2

A = 1

2R

2R

TP1 = 1/ 2V R3

R

V

B = 1

R4

TP2 = 1/ 2V

R5 2R

2R

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FIG. 13

The input/output graph of FIGURE 14 shows the possible incremental steps at

the D/A output. Steps of equal change in voltage are clearly indicated, no

other output values would be possible.

FIG. 14

A

D/A CIRCUIT

0 volt line

B

Analogue

Output

A = 0

B = 0

A = 1

B = 0

A = 0

B = 1

A = 1

B = 1

Input Combinations

1/6 V

2/6 V

3/6 V

Digital Inputs

Digital Inputs

Analogue Output

B

0

0

1

1

A

0

1

0

1

Output

0 volts = 0 volts

1 of VDIG = 2 VDIG3 6

1 of VDIG = 3 VDIG2 6

1 of VDIG = 1 VDIG6 6

1 VDIG DIFFERENCE6

1 VDIG DIFFERENCE6

1 VDIG DIFFERENCE6

} } }

Lower limit

Upper limit

Note: VDIG is whatever digital voltage value is being used (positive logic assumed).

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With a 2 input R/2R network the best theoretical analogue output would be 1/2

of the voltage level being used as a digital logic 1. On the basis of the current

work, theory suggests a 2.5 volt output if a 5 volt logic 1 is assumed.

However, even though the theory may seem acceptable, there are some factors

which have not been taken into consideration. These factors are due to circuit

loading effects.

Firstly, the D/A network has been considered as a stand alone circuit when, in

fact, it is actually connected to and supplied from another circuit, which feeds

it the logic levels. If the resistances within the network have relatively low

ohmic values then the D/A could draw a relatively large current which would

upset the logic levels at the input and, therefore, have an effect upon the

analogue value at the output. To minimise this effect the R/2R values would

need to be relatively high.

Secondly, the D/A network will be used to supply a circuit at its output

terminal. In our analysis the output load was a voltmeter which was being

used to sense the analogue voltage. If the load connected to the analogue

output needs to draw a relatively large current then its input resistance will be

relatively low. This low resistance will upset the output voltage value expected

because, in our analysis, we did not take this into account. This is indicated by

FIGURE 15. The only way to avoid this loading effect is to make the load a

high resistance or make it appear as a high resistance by the use of an

impedance matching device.

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FIG. 15

Consider the limitations of this network.

1. The R/2R values should ideally be high to prevent overloading or altering

the logic levels of the circuit supplying the D/A.

2. The load connected to the analogue output should be of high resistance in

relation to the R/2R resistance values. This will impose limits on the

output current.

3. The best possible analogue output voltage is fairly low at only 1/2 of the

input digital value.

To overcome some of the loading problems and to boost the output voltage to a

more useful value, the D/A circuit is likely to be followed by a fixed gain or

variable gain voltage amplifier (an integrated circuit operational amplifier).

No longer 2R Ω across TP2 to 0 volt line due to low

resistance load.

A B

2R

2R2R

2R

R

Low Ω Load

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Such an amplifier will present a high enough resistance to the D/A output and

provide a greater analogue voltage and current driving capacity to be able to

feed the load. FIGURE 16 shows the basic arrangement.

FIG. 16

The analogue output from the amplifier will be an amplification of the output

from the D/A circuit. The diagram indicates a times by four amplifier. If the

voltage gain is four and the logic level is +5 volts then 4 × 1/2 of 5 volts = 10 volts will be the new upper limit of analogue voltage.

Note that the analogue output has been amplified but it still only has four

possible output values, i.e.

1. 0 volts × 4 = 0 volts 2. (1/6 × 5 volts) × 4 = 3.33 volts 3. (2/6 × 5 volts) × 4 = 6.66 volts 4. (3/6 × 5 volts) × 4 = 10 volts

Remember, to increase the number of output values the number of digital

inputs must be increased. However, a 3, 4, 5, etc. input R/2R network does not

produce the same levels of analogue voltages as the 2 input circuit! Each

would require its own circuit analysis to determine the output upper and lower

range limits.

A D/A

CIRCUIT

B

Amplified

analogue output

High input

impedance ×4

Voltage amplifier

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________________________________________________________________________________________

PLC D/A CONVERTERS ________________________________________________________________________________________

Analogue outputs are not normally supplied as standard facilities on smaller

PLCs. It is possible to obtain them in separate units which may be fitted as

expansion modules for some machines and they certainly should be available

for use on larger and rack mounted types. Large PLCs are often supplied as an

almost empty backplane into which the user plugs the combination of modules

required for a particular application. One or more of these modules may be

analogue output units. The module plugged into the backplane would be

allocated an identification according to its position. The identification is often

by a channel number which represents a group of individual digital relays.

Any use of the module is made by making reference to its channel number

when programming the ladder diagram.

When the program is run and the point in the ladder diagram is reached where

an analogue output update is required the typical operation would be:

• obtain the logic status levels of a specified group of memory cells

• send the logic levels, as channel data, to the input terminals of the

D/A output module.

An analogue output value, determined by the current logic levels in the

specified memory locations, would then appear at the output of the specified

channel. The D/A inputs are, as in the case of the 2 input circuit, taken as true

binary (or hexadecimal) code.

The output analogue value will only be available until the program progresses

to the next part of the ladder diagram. It will then be lost unless the digital

values are captured (or latched) at the input to the D/A network. The module

would, therefore, require a small quantity of latching memory to retain the

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level of each bit. The latching memory device(s) must be controlled by the

CPU and enabled when an update is requested. This will be once in every

program scan if the analogue output rung is complete. Changes in the logic

levels of the specified memory locations which take place during the scan time

are then reflected by the next update scan.

The section of ladder diagram shown as FIGURE 17 indicates that the D/A

conversion output will be updated only if contacts 004 and 012 are closed. The

PLC instruction representing the control action for the D/A update is specified

by a function number (indicated by FUN ** on the diagram). The source of

the data is specified next. Remember that this implies a "group of" individual

locations. The last item of information is the destination channel (here channel

07).

FIG. 17

FIGURE 18 is a simplified version of the analogue output circuitry. Only eight

input lines are shown, giving 256 possible output values, but ten and twelve

line D/As should be recognised as being more common in practice.

004 012

FUN **

DM015

07

Analogue Output Function No. Source of Data. Destination Channel.

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FIG. 18

The D/A facility, as previously stated, would probably be provided in a larger

PLC. However, large PLCs are also likely to be capable of carrying out other

functions, such as some level of mathematics. In such cases, the machine may

view data held in certain groupings of memor y locations as being

representative of decimal values i.e. the data may be held in Binary Coded

Decimal (BCD) format. If data were regarded as being in BCD then it would

be nonsense to present it at the input of the D/A because the network would be

expected to have an input of true binary.

To cater for this, the set of instruction words which act as ladder diagram

functions, should also provide a means of converting the data from BCD

format to true binary format before the data is sent to the D/A circuit. This

will be discussed further in the next lesson.

You should now attempt the Self-Assessment Questions on pages 20 and 21.

D/A CIRCUIT

Analogue output

terminals

Data latch

memory

Latch control

0 volt line

Output amplifier (with fixed or variable gain)

⎧ ⎪ ⎪ ⎪⎪ ⎨ ⎪ ⎪ ⎪ ⎪⎩

Analogue output module

Data from PLC (possibly

via photo couplers)

AMP

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________________________________________________________________________________________

SELF-ASSESSMENT QUESTIONS ________________________________________________________________________________________

1. How many different output values are possible from a D/A circuit having:

(a) 8 inputs?

(b) 10 inputs?

(c) 12 inputs?

(d) 14 inputs?

(e) 16 inputs?

2. The network diagram of FIGURE 19 shows a 3 input R/2R network.

Determine the analogue value of output voltage for each of the input

combinations given in the table of FIGURE 20. Assume any suitable

value to represent a logic 1.

FIG. 19

V Analogue

output value

A

2R

2R

R

B

2R 2R

C

2R

R

0 volt line

Inputs

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FIG. 20

3. Explain why the output of a D/A circuit might be fed to the input of an

operational amplifier within a PLC D/A module.

C

0

0

0

1

B

0

0

1

0

A

0

1

0

0

Output value

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________________________________________________________________________________________

ANSWERS TO SELF-ASSESSMENT QUESTIONS ________________________________________________________________________________________

1. (a) 256 outputs.

(b) 1024 outputs.

(c) 4096 outputs.

(d) 16 384 outputs.

(e) 65 536 outputs.

2. C = 0, B = 0, A = 0 gives 0 volts output

C = 0, B = 0, A = 1 gives 1/12 of V output

C = 0, B = 1, A = 0 gives 2/12 of V output

C = 1, B = 0, A = 0 gives 4/12 of V output

where V is the value you assumed to represent a logic 1.

3. The output of a D/A network (certainly the R/2R type) is dependent

partially upon the loading applied to its output terminals. To reduce this

loading effect the output should be presented with a high resistance load

which does not vary. The output of the operational amplifier can be

scaled to produce a voltage range to match the load transducer

requirements and will also possess a current drive capability which a D/A

network will not have.

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________________________________________________________________________________________

SUMMARY ________________________________________________________________________________________

This lesson has concentrated on the possibility of producing an analogue

output from a non-analogue system. The network analysed was that of an

R/2R circuit but it should not be assumed that this is the only way of producing

an analogue output. The lesson also examined the loading effects of the D/A

network upon the circuit which supplies it and the considerations required with

respect to the load which is connected to its output terminals.

A D/A network is not the only circuitry to be expected within a PLC D/A

module and so the lesson continued by providing an indication of what else

may be found and the possible reasons for the additions. Such modules have to

be driven through a sequence of events which, in our case, have been shown to

be initiated by a FUNction number used within the ladder diagram. Carrying

out the function effects a conversion update.

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setdistillerparams << /HWResolution [2400 2400] /PageSize [612.000 792.000] >> setpagedevice