Programable Logic Controller questions. PLCS

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MODULE TITLE: PROGRAMMABLE LOGIC CONTROLLERS

TOPIC TITLE: DEVELOPMENT OF PLCs

LESSON 1: FROM MECHANICAL RELAYS CONTROL TO THE

MICROPROCESSOR

PLC - 2 - 1

© Teesside University 2011

Published by Teesside University Open Learning (Engineering)

School of Science & Engineering

Teesside University

Tees Valley, UK

TS1 3BA

+44 (0)1642 342740

All rights reserved. No part of this publication may be reproduced, stored in a

retrieval system, or transmitted, in any form or by any means, electronic, mechanical,

photocopying, recording or otherwise without the prior permission

of the Copyright owner.

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prior consent in any form of binding or cover other than that in which it is

published and without a similar condition including this

condition being imposed on the subsequent purchaser.

________________________________________________________________________________________

INTRODUCTION ________________________________________________________________________________________

The pursuit of more efficient, reliable and flexible methods of control in

industrial processes and production continuously gives rise to technological

innovation. With the proliferation of the microprocessor, their cheapness and

versatility led to their widespread application in industrial control. One such

class of microprocessors, with particular hardware modifications or additions

enabling the processing of input signals from a process to be used as process

control signals, are known as programmable logic controllers (PLCs) or simply

programmable controllers (PCs). In this lesson we shall be introduced to a

basic microprocessor system. Prior to that, in order to clarify the significance

of PLCs, we shall briefly look at earlier ‘control’ technology by way of

maintenance intensive mechanical relay logic and the use of solid state relays.

________________________________________________________________________________________

YOUR AIMS ________________________________________________________________________________________

On completion of this lesson you should be able to:

• appreciate the advantages of solid state relays over mechanical relays

• sketch and identify the components in the block diagram of a basic

microprocessor system

• understand the function of each block of a basic microprocessor

system.

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________________________________________________________________________________________

ACKNOWLEDGEMENT ________________________________________________________________________________________

The photographs in this lesson are reproduced by courtesy of Eaton Controls

(Cutler Hammer).

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________________________________________________________________________________________

RELAY CONTROL ________________________________________________________________________________________

The 'relay' is an electro-magnetic device for switching electrical signals to

control equipment. It has been in use for some time. Relay operation is fairly

simple to understand. With reference to FIGURE 1, when switch S1 is closed

a current flows which energises the coil of the relay; the magnetic field

produced magnetizes the soft iron core. This attracts a moving iron pole or

armature. The armature is mechanically linked to, though insulated from, sets

of contacts which may be 'normally open' or 'normally closed'.

FIG. 1

Plastic insulation

Spring return

Armature

A1

A2

B2

B1

Symbols for N/C contacts

Symbols for N/O contacts

Coil windings

Plastic former

Soft iron core

Switch

Current flows when the

switch S1 is closed S1

I r o n

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If a pair of relay contacts are OPEN when the relay is not energised, and closed

when the relay is energised, they are called NORMALLY OPEN CONTACTS

(N/O). In FIGURE 1 the contacts between B1 and B2 are normally open.

If a pair of relay contacts are CLOSED when the relay is not energised and

open when the relay is energised, they are called NORMALLY CLOSED

CONTACTS (N/C). In FIGURE 1 the contacts between A1 and A2 are

normally closed.

A relay may have a number of N/O and N/C contacts available for the control

of other relays, circuits or equipment. Note that the spring returns the relay to

its original state when the coil is de-energised.

If, in our diagram, contact terminals A1 and B1 are connected together and

given a common supply then the relay is said to have 'change-over' contacts.

This means that with the relay coil energised the supply becomes available at

contact terminal B2 and when the relay coil is de-energised it changes over to

become available at contact terminal A2. In this way control of the relay coil

provides control over two output terminals fed from a common supply.

Having considered the nature of relays in general, let us now turn our attention

to some actual relays. Their names are related to the function they perform in

a circuit.

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CONTACTOR RELAYS

FIG. 2

FIGURE 2 shows a relay which is designed to switch main supply voltages to

electrical equipment, for example motors and solenoids. These relays are still

in wide use for control purposes. The contacts in this type of relay are

designed to carry 'full load' or 'fault level' currents under certain circuit

conditions.

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CONTROL RELAYS

FIG. 3

In circuits involving complex sequences, or circuits where there are a number

of input signals, the use of another type of relay is required – the control relay

shown in FIGURE 3.

The construction of control relays, such as that shown in FIGURE 3, reflects

their function. Their contacts tend to carry only the low levels of current

required by control circuits. This means that the contacts are smaller and the

overall size of the relay is less than that of contactor relays.

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TIME DELAY RELAYS

FIG. 4

If, in a sequence of steps, a delay is required between the steps, then time delay

relays are used. Different types of time delay relays are available, including:

• pneumatic

• dashpot

• electronic.

The relay contacts of a time delay relay operate after a pre-determined time.

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Typical periods of time delay vary between 2 seconds and 180 seconds. The

time delay value is normally adjustable within the maximum and minimum

limits.

Combinations of N/O and N/C contacts are usually available.

FIGURE 5 shows a typical industrial relay panel. On it you should be able to

identify contactor, control and time delay relays.

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FIG. 5

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Consider the operation of a simple relay control system. FIGURE 6 shows

such a system. It is made up of two circuits; (a) the control circuit and (b) the

controlled or load circuit.

FIG. 6

Although the system may appear straightforward to some people it is worth

explaining the operation and possibly asking some questions.

When the switch SW1 is closed the control circuit is complete and a current

will flow from the supply through the relay coil. The coil will be energised

causing the normally open load contacts to close, thereby providing the load (a

valve in this circuit) with a supply. The valve should, therefore, operate

whenever the switch SW1 is operated.

The following question must be asked.

If the operation of the valve follows the operation of the switch, why is there a

need for the relay? Could the switch operate the valve directly?

SW 1

Relay coil

N/O contacts

Load supply

V

Valve

(a) Control circuit

(b) Load circuit

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The answer to the question may very well be "yes" because the switch could

operate the valve directly without the need for the relay.

So what are the advantages of the use of a relay?

(a) In this system it has been assumed that the valve requires a relatively

large value of current to make it operate. If this is the case, and the

switch happens to be some distance away from the valve then the long

cables carrying the directly switched valve current may incur relatively

large voltage drops and power losses. It is better to keep such cables as

short as possible to minimise these losses.

(b) The switch SW1 might be a small sensor which is capable of carrying a

small relay current but not capable of carrying the actual value of current

required by the valve.

(c) The small relay voltage is present at the switch contacts. If these contacts

are exposed to touch then it is preferable to have this smaller relay voltage

present than the larger load voltage (as would be the case if direct

switching were used).

(d) The use of a relay which has two sets of normally open contacts (instead

of one) would allow additional circuitry to be switched, possibly to

provide an indication on a control panel to show that the relay was

switched.

Are there any other important points to note?

If you refer to FIGURE 6 you will notice that there is no electrical connection

between the control circuit and the load circuit. When two circuits exist in this

way they are said to be electrically isolated from each other.

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________________________________________________________________________________________

DEDICATED SOLID STATE LOGIC CONTROL ________________________________________________________________________________________

In the 1950s the semiconductor industry produced solid state components, for

example diodes and transistors. Transistors could switch on and off in

response to control signals. These individual (discrete) components were

mounted on circuit boards and replaced relays in many applications,

particularly where a number of control steps were required. Such devices were

used to control only certain specific functions, and in this respect were

'dedicated'.

Then, in the 1960s, another major change occurred, namely the introduction of

the integrated circuit. An integrated circuit is a single chip of silicon upon

which hundreds or even thousands of components (diodes, transistors, etc) can

be built. These integrated circuits could replace discrete component circuits,

and, being only a fraction of their size, much more complex control circuits

could be designed. They were also far cheaper when mass produced.

Both of these developments led to the demise of previous control methods

using relays, as relay systems in general, had the following disadvantages:

• they required maintenance – sometimes frequently, depending on

plant conditions

• they required complex wiring if involved systems were being

controlled

• they were inflexible to modification

• they suffered mechanical and electrical wear and failure.

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It is not difficult to see why control engineers and industry in general were

keen to adopt the new technology, especially when fairly complex sequences

of control were required.

Consider the operation of a conventional relay system as compared with that of

an integrated circuit control system.

FIGURE 7 shows a simple system where 3 relays must be energised before a

valve is activated. Each relay is energised by a separate switch (or sensor).

FIG. 7

Concerning the operation of the system in FIGURE 7, we can make the

following basic control statement:

The output valve will operate when contacts A, B and C are all closed.

Note that the relays A, B and C only operate when their respective switches are

closed.

SW 1

Relay A V1

Valve

SW 2 SW 3

Relay B Relay C

V2

A B C

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In practice, the switches may be level switches, pressure switches, or other

types of sensory device. However, two important features to note are the

number of moving parts involved, and also the amount of wiring required.

Once this wiring has been installed it is referred to as being 'hard wired'.

Now consider FIGURE 8.

FIG. 8

This figure represents an integrated circuit. From the symbols you can see that

there are 3 inputs and 1 output. This symbol represents a logic 'AND' gate,

the operation of which will be examined in more detail.

The 'pin out diagram' shows that in this particular integrated circuit (IC), or

chip, there are 3 such gates. The inputs and output of each gate are connected

to pins which are identified by number. The pins are arranged in two lines, one

along each side of the package – this is referred to as a dual-in-line (DIL)

package.

From lesson PLC - 1 - 1 we can recognise the gates as 3-input AND gates, the

truth table for one of which is shown in FIGURE 9.

1

2

3

4

5

6

7 8

9

10

11

12

13

14

GND

+Vcc I/Ps O/P&

Logic symbols for a single 3 I/P 'AND' gate

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FIG. 9 Truth Table for a 3 input AND gate

We can also compare this operation with the response of the system of

FIGURE 7 to a similar combination of its inputs, as shown in FIGURE 10.

The '0's and '1's in the first three columns represent logic levels applied to the

input terminals which have been identified as terminals A, B and C.

The output terminal (identified as D in the fourth column) shows the logic

level expected from the gate. Note that the output state is only 1 (on) when A

and B and C are 1 (on).

(A) INPUT STATE

0

0

0

0

1

1

1

1

(B) INPUT STATE

0

0

1

1

0

0

1

1

(C) INPUT STATE

0

1

0

1

0

1

0

1

(D) OUTPUT STATE

0

0

0

0

0

0

0

1

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FIG. 10 Truth Table for System of FIGURE 7

If you compare FIGURES 9 and 10 you will see that both the relay system and

the logic AND gate obey the same basic rules. They are, in effect, equivalent

to each other, i.e. the two circuits in FIGURE 11 perform the same logic

function.

FIG. 11

O/PI/P

A B C

Relay

Gate

O/PI/P

A

B

C &

Coil A

OFF

OFF

OFF

OFF

ENERGISED

ENERGISED

ENERGISED

ENERGISED

Coil B

OFF

OFF

ENERGISED

ENERGISED

OFF

OFF

ENERGISED

ENERGISED

Coil C

OFF

ENERGISED

OFF

ENERGISED

OFF

ENERGISED

OFF

ENERGISED

OUTPUT

OFF

OFF

OFF

OFF

OFF

OFF

OFF

ACTIVATED

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If the same logic function exists then it should be possible to use the integrated

circuit gate as a replacement for part of the system of FIGURE 7.

The system diagram may then become as shown in FIGURE 12 below.

FIG. 12

In FIGURE 12 one relay is used to control the supply to the valve. The coil of

this relay obtains its supply from the output of the three-input AND gate. The

relay coil will be energised whenever the gate output is a logic '1'. FIGURE 9

shows that an output of logic '1' will only exist when the three inputs A, B and

C are also at logic '1'. In this circuit A, B and C will be logic '1' if switches

SW1, SW2 and SW3 are all closed. If any one or more of these switches are

not closed then the respective input will be supplied with a logic '0' by virtue

of the connection to the 0 volt supply rail via the resistors. The valve will

therefore, only be activated when all three switches are closed so this system

behaves in a similar manner to that of FIGURE 7. Comparing FIGURE 12

SW 1 SW 2 SW 3

Valve

Load supply

N/O contacts

0 volts

Resistors

Relay coil

D

I.C.

C

B

A

+V (+5 volts)

&

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with FIGURE 7 shows that fewer relays are used, therefore, less maintenance

is required and, because the gate is solid state, there is less chance of

mechanical wear or electrical failure.

Our examination of FIGURE 7 and FIGURE 12 highlights the 'AND' function.

Other combinations of switches and relay contacts can be shown to provide

different logic functions and these can similarly be replaced with solid state

logic gates. Subsequent lessons will involve more practice in the use of logic.

Now, consider the advantages of the integrated circuit over the relay circuit:

• there are no moving parts

• the IC is smaller in size

• the IC is more reliable

• it makes a faster response

• it has a lower power consumption

• it is less expensive.

However, having mentioned all the advantages of ICs, solid-state logic

systems, designed for a specific function, shared with relays the major

disadvantage of being inflexible because both types are hard wired. Once the

wiring was completed any subsequent changes could only be made by

changing the wiring and circuitry. This could be expensive in labour, materials

and loss of production time.

In the remainder of this lesson we shall look at aspects of a microprocessor

which forms the essentials of a PLC.

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________________________________________________________________________________________

A BASIC MICROPROCESSOR SYSTEM ________________________________________________________________________________________

FIGURE 13 is a block diagram showing the essential features of a

microprocessor system. It consists of four blocks, each representing one or

more integrated circuits. The blocks are interconnected by information paths

called BUSSES. The function of each block will now be outlined.

FIG. 13

CPU ROM RAM (or

RWM) I/O

ADDRESS BUS

DATA BUS

CRYSTAL

M E M O R Y

CONTROL BUS

C L

O C

K

PA ‘IN’

PB ‘OUT’

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________________________________________________________________________________________

CENTRAL PROCESSING UNIT ________________________________________________________________________________________

CPU stands for CENTRAL PROCESSING UNIT and is, in fact, the

microprocessor. The CPU can be regarded as the ‘brain’ of the system

because within this unit all the PROCESSING of data is carried out. By

‘processing’ we mean that the data is altered in some sort of way. Remember

that in a binary machine the data merely consists of ‘1’s or ‘0’s. A typical

piece of data might be ‘10010101’ which, after processing, might become

‘01101010’.

The amount of processing that the CPU can do in a single operation is very

limited. It performs multiplication and division by repetitive arithmetical

operations of addition and subtraction. To process data the microprocessor

requires a program of instructions.

Both instructions and data are stored in memory and the CPU will first fetch

an instruction and then the data to be operated on from the memory via the

data bus. The data enters the CPU and is acted upon according to the

instruction. Usually the data is then returned to memory via the data bus.

Another instruction, and more data are then fetched and processed and in this

way the CPU works its way through the program stored in memory until the

end of the program is reached. The process is depicted in FIGURE 14 and is

known as the ‘FETCH-EXECUTE CYCLE’. An instruction is fetched and

then executed. Another instruction is then fetched and executed and so on.

Note that the data transfers could occur between CPU and the I/O device, as

well as CPU and memory.

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FIG. 14

The internal workings of the CPU and the fetch-execute cycle is discussed in

greater detail in a later lesson.

START OF PROGRAM

FETCH INSTRUCTION FROM MEMORY

FETCH DATA FROM MEMORY

EXECUTE INSTRUCTION

FETCH NEXT INSTRUCTION

END OF PROGRAM

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________________________________________________________________________________________

THE SYSTEM CLOCK ________________________________________________________________________________________

If you look back to FIGURE 13 you will see that a CRYSTAL is connected

to a clock built into the CPU. The output of the clock is a regular waveform

as shown in FIGURE 15, and is used to ‘drive’ the microprocessor system.

Without it the system would simply die as no signal changes could occur

within the CPU or elsewhere in the system. Also the timing of data

interchanges in a computer system is critical. For example, as the data bus is

time shared, then the arrival and removal of data on this bus must be accurately

timed or else it could arrive at the wrong destination. The synchronization of

the various parts of the system is achieved by means of the system clock. The

crystal is used to give a very accurate clock frequency. Typically, the crystal in

a personal computer will run at a clock frequency measured in hundreds of

megahertz.

FIG. 15

The system clock signal

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________________________________________________________________________________________

MEMORY ________________________________________________________________________________________

The memory is used, of course, to store information. There are many ways of

storing information in a computer system. For example it can be stored on a

hard disc, CD-ROM, floppy disc, or cassette tape. The type of memories

shown in the block diagram, however, are SEMICONDUCTOR MEMORIES.

A semiconductor memory can be pictured as a set of “pigeon holes” arranged

in rows and columns as shown in FIGURE 16. Such an arrangement is called

a ‘matrix’.

FIG. 16

Each pigeon hole has a unique address. Thus the data ‘*’ is stored at address

ROW 2, COLUMN 3. This address location is ACCESSED by activating the

ROW 2, COLUMN 3 address lines. Data may then be WRITTEN into or

READ from this location. Thus there are two basic types of memory

operation, READ and WRITE, as depicted in FIGURE 17.

ROW 1

ROW 2

ROW 3

ROW 4

C O

L U

M N

1

C O

L U

M N

2

C O

L U

M N

3

C O

L U

M N

4

COLUMN ADDRESS LINES

ROW ADDRESS

LINES

STORED DATA

*

MEMORY CELL

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FIG. 17

It is important to note that we can read a particular address as many times as

we like without destroying its contents. In this respect the semiconductor

memory behaves like a cassette tape – we can replay the tape as many times as

we wish without losing the original recording. Such memories are called

NON-DESTRUCTIVE in contrast to certain other types of memory which lose

their contents when read – i.e. are destructive.

As the microprocessor system is binary then the memory will be made up of

two-state storage devices which are called BISTABLES. Each bistable

element or cell shown in FIGURE 16 is only capable of storing a ‘0’ or a ‘1’.

The entire memory of FIGURE 16 can store 16 binary digits. (Note that as

each cell must contain a ‘0’ or a ‘1’, a cell cannot be empty.)

Data communication within the microprocessor system is carried out by

parallel (i.e. 8 bits at once) data transfer on the data bus. It the data bus is

8 lines wide, then the memory must be capable of handling 8 binary digits

simultaneously. This is achieved by having 8 blocks of memory, each block of

which is connected to one line of the data bus.

The idea is sketched in FIGURE 17. All eight blocks are addressed at the

same time so that if, in this example, address “row 3, column 4” were read

then the data ‘00110011’ would appear on the data bus lines D0 – D7.

MEMORY MEMORYADDRESSADDRESS READ WRITE

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FIG. 18

FIGURE 19 shows how the row and column lines are organised so that an

address will simultaneously access one cell in each block. Finally, FIGURE 20

emphasises the fact that all the cell data lines within a block are ‘commoned’

so that the entire block uses only one data line. Only one memory cell within a

block can be accessed at a time so the sharing of a single data line for all the

cells within the block does not cause any problems. (Consider, by analogy, the

every day example of a drink dispensing machine. It has only one outlet but as

we can only make one selection at a time we do not end up with tea in our

coffee!)

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1 1 0 0

0 0 1 1

D

D

7

0

8 DATA LINES

'BLOCK' OF MEMORY

C O

L 2

C O

L 3

C O

L 4

ROW 1

ROW 2

ROW 3

ROW 4

C O

L 1

FIG. 19

FIG. 20

MEMORY PLANE DATA LINE

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COLUMNS

R O W S

READ ONLY MEMORY (ROM)

The memory shown in FIGURE 13 has been split into two different blocks,

namely ROM and RAM. Physically each block represents a different set of

ICs.

ROM stands for ‘read only memory’ and, as the name implies, ROM

can only be READ; a ROM cannot be written into. It may well be asked, that

if a ROM can only be ‘read’, then how did any information get into the

memory in the first place? The answer is that the writing into the ROM has

been carried out before the microprocessor system user lays hands on the

machine. This may be done during the fabrication of the ROM ‘chip’ (in what

are known as MASKED ROMs), or after the manufacture of the ‘chip’ (for

PROGRAMMABLE ROMs) by using special equipment. Either way, as far as

users are concerned they can only read their ROM’s. The information in ROM

can be compared to the text on this page. Once printed (i.e. written onto by the

printer before you got the lesson!) it cannot be altered but only read. To use

computer jargon, the information remains ‘firm’. For this reason programs

stored in ROM are sometimes called FIRMWARE. Note also that, like written

text, ROM can be read as many times as we wish. FIGURE 21 attempts to

sum up ROM.

FIG. 21

ROM

(FIRMWARE)

ADDRESS

DATA (READ ONLY)

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RANDOM ACCESS MEMORY (RAM)

I know it is not a promising start to the subject but ‘RAM’ is a misnomer for

this type of memory! It would be better referred to as READ/WRITE

MEMORY (RWM), although the term ‘RAM’ is more widely used. The

actual meaning of RAM will be explained in a subsequent topic, but let’s, for

the moment, forget about ‘random access’ and just concentrate on ‘read/write’.

Users can perform both read and write operations on RWM. This means that

they can ‘load’ a program into this type of memory by means of, for example,

a keyboard, cassette or disc, and then run the program. When the program is

finished with, a new one may be entered, to overwrite the old. This process

may be repeated as many times as we wish. The information stored in RWM

(or RAM!) can be compared with the text written onto a T.V. screen or a

calculator display; as new data is added it overwrites the old. Moreover, with a

semiconductor read/write memory we can selectively alter any particular

memory location by addressing that location and writing new data into it. No

special equipment or operations are required to do this – it is as easy to write

into a RWM (RAM) as it is to read it. The memory ‘chip’, however, will need

to know which operation is required of it, READ or WRITE. The type of

operation is signalled to it from the CPU on a ‘read/write’ wire which is part of

the CONTROL BUS.

Read/write semiconductor memories require a constant source of power if they

are to retain the stored information. If the power is switched off, then the

information is lost! This type of memory is called VOLATILE. Thus RAMs

are volatile and ROMs are non-volatile.

FIGURE 22 depicts the action of a RAM.

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FIG. 22

OTHER TYPES OF NON-VOLATILE SOLID-STATE MEMORY ROMs

Masked Programmed ROMs – these are chips written to during production

and will often be programmed with proprietary instructions for the control of,

say, a manufacturer’s washing machine cycle. The content of these ROMs

cannot be changed afterwards.

PROMs (Programmable Read-Only Memory) can be written to or

programmed via a special device, a PROM programmer. The writing often

takes the form of permanently destroying or creating internal links (fuses or

anti-fuses) with the result that a PROM can only be programmed once.

EPROMs (Erasable Programmable Read-Only Memory), as shown in

FIGURE 23, can be erased by exposure to ultraviolet light then rewritten via

an EPROM programmer. Repeated exposure to ultraviolet light will

eventually destroy the EPROM but it generally takes many (greater than 1000)

exposures before the EPROM becomes unusable. EPROMs can be easily

identified by the circular ‘window’ in the top which allows the UV light to

RWM (RAM)

ADDRESS

DATA IN (WRITE)

DATA OUT (READ)

'READ' or 'WRITE' Instruction from CPU.

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enter. Once programmed, this window is typically covered by a label to

prevent accidental erasure. The small quartz window admits ultraviolet light

during erasure. They can be used with PLCs to record programs.

FIG. 23

EAROMs (Electrically Alterable Read-Only Memory of Flash Memory) can

be modified a bit at a time, but writing is a slow process. Most of the time the

memory is used as a ROM. An EAROM may be used to store information in a

non-volatile way. For many applications, EAROM has been supplanted by

RAM backed-up by a battery.

EEPROM (Electrically Erasable Programme Read-Only Memory) allow the

entire ROM (or selected bits of the ROM) to be electrically erased (flashed

back to zero) then written to without taking them out of the piece of equipment

(like a computer, camera, MP3 player, etc.).

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________________________________________________________________________________________

IN/OUT DEVICE (I/O) ________________________________________________________________________________________

The fourth block (‘I/O’) enables the microcomputer system to communicate

with the outside world. Two PORTS, Port A (PA) and Port B (PB ) are shown,

one acting as an input to the system, the other as an output. Typically, each

port will consist of eight data lines. In a very simple system the input port

could be wired to switches and the output port to lamps (or, more likely, ‘Light

Emitting Diodes’, LEDs), as illustrated in FIGURE 24. Note again the resistor

R associated with the input switch so that the input is not left floating when the

switch is open. R ‘pulls up’ the voltage level to +5 V. For this reason it is

called a ‘pull up resistor’.

FIG. 24

Each output line wired to a switch.

R

+5 V

Each output line wired to an LED.

PB0

PB7

PA0

PA7

PA

PB

I/O DEVICE

ADDRESS BUS

'READ' OR 'WRITE' INSTRUCTION

FROM CPU.

DATA BUS

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Can you think of a reason why the output switches and LEDs be directly connected to

the data bus?

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There are several good reasons why this is not done, two of which are now

discussed.

(i) The data bus is shared between many different devices. If the switches

were connected directly to the bus then they would tend to ‘jam’ the bus

in one state, making it impossible for any other device to use it. It is one

of the roles of the ‘I/O’ to disconnect the input switches when they are not

being used and only connect them to the data bus when instructed by the

CPU to do so. In this way, data transfer from the input switches only

occurs under the control of the CPU. FIGURE 25 shows the ‘IN/OUT’

device subdivided into IN and OUT blocks. The IN block is represented

as eight parallel switches which all close simultaneously when the CPU

gives an ‘INPUT’ instruction. (Note that although the switches in the

‘IN’ device have been represented as being mechanically operated, they

will be, in practice, solid state switches fabricated in an integrated circuit.)

FIG. 25

D0

D7

DATA BUS

'OUTPUT' INSTRUCTION FROM CPU.

'INPUT' INSTRUCTION FROM CPU.

I N P U T

S W I T C H E S

O U T P U T

L E D 'S

'OUT' DEVICE

'IN' DEVICE

L A T C H

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(ii) As hinted at above, the data bus is ‘TIMESHARED’ between the different

devices connected to it. For example, it could be used in the following

sequence:

(a) DATA TRANSFER FROM ROM TO CPU

(b) DATA TRANSFER FROM CPU TO RAM

(c) DATA TRANSFER FROM ‘IN’ DEVICE TO CPU

(d) DATA TRANSFER FROM CPU TO ‘OUT’ DEVICE.

If the LEDs were connected directly to the data bus they would respond to

all of these data interchanges as well as the required transfer from CPU to

‘OUT’ device (d). Moreover, all of these interchanges would occur

within a few thousandths of a second and to the human observer it would

appear that the LEDs were switched ON all the time! To prevent this

from happening, the LEDs (or any other output device) are only

connected to the data bus via the output port under the instruction of the

CPU.

The data to the LEDs is then held firm until the CPU instructs the data

bus to be reconnected to output new data. The CPU signals its

‘intentions’ to the ‘I/O’ box by means of a short pulse. FIGURE 11

shows that a device called a LATCH is placed between the DATA BUS

and the LEDs. A LATCH is a device which stores data temporarily, under

the control of an input pulse. With this arrangement, then, the CPU will

apply an output command (in the form of a pulse) to the output data latch.

Whatever data is on the data bus will then be transferred into the latch and

the LEDs will be illuminated according to this data pattern. The LEDs

will remain in this state, even though the information on the data bus will

be changing continuously, until a new output command pulse is applied to

the latch by the CPU.

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NOTES ________________________________________________________________________________________

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35

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________________________________________________________________________________________

SELF-ASSESSMENT QUESTIONS ________________________________________________________________________________________

1. Design a circuit to show how a relay having both N/O and N/C contacts

could be used to operate two lamps. The circuit requirements are:

• when the relay is energised, lamp '1' is ON, lamp '2' is OFF

• when the relay is de-energised, lamp '1' is OFF, lamp '2' is ON.

The relay coil requires a separately switched supply from that used for the

lamps.

2. FIGURE 26 (opposite) shows 3 water tanks fed by solenoid control

valves, V1, V2 and V3. Each tank has a float switch to detect the

maximum level condition. Show by means of a simple BLOCK

DIAGRAM how microprocessor control could be used to give a

programmed filling sequence.

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FIG. 26

3. Explain, in a sentence or two, what is meant by the ‘fetch-execute cycle’.

4. State the two types of operation that can be performed upon a memory.

5. Give two reasons why the ‘outside world’ cannot be connected directly to

the data bus.

Water feed pipe

1

L1 L2 L3

2 3

V1 V2 V3

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________________________________________________________________________________________

ANSWERS TO SELF-ASSESSMENT QUESTIONS ________________________________________________________________________________________

1. FIGURE 27 shows the required circuit.

FIG. 27

OPERATION: As the switch closes, current from V1 energises the relay.

The relay closes a pair of normally open contacts to complete the lamp 1

circuit, and opens a pair of normally closed contacts in the lamp 2 circuit.

So V2 supplies current to lamp 1 but the supply to lamp 2 is broken, thus

satisfying the condition that when the relay is energised, lamp 1 is ON

and lamp 2 OFF. When the relay is de-energised, lamp 1 is OFF and

lamp 2 is ON.

V1

V2

Lamp 1Lamp 2

Switch

Relay

38

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2.

FIG. 28

3. In the ‘fetch-execute cycle’ an instruction and the data to be operated on

are fetched from memory to the CPU via the data bus. This forms the

‘fetch’ part of the cycle. The data is then acted upon as required by the

instruction. This is the ‘execute’ part of the cycle. The next instruction is

now fetched from memory.

4. The memory operations are READ and WRITE.

MICROPROCESSOR

V1

OR

Float switch inputs

Water valve outputs

MICROPROCESSOR

V1

V3L3

L1

L1

L2

L3

Common Commo

PROGRAMME OF

SEQUENCE

PROGRAMME OF

SEQUENCE

L2 V2

V2

V3

39

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5. (a) The external devices might jam the bus.

(b) The external devices will operate at much lower speeds than the

microprocessor system.

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________________________________________________________________________________________

SUMMARY ________________________________________________________________________________________

In this lesson we have been introduced to equipment such as relays used in

pre-CPU methods of industrial process control. Mechanical relays were

superseded by solid state relays and they in turn by PLCs, essentially

microprocessors. In the latter part of the lesson we examined a basic

microprocessor system and found its main features comprised:

(a) CPU – the processing and control section of the computer. It processes

the information fed into it and can perform, for example, arithmetic

operations such as addition and subtraction. The CPU is also responsible

for the control and synchronization of other parts in the system.

(b) MEMORY – ROM, ‘Read Only Memory’, is used to store permanent

programs. The information in ROM is entered as part of the

manufacturing process and cannot be altered by the system user. ROM

can only be read.

– RAM, ‘Random Access Memory’, (better referred to as Read/Write

Memory) is used to store user programs and data of a temporary nature.

The user can both read out of and write into RAM.

(c) IN/OUT. There are many kinds of ‘in/out’ devices. They are used to

interface the system with the ‘outside world’ where, for example, devices

usually work at much slower speeds than a microprocessor.

(d) A system clock is also required to ‘drive’ the system – i.e. cause the

system to change from one state to another.

In the next lesson we shall look a little more in depth at the internal workings

of a microprocessor.

41

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