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PAPERSilicon-IntegratedHigh-DensityElectrocorticalInterfaces.pdf

INVITED P A P E R

Silicon-Integrated High-Density Electrocortical Interfaces This paper examines the state of the art of chronically implantable

electrocorticography (ECoG) interface systems and introduces a novel modular

ECoG system using an encapsulated neural interfacing acquisition chip (ENIAC)

that allows for improved, broad coverage in an area of high spatiotemporal

resolution.

By Sohmyung Ha, Member IEEE, Abraham Akinin, Student Member IEEE,

Jiwoong Park, Student Member IEEE, Chul Kim, Student Member IEEE,

Hui Wang, Student Member IEEE, Christoph Maier, Member IEEE,

Patrick P. Mercier, Member IEEE, and Gert Cauwenberghs, Fellow IEEE

ABSTRACT | Recent demand and initiatives in brain research have driven significant interest toward developing chronically

implantable neural interface systems with high spatiotempo-

ral resolution and spatial coverage extending to the whole

brain. Electroencephalography-based systems are noninva-

sive and cost efficient in monitoring neural activity across the

brain, but suffer from fundamental limitations in spatiotem-

poral resolution. On the other hand, neural spike and local

field potential (LFP) monitoring with penetrating electrodes

offer higher resolution, but are highly invasive and inade-

quate for long-term use in humans due to unreliability in

long-term data recording and risk for infection and inflamma-

tion. Alternatively, electrocorticography (ECoG) promises a

minimally invasive, chronically implantable neural interface

with resolution and spatial coverage capabilities that, with

future technology scaling, may meet the needs of recently

proposed brain initiatives. In this paper, we discuss the chal-

lenges and state-of-the-art technologies that are enabling

next-generation fully implantable high-density ECoG inter-

faces, including details on electrodes, data acquisition front-

ends, stimulation drivers, and circuits and antennas for

wireless communications and power delivery. Along with

state-of-the-art implantable ECoG interface systems, we

introduce a modular ECoG system concept based on a fully

encapsulated neural interfacing acquisition chip (ENIAC).

Multiple ENIACs can be placed across the cortical surface,

enabling dense coverage over wide area with high spatio-

temporal resolution. The circuit and system level details of

ENIAC are presented, along with measurement results.

KEYWORDS | BRAIN Initiative; electrocorticography; neural recording; neural stimulation; neural technology

I. INTRODUCTION

The Brain Research through Advancing Innovative Neuro-

technologies (BRAIN) Initiative envisions expanding our

understanding of the human brain. It targets development and application of innovative neural technologies to ad-

vance the resolution of neural recording, and stimulation

toward dynamic mapping of the brain circuits and process-

ing [1], [2]. These advanced neurotechnologies will enable

new studies and experiments to augment our current under-

standing of the brain, thereby enabling tremendous advances

in diagnosis and treatment opportunities over a broad range

of neurological diseases and disorders. Studying the dynamics and connectivity of the brain

requires a wide range of technologies to address multiple

temporal and spatial scales. Fig. 1 shows spatial and tem-

poral resolutions and spatial coverage of the various brain

monitoring methods that are currently available [3]–[6].

Noninvasive methods such as magnetic resonance im-

aging (MRI), functional magnetic resonance imaging

Manuscript received January 1, 2016; revised May 24, 2016; accepted May 30, 2016. Date of publication August 5, 2016; date of current version December 20, 2016. This work was supported by the University of California Multicampus Research Programs and Initiatives (MRPI) and the University of California San Diego Center for Brain Activity Mapping. The authors are with the University of California San Diego, La Jolla, CA 92093-0412 USA (e-mail: [email protected]; [email protected]; [email protected]).

Digital Object Identifier: 10.1109/JPROC.2016.2587690

0018-9219 Ó 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.

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(fMRI), magnetoencephalography (MEG), and positron

emission tomography (PET) provide whole-brain spatial

coverage. Although fMRI achieves high spatial resolution

down to 1 mm, its temporal resolution is severely limited

(1–10 s) as the system measures neural activity indirectly

by quantifying blood oxygenation to support regions with

more elevated metabolism. In contrast, MEG provides

higher temporal resolution (0.01–0.1 s) at the expense of poor spatial resolution (1 cm). Whereas fMRI and MEG

provide complementary performance in spatiotemporal

resolution, PET offers molecular selectivity in functional

imaging at the expense of lower spatial (1 cm) and tempo-

ral (10–100 s) resolution, and the need for injecting posi-

tron emitting radionuclides in the bloodstream. However,

neither fMRI and MEG, nor PET are suitable for wearable

or portable applications, as they all require very large, ex- pensive, and high power equipment to support the sensors

as well as extensively shielded environments.

In constrast, electrophysiology methods, which di-

rectly measure electrical signals that arise from the activity

of neurons, offer superior temporal resolution. They have

been extensively used to monitor brain activity due to their

ability to capture wide ranges of brain activities from the

subcellular level to the whole brain oscillation level as shown in Fig. 2(a). Due to recent advances in electrode

and integrated circuit technologies, electrophysiological

monitoring methods can be designed to be portable, with

fully wearable or implantable configurations for brain–

computer interfaces having been demonstrated.

One of the most popular electrophysiological moni-

toring methods is electroencephalography (EEG), which

records electrical activity on the scalp resulting from volume conduction of coherent collective neural activity

throughout the brain, as illustrated in Fig. 2(a). EEG re-

cording is safe (noninvasive) and relatively inexpensive, but its spatiotemporal resolution is limited to about 1 cm

and 100 Hz, due largely to the dispersive electrical prop-

erties of several layers of high-resistive tissue, particu-

larly skull, between the brain and the scalp. In contrast,

recording with intracranial brain-penetrating microelec-

trodes [labeled as EAP + LFP in Fig. 2(a)] can achieve

much higher resolution due to the much closer proximity

to individual neurons. Thus, it is also widely used for brain research and brain–computer interface (BCI)

applications. Using microelectrodes, extracellular action

potential (EAPs) and local field potentials (LFPs) can be

recorded from multiple neurons across multiple cortical

areas and layers. Even though penetrating microelec-

trodes can provide rich information from neurons, they

can suffer from tissue damage during insertion [7]–[9],

Fig. 1. Spatial and temporal resolution as well as spatial coverage of various neural activity monitoring modalities [3]–[5]. For each

modality shown, the lower boundary of the box specifies the

spatial resolution indicated on the left axis, whereas the upper

boundary specifies the spatial coverage on the right axis. The

width of each box indicates the typical achievable range of

temporal resolution. Portable modalities are shown in color.

Bridging an important gap between noninvasive and highly

invasive techniques, �ECoG has emerged as a useful tool for

diagnostics and brain-mapping research.

Fig. 2. (a) Conventional electrophysiology methods including EEG, ECoG, and neural spike and LFP recording with penetrating

microelectrodes. Both EEG and ECoG can capture correlated

collective volume conductions in gyri such as regions of a-b, d-e,

and j-k. However, they cannot record opposing volume

conductions in sulci such as regions of b-c-d and e-f-g and

random dipole layers such as regions of g-h and l-m-n-o [18].

(b) Emerging fully implantable �ECoG technologies enabled by

flexible substrate ECoG microarrays and modular ECoG interface

microsystems. Such technologies are capable of capturing local

volume conducting activities missed by conventional methods,

and are extendable to cover large surface area across cortex.

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and have substantial limitations in long-term chronic applications due to their susceptibility to signal degrada-

tion from electrode displacement and immune response

against the electrodes [10]. Because of the more extreme

invasiveness and longevity issues, chronic implantation

of penetrating microelectrodes in humans is not yet

viable.

Between the two extremes of EEG and penetrating

microelectrode arrays, a practical alternative technique is electrocoticography (ECoG), or intracranial/intraoperative

EEG (iEEG), which records synchronized postsynaptic po-

tentials at locations much closer to the cortical surface, as

illustrated in Fig. 2(a). Compared to EEG, ECoG has high-

er spatial resolution [11]–[13], higher signal-to-noise ratio,

broader bandwidth [14], and much less susceptibility to ar-

tifacts from movement, electromyogram (EMG), or elec-

trooculargram (EOG) [15], [16]. In addition, ECoG does not penetrate the cortex, does not scar, and can have supe-

rior long-term signal stability recording through subdural

surface electrodes.

ECoG recording was pioneered in the 1920s by

Hans Berger [17]. He recorded ECoG signals with elec-

trodes placed on the dural surface of human patients.

In the 1930s through 1950s, Wilder Penfield and

Herbert Jasper at the Montreal Neurological Institute used ECoG to identify epileptogenic zones as a part of the

Montreal procedure, which is a surgical protocol to treat

patients with severe epilepsy by removing sections of the

cortex most responsible for epileptic seizures. In addi-

tion, intraoperative electrical stimulation of the brain has

been used to explore the functional mapping of the brain

including brain areas for speech, motor, and sensory

functions. This localization of important brain regions is important to exclude from surgical removal. Although

ECoG is still the gold standard for decoding epileptic

seizure foci and determining target regions for surgical

removal, the role of ECoG has been reduced due to re-

cent advances in imaging techniques for functional brain

mapping such as fMRI, PET, and MEG.

With advances in high channel count and wireless op-

eration, however, ECoG has again emerged as an impor- tant tool not only for more effective treatment of

epilepsy, but also for investigating other types of brain

activity across the cortical surface. ECoG recording pro-

vides stable brain activity recording at a mesoscopic spa-

tiotemporal resolution with a large spatial coverage up to

whole or a significant area of the brain. Advanced minia-

turized electrode arrays have pushed the spatial resolu-

tion of ECoG recording to less than 1 mm, offering a unique opportunity to monitor large-scale brain activity

much more precisely. Moreover, wireless implantable

microsystems based on flexible technology or via modu-

lar placement of multichannel active devices, both illus-

trated in Fig. 2(b), have recently emerged as a new

paradigm to record more closely to the cortical surface

(in many cases on top of the pia), while enabling

coverage along the natural curvature of the cortex with- out penetration. These micro ECoG, or �ECoG, devices enable even higher spatial resolution than conven-

tional ECoG systems, and are beginning to enable next-

generation brain mapping, therapeutic stimulation, and

BCI systems.

This paper discusses the challenges of designing

next-generation ECoG interfaces, including recording,

miniaturization, stimulation, powering, and data com- munications. Solutions are presented by first surveying

state-of-the-art technologies, and then through a de-

tailed exploration of a state-of-the-art modular system

implementation.

II. ECoG INTERFACES: RECORDING AND STIMULATION

A. Volume Conduction With Differential Electrodes Volume conduction of ionic currents in the body is

the source of biopotentials such as EEG, ECoG, ECG,

and EMG. In the frequency band of interest for biopo-

tential recording (typically less than 1 kHz), the quasi-

static electric field equations with conductivities of tissue

layers are a good approximate representation [19]. To first order, a volume conducting current monopole I spreads radially through tissue with an outward current

density of magnitude I=4�r2 at distance r, giving rise to an outward electric field of magnitude I=4��r2 and a corresponding electrical potential I=4��r, where � is the tissue volume conductivity.

1) Differential Recording: For EEG, a current dipole as a closely spaced pair of opposing current monopoles is

typically an adequate model representing distant sources

of synchronous electrical activity across large assemblies

of neurons or synapses [19]. In contrast, for implanted

neural recording including ECoG and single-unit neural

spike/LFP recording, a set of monopole currents result-

ing from individual neural units is a more appropriate

model at the local spatial scale, especially for high density recording with electrodes spaced at dimensions

approaching intercellular distances. Since the volume

conducting currents from neural action potentials are

spatially and temporally distributed, only a few effective

current sources at a time are typically active near an

electrode, one of which is illustrated in the vicinity of

two closely spaced electrodes in Fig. 3(a). Furthermore,

unlike the ground-referenced recording with single- ended electrodes for EEG, high-density electrode arrays

typically require differential recording across electrodes,

particularly in �ECoG integrated recording since the miniaturized geometry does not allow for a distal ground

connection.

In Fig. 3(a), the recorded differential voltage V as a function of the distances rþ and r� of the two electrodes

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from a current source I induced by the activity of adja- cent neurons can be expressed as

Vðrþ; r�Þ ffi I

2��

1

rþ � 1 r�

� � (1)

valid for distances rþ; r� substantially larger than the electrode diameter D. Although the expression is similar to that for an EEG current dipole recorded with a single electrode, it is fundamentally different in that here the

difference in monopole activity results from differential

sensing with two closely spaced electrodes rather than

from dipolar distribution of two closely spaced currents.

The factor 2 rather than 4 in the denominator arises

from the semi-infinite boundary conditions along the

horizontal plane of the electrode substrate, in that

volume conduction is restricted to the tissue below the substrate. Fig. 3(b) shows a spatial map of the effect of a

current source located in tissue below the electrode pair,

with electrode diameter D and pitch 2D, on the mea- sured differential voltage V. Its recording penetration depth is roughly 2D, the electrode pitch, vertically, and about 4D horizontally. Note again that this is for a single monopolar source; in the presence of dipolar activity

with two opposing nearby currents (i.e., charge balancing across a soma and dendrite of a neuron extending below

the electrodes) the measured voltage (1) becomes double

differential, leading to a quadrupolar response profile.

2) Differential Stimulation: The same pair of closely spaced electrodes can be used for differential stimulation

by injecting currents into the surrounding tissue. Again,

the absence of a distal ground connection in miniature integrated electrode arrays necessitates local charge bal-

ancing so that the currents through the two electrodes

need to be of equal strength and opposing polarity, con-

stituting a current dipole sourced within the electrode

array. The resulting differential current stimulation can

be modeled with the diagram shown in Fig. 3(c). The

current dipole from the pair of differential stimulation

currents flowing through the two electrodes induces an electrical field ~E in the brain tissue expressed by

~Eðrþ; r�Þ ffi I

2��

~urþ r2þ

�~ur� r2�

! (2)

where again rþ; r� � D, and ~urþ and ~ur� represent unit vectors pointing outwards along the direction of rþ and r�, respectively. With the same electrode configuration of Fig. 3(b), the magnitude of the electric field j~Ej is shown in Fig. 3(d) indicating a shallow region near the

electrodes being electrically stimulated. Note that the

electrical field for stimulation is inversely proportional to

the square of distance to each electrode, while the poten-

tial measured for recording is inversely proportional to linear distance. Thus, the available depth of differential

stimulation is shallower than that of differential record-

ing. In general, the penetration depth of stimulation and

recording are roughly a few times larger than the elec-

trode pitch.

3) Electrode Array Configurations: While this is a simplified model, it is sufficiently representative to dem- onstrate the effectiveness of differential electrode config-

urations for both recording and stimulation without a

global reference, as required for fully integrated �ECoG in absence of a distal ground connection. As the analysis

and simulations above show, the spatial response of

differential recording and stimulation are quite localized

near the electrode sites, on a spatial scale that matches

the electrode dimensions and spacing. Thus, aside from spatial selection of recording or stimulation along

the 2-D surface by translation of selected pairs of adja-

cent electrodes, depth and spatial resolution of recording

or stimulation can be controlled via virtual electrode

pitch, by pooling multiple electrodes in complementary

pairs of super electrodes at variable spacing between

centers.

Fig. 3. (a) Neural recording setting with closely spaced differential electrodes interfacing below with neural tissue of

volume conductivity �. (b) Spatial map of the effect of the

location of a current source þI in the tissue on recorded differential voltage V, in units 1=�D. (c) Neural stimulation setting

with differential currents injected into the surrounding tissue

through the same two closely spaced electrodes. (d) Spatial map

of the resulting electric field magnitude j~Ej in the tissue, in units 1=�D2.

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B. Electrode Interfaces for ECoG Electrodes, which couple ECoG signals from the brain

into the analog front-end (AFE) amplifiers, are the first

interface to ECoG systems. Thus, their properties,

including materials, geometries, and placement are of

crucial importance in building entire acquisition and

actuation systems [32].

Given the distance between the scalp and individual

neuronal current sources and sinks, EEG recording is un- suitable for detecting small local field potentials as

shown in Fig. 2(a). Electrical dipole signals travel a mini-

mum distance of 1 cm between the outer surface of the

cerebral cortex to the scalp, including layers of cerebro-

spinal fluid, meninges, bone and skin, all with varying

electrical properties. Through this path the effect of a

small-localized dipole source is not only greatly attenu-

ated but also spatially averaged among a myriad of neigh- bors, resulting in practical and theoretical limits to the

spatiotemporal resolution of EEG [33]. As implied in (1), centimeter-sized electrode arrays with centimeter spac-

ings in conventional ECoG recordings are better than

EEG, but have limitations in resolving current sources of

neural activity of size smaller than the electrode pitch. A

conventional clinical ECoG array with electrodes at the

centimeter scale is depicted in Fig. 4(a).

A miniaturized surface electrode array in direct con-

tact with the cerebral cortex can resolve the activity of smaller source populations down to millimeter or even

submillimeter resolution as shown in Fig. 4(b)–(k). Fur-

thermore, site-specific purposeful electrical stimulation

is only possible at �ECoG scale. Improvements in the quality and applications of ECoG data have resulted from

technological developments at the interface: microfabri-

cation of electrode and substrate materials and intercon-

nect. Simply miniaturizing existing electrode array is not typically sufficient: for example, miniaturized electrodes

Fig. 4. Conventional and state-of-the-art ECoG electrode arrays. (a) Example of a conventional electrode array placed on the subdural cortex (top) with post-operative radiograph showing electrode array placement (bottom). The pitch and diameter of electrodes are

1 cm and 2 mm, respectively [20]. (b) �ECoG electrode array placed along with a conventional ECoG electrode array [21], [22].

(c) Patient-specific electrode array for sulcal and gyral placement [23]. (d) Flexible 252-channel ECoG electrode array on a thin

polyimide foil substrate [24]. (e) �ECoG electrode array with 124 circular electrodes with three different diameters [25].

(f) Parylene-coated metal tracks and electrodes within a silicone rubber substrate [26]. (g) A transparent �ECoG electrode array with

platinum electrodes on a Parylene C substrate [27]. (h) An electrode array with poly (3, 4-ethylenedioxythiophene) (PDOT) and

PEDOT-carbon nanotube (CNT) composite coatings for lower electrode interface impedance [28]. (i) A flexible electrode array on a

bioresorbable substrates of silk fibroin [29]. (j) Flexible active electrode array with two integrated transistors on each pixel for ECoG

signal buffering and column multiplexing for high channel count [30]. (k) Flexible ECoG array with embedded light-emitting diodes

for optogenetics-based stimulation [31].

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in G 1 mm pitch arrays have very high impedance, which results in poor signal quality, and reduced charge trans-

fer capacity, which typically reduces stimulation effi-

ciency. Such limitations have been addressed by

micropatterning increased surface area, and carbon nano-

tube [34] or conductive polymer coatings [Fig. 4(h)]

[28]. Flexible substrates have also reduced the effective

distance between source and electrodes through tight, conformal geometries [24], [26]. Aside from creating

ultraflexible thin materials, dissolvable substrates leave

behind a mesh of thin unobtrusive wires and electrodes

with a superior curved conformation and biocompatibil-

ity as shown in Fig. 4(i) [29], [35].

Even with advances in flexible electrode arrays, the

number of channels in practical systems is still limited to

approximately 100 because of the high density of intercon- nections between electrode arrays and corresponding

acquisition systems. Active electrodes are an emerging

approach to maximize number of electrode channels while

maintaining a small number of wired connections to the

electrode array. Advanced fabrication techniques can pro-

duce arrays of electrodes with direct integration of transis-

tors on the flexible substrate as shown in Fig. 4(j) [30] This

approach can be supplemented with additional in situ devices capable of multiplexing several hundreds of record-

ing channels, thereby reducing the required number of

wires and interconnections. Another emergent approach

combining active recording electrodes and new polymeric

materials has led to the development of organic electro-

chemical transistors in ECoG arrays [36]. However, one

limitation of current active arrays is that the same elec-

trode cannot be used for stimulation. Recently, transparent electrode arrays with integrated light path for simulta-

neous ECoG recording and optogenetic stimulation have

been demonstrated as shown in Fig. 4(k) [31]. The active

development of novel electrode interfaces has not only im-

proved conventional ECoG recording, but also generated

new applications and therapeutic opportunities.

C. Integrated Circuit Interfaces for Data Acquisition

Neural data acquisition with a high spatial resolution

poses several challenges in the design of application-

specific integrated circuits (ASICs) used to perform data

acquisition. Higher channel density in ECoG arrays typi-

cally results in smaller electrode size, and if the area

overhead of the ASIC should be kept small, as is desired

in most applications, then the area dedicated to amplify

and digitize each channel should also reduce. Unfortu-

nately, area trades off with several important parameters.

For example, a more dense array of AFE amplifiers dissi- pates more power and generates more heat for each

channel, and thus power dedicated to each front-end

channel must reduce to meet thermal regulatory limits.

Power then trades off with noise, causing signal fidelity

issues. The area/volume constraint of front-ends typically

also precludes the use of external components such as

inductors or capacitors. As a result, alternating current

(ac) coupling capacitors employed to reject direct cur- rent (dc) or slowly time-varying electrode offsets are not

typically employed, so other techniques are instead nec-

essary. Small electrodes also have higher impedance, re-

quiring even higher AFE input impedance to avoid signal

attenuation. In addition, high power supply rejection ra-

tio (PSRR) is required because miniaturized implants

typically condition dc power from an external ac source,

and further may not be able to accommodate large power decoupling capacitors. Higher channel counts also re-

quire higher communication throughput, increasing the

power consumption of communication. All these require-

ments are interrelated and trade off with each other in

many ways, as indicated in Table 1 [32], [37], [38].

The noise-current tradeoff in instrumentation ampli-

fiers (IAs) is well represented by the noise efficiency

factor (NEF), which is expressed as

NEF ¼ Vrms;in ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi

2Itot �Vt � 4kT � BW

r (3)

where Vrms;in is the total input-referred noise, Itot the total current drain, Vt the thermal voltage, and BW the 3-dB bandwidth of the system [39]. To minimize noise

with a given current consumption or minimize current

consumption with a upper-bound noise limit, various

Table 1 Design Factors and Tradeoffs in Integrated ECoG Interfaces

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design techniques have been proposed and demonstrated to address this challenges [40]–[59]. Such techniques to

minimize NEF include 1) utilizing the weak inversion re-

gion of CMOS operation to maximize transconductance

efficiency [37], [40], [60], [61]; 2) chopper stabilization

techniques to reduce 1=f noise and other low-frequency noise [41], [43], [45], [47], [48], [62], [63]; 3) dynamic

range manipulation to reduce power supply voltages

[54], [55] using spectrum-equalizing AFE [64], [65]; and 4) using current-reusing nMOS and pMOS input pairs to

maximize transconductance and achieve an NEF below

two [54], [56]–[59] (Fig. 5).

Challenges in meeting the other specifications listed

in Table 1 have also been addressed using various cir-

cuit techniques. For example, several dc-coupling IAs

have been demonstrated in order to avoid external ac-

coupling capacitors at the input of the AFE [42], [43]. In these designs, electrode offsets are canceled by feed-

back currents via a dc-servo loop [42], [43] or by capac-

itive feedback [66].

Integration of higher channel count on a single

chip has been pursued, as well. Thus far, chips with

approximately 100–300 data acquisition channels have

been reported [54], [67]–[70]. One of the strategies

to reduce area and power consumption in order to maximize channel density is the use of scaled pro-

cesses such as 65-nm complementary metal–oxide–

semiconductor (CMOS) [66], achieving 64 channels

with a silicon area of 0.025 mm 2 per channel. For high-

er density, in some designs, a SAR ADC is shared by

about 8–16 AFEs using a time multiplexer [54]. In doing

so, power-efficient multiplexers [71] and time-interleaving

sample-and-hold circuits in SAR ADCs have been demon- strated. Alternatively, a dedicated ADC per AFE channel

has been also pursued due to its ease of integration with a

larger number of channels [44], [66].

D. Integrated Circuit Interfaces for Stimulation Historically, electrical stimulation on the cortical sur-

face was pioneered by Penfield [72] as intraoperative

planning for epileptic patients, demonstrating the local- ized function of different regions of the cortex [73].

Since then, functional neural stimulation has been exten-

sively investigated and developed during the past de-

cades, making great progress for various clinical

applications such as deep brain stimulation, cochlear im-

plants, cardiac pacemakers, bladder control implants,

and retinal prostheses. Given that many epilepsy patients

already require implantation of ECoG monitoring instru- mentation, there is a great opportunity for closed-loop

electrical control of seizure activity at much higher reso-

lution and precision than transcranial electric [74] and

transcranial magnetic stimulation [75], [76]. These em-

bedded stimulators would not require any additional in-

vasive risks, and could potentially prevent more drastic

treatments such as partial removal of the cortex. An

implantable recording and stimulation system can con-

tain a digital signal processor capable of deciding when

to stimulate [77]. Other applications of cortical stimula-

tion include closed-loop brain computer interfaces (BCI)

which aim to generate functional maps of the brain [78],

restore somatosensory feedback [76], restore motor con- trol to tetraplegics [79], aid stroke survivors [80], [81],

restore vision [82], reduce pain [73], or even change

emotional state [83].

Pushing the form factor and channel density of the

neural interface systems to the limit requires addressing

several challenges in ASICs for stimulation. Smaller form

factor and higher channel density require smaller elec-

trode size, which limits charge transfer capacity for effective stimulation. Hence, higher voltage rails of more

than �10 V and/or high-voltage processes are required typically [84]–[86], in turn this results in higher power

consumption, larger silicon area, and system complexity

to generate and handle high-voltage signals. Instead of

maintaining a constant high-voltage power supply, some

designs save power by generating a large power rail only

when actively stimulating [77], [87], [88]. For further power savings, adiabatic stimulation has

been also actively investigated. Adiabatic stimulators gen-

erate ramping power rails that closely follow the voltages

at the stimulation electrode, minimizing unnecessary

voltage drops across the current source employed for

conventional constant-current stimulation. Various

designs have been implemented with external capacitors

[89], external inductors [90], and charge pumps [87]. Still, there is much room for improvement in the imple-

mentation of adiabatic stimulators in fully integrated,

miniaturized implantable ICs.

It is generally desired to minimize the area occupied

per stimulation channel for high-density integration.

To date, integration of 100–1600 channels has been

Fig. 5. Noise efficiency factors of state-of-the-art instrumentation amplifiers for biopotential recording

applications.

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achieved [84]–[86], [91]–[93]. In order to integrate such high channel counts, programmability of waveform pa-

rameters, individual connectivity to each channel, and/or

charge balancing need to be compromised to some ex-

tent. For example, groups of 4–8 electrodes in [91],

[93]–[95] can share a single digital-to-analog converter

for optimized, high density integration.

Safety is of the utmost importance in chronic neural

interfaces, so charge balancing is imperative [96]. Resid- ual dc results in tissue damage, production of toxic by-

products, and electrode degradation [96]. However, it is

quite challenging to assure charge balance for each chan-

nel in high-channel neural interface systems. One of the

most straightforward strategies is to employ serial dc-

blocking capacitors, inherently forcing the net dc to be

zero all the time. This method has been employed for

neural stimulation applications [97]–[99] due to its in- trinsic safety when area permits. However, the required

blocking capacitance is often prohibitively large for on-

chip integration, and is thus inadequate for high-density

and/or miniaturized implants. Instead of external capaci-

tors, capacitive electrodes made with high-k dielectric

coatings have been investigated for safe neural interfaces

[88], [100], [101]. Several other techniques for better

charge balancing have been demonstrated: 1) shorting electrodes to ground [102]; and 2) utilizing a discharging

resistor [94], active current balancing by feedback con-

trol [103], [104], generating additional balancing current

pulses by monitoring electrode voltages [105], and em-

bedded DAC calibration [93], [106].

E. Integrated Electrocortical Online Data Processing

The integration of signal processing with neurophysi-

ological sensing and actuation enables real-time online

control strategies toward realizing adaptive, autonomous

closed-loop systems for remediation of neurological dis-

orders [107], [108]. Online signal processing of ECoG

data has tremendous potential to improve patient out-

comes in diseases currently lacking therapy or requiring

resection of otherwise healthy neural tissue such as in- tractable epilepsy. As one of the treatments for epilepsy,

functional neurostimulation in response to detected sei-

zures has been proved effective in reduction of seizures

[109], [110]. For real-time closed-loop therapeutics, on-

line automated seizure prediction and/or detection based

on ECoG or EEG recordings of epileptic patients is im-

perative [111]–[114], and their on-chip implementation

has been actively investigated and demonstrated utilizing extraction and classification of various signal features

such as power spectral densities and wavelet coefficients

[47], [77], [115]–[118].

In addition, ECoG has proven a powerful modality for

BCI applications owing to richer features present in the

higher resolution ECoG signals compared to surface EEG,

which can be harnessed to more precisely infer sensory

recognition, cognition, and motor function. Since ECoG- based BCI systems widely utilize spectral power density

for their inputs [119], frequency band power extraction

techniques have been implemented immediately follow-

ing AFEs avoiding digitization and RF data transmission

of whole ECoG raw signals [120], [121].

Such on-chip real-time ECoG data processing offers

two distinct advantages over offline as well as online off-

chip processing. First, constrains on data bandwidth and power consumption on the implant can be largely re-

lieved. In many implementations, raw recorded data are

wirelessly streamed out and delivered to either a unit

worn on the top of the head, or directly to a local base

station such as a smartphone. The power of such ap-

proaches is typically proportional to the communication

distance. Thus, the overall power consumption of designs

that stream over long distances can be dominated by the power of communication circuits [47]. In order to reduce

system-level power consumption, several on-chip data

processing techniques have been applied for EEG- and

ECoG-based BCI systems and epileptic seizure detection.

By doing so, power consumption of RF data transmission

can be drastically reduced [47]. Second, local processing

may alleviate stringent latency and buffer memory

requirements in the uplink transmission of data for external processing, especially where multiple implants

are time-multiplexed between a common base station.

III. SYSTEM CONSIDERATIONS

A. Powering Major challenges in implantable medical devices

(IMDs) for high-density brain activity monitoring are

fundamentally posed by their target location. Some of

these IMDs can be wholly placed on the cortex within a

very limited geometry as shown in Fig. 2(b) In other

cases, only the electrode array is placed on the cortex

while the other components can be located in the empty

space created by a craniotomy [122], or under the scalp

with lead wires connected [123], [124]. Regardless of placement, this constrained environment poses a difficult

power challenge.

There are three primary methods for powering an

implanted device: employing a battery, harvesting en-

ergy from the environment, and delivering power

transcutaneously via a wireless power transmitter [125],

[126]. A natural first choice would be a battery, as

they have been extensively used in other implantable applications such as pacemakers. While it makes sense

to use a battery in a pacing application, where the

power of the load circuit is small (microwatts) and a

large physical volume is available such that the battery

can last ten years or more, the power consumption in

high-density neural recording and stimulation applica-

tions is typically much larger (milliwatts), and the

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physical volume available for a large battery is small, combining to dramatically reducing operational lifetime

prior to necessary surgical reimplantation. The medical

risks of regular brain surgery and recovery, just to re-

place a battery, are unacceptable to most patients, and

thus batteries are typically only employed in high-density

neural applications as temporary energy storage in sys-

tems with a different power source: either energy scav-

enging or wireless power transfer. Harvesting energy from ambient sources in the local

environment has been a potentially attracting powering

option since at least the 1970s during the development

of cochlear implants. Many scavenging methods continue

to be actively developed: 1) solar cells; 2) biofuel cells;

3) thermoelectric generators; 4) piezoelectric generators;

5) ambient RF, etc. While such approaches are theoreti-

cally attractive, the limited volume available near the brain, coupled with the stochastic nature of many energy

harvesting sources, results in power that is too small and

too variable to reliably operate multichannel neural

technologies.

The most popular means to power an implanted

device with higher power than single-channel pacing

applications is to wirelessly delivery power via a transcu-

taneous link. Power can be delivered transcutaneously using one of three primary mechanisms: 1) optics (typi-

cally near infrared light); 2) acoustics (typically at ultra-

sound frequencies); and 3) electromagnetics (either

near-, mid-, or far-field waves). Each method can deliver

from 10 �W up to the megawatt range of power. How- ever, the total deliverable power highly depends on the

geometry and makeup of the receiving transducer, along

with the implant depth and orientation. Optical powering through transmission of infrared

light has a very short penetration depth of a few millime-

ters, limiting its utility to subcutaneous and very shallow

implant applications [130]–[132]. Ultrasound, on the

other hand, can penetrate much deeper into tissue, po-

tentially powering implants located on the cortical sur-

face. In fact, it has been demonstrated that ultrasound

can more efficiently power millimeter-scale devices im- planted deep into soft tissues than electromagnetic ap-

proaches [133]. However, it has also been shown that

ultrasonic energy does not efficiently penetrate bone,

limiting opportunities to directly power cortical implants

from outside the skull. To overcome this, researchers

have proposed two-tiered systems, where electromag-

netic energy is coupled through the skull, then converted

to acoustic energy via an intermediate transducer system, and finally delivered to the miniaturized implant through

soft tissue [134]. However, in addition to nontrivial pack-

aging and transducer design challenges, this is likely only

a reasonable approach when the implant to be powered

is either very deep, or very small (submillimeter scale).

For these reasons, ultrasonic power delivery is not typi-

cally considered for ECoG systems.

The most popular transcutaneous power delivery ap- proach utilizes electromagnetics. For devices implanted

to a depth of a few centimeters, and that are on the

order of millimeter-to-centimeter in diameter, near- or

mid-field electromagnetic power transfer is generally

considered to be the most efficient and practical method

to power such devices. Near-field power transfer, which

operates at frequencies up to approximately 100 MHz for

typical implants, has been extensively used for cochlear implants [135], retinal prostheses [86], [93], and various

research IMD systems [122], [136]–[139], and has been

investigated and characterized to maximize its usage and

power transfer efficiency for implants [140]–[145].

Most conventional designs operate in the near-field

between 1 and 20 MHz, since it is well known that con-

ductivity (and hence losses) in tissue increase at higher

frequencies, as shown in Fig. 6. Operating at higher fre- quencies, it was previously argued, would encounter

higher losses and thus be less efficient. In addition, gov-

ernmental regulatory agencies limit the amount of power

that can be dissipated in tissue for safety reasons—the

U.S. Federal Communications Commission (FCC) sets a

specific absorption rate (SAR) of less than 1.6 W/kg, for

example. For these reasons, conventional transcutaneous

power transfer links operate in the low-megahertz range, often at the 6.78- and 13.56-MHz ISM bands [125],

[144], [145].

However, it is also well known that the quality factor

and radiation resistance of electrically small coil anten-

nas increases with increasing frequency. Thus, miniatur-

ized implants, which have electrically small coils for

wireless power reception, tend to prefer to operate at

higher frequencies, at least in air. In biological tissues, the tradeoff between coil design and tissue losses results

in an optimal frequency for wireless power transmission

where efficiency is maximized. For example, the induc-

tance of coils located on miniaturized, millimeter-scale

implants ranges from 10 to 100 nH [66], [88], [146],

[147]. To compensate for reduced magnetic flux through

the miniaturized receiving coil, the carrier frequency for

wireless power transfer should be increased, often into the hundreds of megahertz to single-digit gigahertz range

[66], [146]–[149]. These prior studies have demonstrated

that it is possible to efficiently deliver milliwatts of

power to small, implanted devices under regulatory

limits, and thus electromagnetic approaches are the pri-

mary means to deliver power to implanted ECoG

devices.

B. Wireless Data Communication Implanted ECoG monitoring devices need to convey

the acquired data to the external world through wireless

communication. The information received by the exter-

nal base station can be monitored, processed, and used

by users and care takers for health monitoring, treat-

ments, or scientific research. For ECoG monitoring

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implants, data transmission from the implant to the ex-

ternal device, known as uplink or backward telemetry,

requires much higher data rate and is subject to more

stringent power consumption constraints than data trans-

mission from the external device to the implant, known

as downlink or forward telemetry, because the available

power and geometric volume are much smaller on the

implanted side than the external side. This power con- straint on backward data transmission is more exacer-

bated as the number of channels increases, as higher

data rates are required in a typically more compact area,

leading to severe power density challenges.

Backward data communications typically employ elec-

tromagnetics operating either in the far- or near-field.

Far-field communication uses electromagnetic radiation

to transmit data over a distance much longer than the size of the actual device. Hence, the implant can send

data to an external base station located up to a few

meters, such as mobile phone. Far-field up-conversion

transmitters are currently the most well-established com-

munication technology. Due to the wide availability of

far-field radio products and a myriad of different infra-

structures (e.g., Bluetooth Low Energy, WiFi, etc.), far-

field radios can be quickly adopted for robust operation [122]. However, even state-of-the-art low-power radios

consume 9 1 nJ/b [125], [164], which is order-of- magnitude larger than what typical ECoG recording

IMDs require.

As an alternative far-field transmission method, im-

pulse radio ultrawideband (IR-UWB) transmission has

emerged recently due to its low power consumption in

the range of a few tens of picojoule per bit (pJ/b) [165]– [167]. Avoiding generation of a carrier with an accurate

frequency, noncoherent IR-UWB transmitters generates

short pulses with ON–OFF keying (OOK) or pulse posi-

tion modulation (PPM). Due to its high and wide fre-

quency range (3.1–10 GHz), data rates of more than

10 Mb/s with tens of picojoules per bit have been re-

ported. [168] In addition, antennas for this type of trans-

mission do not need to be large. However, there are a couple of critical reasons against their usage for IMDs

[125]. Foremost, their peak transmission power is large

due to the inherently duty-cycled nature of IR-UWB

transmitters. Thus, while the average power may be low,

a large high-quality power supply with a large battery of

capacitor is required to supply large peak currents, which

may be prohibitively large for many ECoG applications.

Moreover, since IR-UWB operates at very high frequency over 3 GHz, tissue absorption rate is higher.

In contrast to far-field communication methods, near-

field radios operate over short distances, typically within

one wavelength of the carrier frequency, and are thus

suitable for use when an external device is located di-

rectly on the head. In fact, since this configuration is

naturally present in wirelessly powered devices, near-

field communication can easily be implemented along with this wireless powering. One of the most popular

data communication methods that can be implemented

along with forward power delivery is the backscattering

method [169]–[173]. This method modulates the load

conditions of forward powering signals, and reflecting

this energy back to the interrogator. Since only a single

switch needs to be driven, the power consumed on the

Fig. 6. (a) Relative permittivity and specific conductivity over frequency range from 10 to 100 GHz with most popular

frequency communication bands for ECoG implants [127], [128].

(b) Relative permittivity and (c) specific conductivity of various

kinds of tissues including skin, fat, skull, CSF, gray and white

matter [129].

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implant side is minimal, as carrier generation and active driving of an antenna are not required. Since, with this

technology, a few picojoules per bit to tens of picojoules

per bit can be achieved [173], it has been widely adopted

by various IMDs [66], [86], [174]–[178]. However, exter-

nal data reception in backscattering systems can be

challenging in some cases because of the large power dif-

ference between the large power carrier signal and the

weak backscattered signal. Forward telemetry for neural recording IMDs is typi-

cally used for sending configuration bits to the implant,

requiring a relatively low data rate typically much less

than 100 kb/s. Hence, amplitude shift keying (ASK) has

been widely employed in such IMDs [88], [179], [180],

modulating the power carrier signals. For IMDs with

stimulation capability, forward telemetry for closed-loop

operation is typically time-multiplexed with backward telemetry.

C. Hermetic Encapsulation Implanted devices containing silicon ICs need pack-

aging in a protective enclosure to mitigate corrosion and

other contamination by surrounding electrolyte in the

body [181], [182]. Thus far, titanium-, glass- or ceramic-

based enclosures have been the primary means for hermetic sealing in long-term implants, since these hard

materials have been shown to be biocompatible and

impermeable to water [181]. Even though such hard en-

closures are used in the majority of long-term implants

[6], [111], [122], [150]–[155], [159], [183], their very

large volume and weight, typically much larger than the

ICs and supporting components they contain, prohibits

their use in high-dimensional neural interfaces heavily constrained by anatomical space such as retinal prosthe-

ses [184] and �ECoG arrays [30]. In addition, hard pack- aging requires intricate methods for hermetic sealing of

feedthroughs to polymer insulated extensions of the im-

plant such as electrode array cabling, limiting the density

of electrode channels due to feedthrough channel spac-

ing requirements.

To overcome these challenges, conformal coating of integrated electronics with polymers such as polyimide,

silicone, and parylene-C have been investigated as

alternatives. They are superior over metal, glass, and

ceramic hard seals in miniaturization, flexibility, and

compatibility with the semiconductor process [185].

However, polymers are susceptible to degradation and

are not long-term impermeable to body fluids. While

polymer encapsulation has been used for relatively simple and short-term (less than 1–2 years) implants,

substantial improvements are needed for viable solu-

tions to long-term hermetic encapsulation [182], [186].

Recent next-generation advances in miniaturized her-

metic sealing of silicon integrated circuits, such as

multilayer multimaterial coating [187], and encapsula-

tion using liquid crystal polymers (LCPs) [185], are

promising developments toward highly miniaturized implantable electronics for chronic clinical use. Fur-

thermore, recent advances in dissolvable flexible elec-

tronics [188], [189] offer alternatives to hermetic

encapsulation for acute applications without the need

for post-use surgical extraction.

IV. STATE-OF-THE-ART ECoG INTERFACE SYSTEMS

Various types of implantable devices for ECoG interfaces have been developed for clinical use and neuroscience

research. Their target applications include treatment of

neurological disorders and ECoG-based BCIs. Fig. 7 illus-

trates several state-of-the-art ECoG interface systems for

clinical and research applications.

On the clinical side, implantable devices shown in

Fig. 7(a)–(c) have been developed mostly for use in

closed-loop treatment of intractable epilepsy as an alter- native to tissue resection. These devices monitor ECoG

signals and deliver stimulation to the seizure foci in re-

sponse to epileptic seizure detection. The NeuroPace

RNS System, shown in Fig. 7(a), is the first such sys-

tem to receive FDA approval for closed-loop treatment

in epilepsy patients, proven effective to reduce the fre-

quency of partial-onset seizures in human clinical trials

[191], [192]. However, clinically proven devices are severely lim-

ited in the number of ECoG channels, typically less than

ten, and rely on batteries, limiting implantation life time

up to a few years. In addition, their physical size is too

large to be implanted near the brain, so the main parts

of these systems are implanted under the chest with a

wired connection to the brain. Further developments in

ECoG technology have striven to conquer these chal- lenges: increasing number of channels, wireless power-

ing, and miniaturization.

One such device is the Wireless Implantable Multi-

channel Acquisition system for Generic Interface with

NEurons (WIMAGINE), which features up to 64 chan-

nels, targeting long-term ECoG recording fully implanted

in human patients [122] as shown in Fig. 7(d). This active

IMD (AIMD) is fully covered by a 50-mm-diameter her- metic housing made of silicone-coated titanium with a

silicone-platinum electrode array on the bottom side. Its

silicone over-molding is extended to include two anten-

nas for RF communication and wireless power transfer.

The housing fits inside of a 50-mm craniotomy, and its

upper surface is just below the skin, with the implant re-

placing the previously existing bone. Two 32-channel

ECoG recording ASICs [193] are implemented for ECoG recording, and commercial off-the-shelf components are

employed for data processing, communication, power

management, etc., leading to relatively high power

consumption—75 mW for 32 channels. Its operation and

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biocompatibility has been evaluated in vivo in nonhuman primates.

Another example is the BrainCon system with

16-channel ECoG recording and 8-channel stimulation

designed for chronic implanted use in closed-loop hu-

man BCI [158]. Shown in Fig. 7(e), this device consists

of an ECoG electrode array and an electronic package

with a magnet, an inductive coil, and electronic compo- nents for data acquisition, stimulation, and communica-

tion. Targeted for long-term recording and cortical

stimulation in human patients, it is enclosed in a her-

metic package with medical grade silicone rubber [156],

[157], and was validated in vivo for more than ten months [158].

Further miniaturization and advances in functionality

have been pursued through integration of circuits for

ECoG recording, wireless powering, and wireless com-

munication as shown in Fig. 7(f)–(j). In addition, low-

cost ECoG interfaces shown in Fig. 7(k) for acute animal

research have been developed [163], as have ECoG inter-

faces with transparent electrode arrays for compatibility

with optogenetic stimulation shown in Fig. 7(l) [27]. Each of these devices offers substantial advances in

wireless and integrated ECoG technology with improved

functionality and increased density and channel counts.

Yet, most rely on substantial cabling in connecting to the

array of electrodes, or at least a wired connection to a

distal ground as reference.

Fig. 7. State-of-the-art ECoG interfacing systems. (a) NeuroPace RNS system [150], [151]. (b) NeuroVista seizure advisory system [111], [152], [153]. (c) The neural interface (NI) system of Medtronic [154], [155]. (d) The Wireless Implantable Multi-channel Acquisition

system for Generic Interface with NEurons (WIMAGINE) [122]. (e) BrainCon system for a general-purpose medical BCI [156]–[158].

(f) The Wireless Human ECoG-based Real-time BMI System (W-HERBS) [6], [159]. (g) �ECoG recording system of Cortera

Neurotechnologies, Inc. [66], [160]. (h) A ECoG recording system with bidirectional capacitive data Telemetry [161]. (i) An ECoG

recording system with a carbon nanotube microelectrode array and a corresponding IC [34]. (j) A wireless ECoG interface system with

a 64-channel ECoG recording application-specific integrated circuit (ASIC) [162]. (k) An 8-channel low-cost wireless neural signal

acquisition system made with off-the-shelf components [163]. (l) �ECoG recording system with an electrode array fabricated on a

transparent polymer for optogenetics-based stimulation [27].

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V. FULLY INTEGRATED MODULAR �ECoG RECORDING AND STIMULATION

A. Encapsulated Neural Interfacing Acquisition Chip (ENIAC)

As highlighted above, most current state-of-the-art

ECoG ASICs rely on external components, such as flexi-

ble substrates, electrode arrays, and antennas [27], [30], [66], [122], [156]–[158], [161], [162]. In doing so, inte-

gration of all the components into a complete system

requires special fabrication processes, and, importantly,

requires a large number of connections between the

readout ASIC and the electrodes, which are very diffi-

cult to manage in a hermetic environment. Further-

more, electrodes typically make direct metal-electrolyte

contact to the surrounding tissue, which can lead to generation of toxic byproducts during electrical stimula-

tion. In addition, most systems do not support electrical

stimulation, while those that do offer limited stimula-

tion efficiency, or require large external components

for efficient operation. Finally, the silicon area occupied

by the ASIC limits the span and density of electrodes

across the cortical surface. For ultrahigh channel count

experiments, as needed for next-generation neurosci- ence and called for by several brain initiatives, such

limitations must be overcome.

Instead of separating the electrodes and the ASIC, a

promising approach that we present below is to integrate

everything on a single encapsulated neural interfacing

and acquisition chip (ENIAC), including electrodes, an-

tennas for power and data telemetry, and all other cir-

cuits and components [88]. Thus, no external wires,

substrates, batteries, or any other external components

are required. Complete encapsulation of the ENIAC with a biocompatible material removes direct contact to tis-

sue, including the electrodes for recording and stimula-

tion. As such, the chip itself serves as a complete

standalone neural interfacing system.

As shown in Fig. 8 the ENIAC is designed to be small

enough ð3 � 3 � 0:25 mm3Þ to be placed among the folds and curves of the cortical surface [see Fig. 2(b)],

and to be implanted through small skull fissures. Hence it offers greater coverage of the cortical surface while be-

ing much less obtrusive than other minimally invasive

ECoG approaches, permitting even insertion without sur-

gery. As seen in the block diagram in Fig. 8, the chip

contains an LC resonant tank, electrodes, recording

channels, stimulator, power management units, and bidi-

rectional communication circuits.

Its first prototype, fabricated in a 180-�m CMOS silicon-on-insulator (SOI) process, is shown on the upper

right side of Fig. 8. With two turns and 100-�m

Fig. 8. Encapsulated neural interfacing acquisition chip (ENIAC) [88], [190]. (a) System diagram showing the fully integrated functionality of the ENIAC comprising on-chip antenna, electrodes, and all the circuitry for power management, communication, ECoG

recording and stimulation. No external components are needed, and galvanic contact to surrounding tissue is completely eliminated in

the fully encapsulated device. (b) Chip micrograph and dimensions of the prototype ENIAC.

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thickness, the on-chip coil results in an inductance of 23.7 nH. The same single coil is shared for wireless

power transfer and bidirectional RF communication.

Sixteen electrodes, which can be individually configured

as recording or stimulating channels, are integrated di-

rectly on the top metal layer of the chip. To enhance en-

ergy efficiency and remove the need for separate

rectification and regulation stages, an integrated resonant

regulating rectifier IR3 [190] is implemented. In addition, an adiabatic stimulator generates constant-current stimu-

lation pulses from the RF power input in an adiabatic

manner, much more energy efficient than conventional

stimulation from dc static power supplies.

B. Power and Communication As highlighted in Section III-A, RF inductive powering

is the most efficient means for power delivery at this im- plantation depth, and has been adopted in ENIAC. To

model the inductive link through tissue, a detailed finite

element method (FEM) model of the octagonal loop trans-

mitter antenna and the 3 � 3 � mm2 ENIAC shown in Fig. 9(a) was constructed in ANSYS HFSS, using tissue

spectral permittivity and absorption properties as shown in

Fig. 6(b) and (c). Optimal power transfer between the

transmitter coil and ENIAC is reached at a resonance fre- quency of 190 MHz as shown in Fig. 9(b). At this fre-

quency, substantially more than the required 2-mW power

can be delivered under the specific absorption rate (SAR)

limit (2 W/kg in IEEE std. 1528). Fig. 9(c) shows the maxi-

mum transmit power at the SAR limit, and corresponding

maximum deliverable power at the implant, for varying

distance of the air gap between the loop transmitter and

the scalp. The optimal distance for maximum power deliv- ery, trading between reduced SAR-limited transmit power

at lower distance and increased path losses at higher dis-

tance [194], was found to be around 5 mm.

ENIAC minimizes power losses in the received power

from the RF coil owing to an integrated resonant regulat-

ing rectifier ðIR3Þ architecture that combines power management stages of rectification, regulation, and dc

conversion, eliminating typical losses due to inefficien- cies at each stage when implemented separately. As illus-

trated in Fig. 10(a), IR3 generates a constant power

supply 0.8 V independent of fluctuation in the LC tank

voltages. IR3 operates by adapting both width and fre-

quency of pulsed rectifier switching based on a feedback

signal derived from VDD [190]. Concurrently, the amplitude-shift-keying (ASK) de-

modulator tracks and amplifies the envelope of the LC tank voltages to decode transmitted configuration data as

illustrated on the bottom of Fig. 10(a). The ASK commu-

nication is used to wirelessly configure the operation

modes and parameters of the chip. To synchronize data

reception, a 16-b predetermined identification code is

used as prefix followed by serial peripheral interface

(SPI) signals.

Fig. 10(b) shows test setup and sample data for the

IR3 power delivery and the ASK data transmission. For these tests, a primary coil built on a printed-circuit board

Fig. 9. (a) Three-dimensional finite element method (FEM) modeling of brain tissue layers between external transmitter and

implanted ENIAC. (b) Simulated forward transmission coefficient

S21 and maximum available gain (MAG) from the transmitter to

the implanted ENIAC. The optimal frequency for wireless power

transfer is around 190 MHz. (c) Maximum transmit power limited

by specific absorption rate (SAR) and maximum receivable power

at the implanted ENIAC, as a function of distance of air gap

between the transmitter and the scalp, optimum around 5 mm.

Green arrows denote minimum path losses at each air distance.

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was placed 1 cm above the ENIAC. The top right panel

in Fig. 10(b) shows the measured coil voltages simulta-

neously rectified and regulated by the IR3 [190], [195]

to produce the supply voltage VDD � 0:8 V. The total transmitted power is about 5 mW, of which around

80 �W is received by the ENIAC. The bottom panel of Fig. 10(b) shows the AM modulated input on the

primary side, and the demodulated ASK signal in the ENIAC.

C. Recording The recording module integrates 16 AFEs, a 16:1

analog multiplexer (MUX), and an analog-to-digital

converter (ADC) as shown in Fig. 11(a). Each of the 16 capacitively coupled electrodes is connected either to

its local AFE channel, or to the global stimulator, multi-

plexed by a high-voltage tolerant switch matrix. The AFE

amplifies the biopotential VIN1 from the capacitively coupled noncontact electrode with two amplification

stages and a common-mode averaging circuit. The common-

mode averaging circuit constructs a single reference signal

VAVG as the average of all VINi electrode voltages through capacitive division. Similar to differential recording across

a pair of adjacent electrodes (Section II-A1), the internal

common-mode reference VAVG allows single-ended record- ing over all 16 electrodes without the need for a distal

external ground connection. A pMOS-based pseudoresis-

tor [in the inset of Fig. 11(a)] is used to set the dc oper-

ating point at VREF for the capacitive division to allow for very high (T�-range) resistance in very small silicon area [40], [196].

The first low-noise amplifier stage has a noninverting

configuration with a feedback capacitor C1 and a common- mode coupling capacitor of 39 � C1, which connects to the common-mode averaging node VAVG, resulting in a differential voltage gain of 40 (V/V). VAVG is buffered and used for common-mode rejection in the second AFE

stage. The second AFE stage provides variable gain by manipulating the connections of two capacitors, con-

nected either as input or as feedback capacitors [46],

[54]. Output signals of the AFEs are multiplexed and

buffered to the SAR ADC, which has time-interleaving

sample-and-hold input DACs to ensure longer sampling

time, leading to power saving in buffering the input

DAC of the ADC.

Measurement results for the AFE, characterizing its frequency response and noise performance, are shown in

Fig. 11(b) and (c). Variable 50–70-dB gain is supported,

Fig. 11. (a) Circuit diagram of the recording module of ENIAC with 16 AFE channels, 16:1 analog multiplexer (MUX), and successive

approximation register (SAR) ADC. (b) Measured frequency and

noise characteristics of one AFE channel.

Fig. 10. (a) System diagram of ENIAC power management and ASK forward communication, sharing the same single on-chip

loop antenna. The integrated resonant regulating rectifier ðIR3Þ generates a stable 0.8-V dc output voltage directly from the

190-MHz RF coil voltage while the ASK demodulator decodes and

amplifies the modulated signal. (b) Simplified test setup for

wireless powering and communication along with measurement

samples at the transmitter and the receiver.

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and the input-referred noise is 1.5 �Vrms at 2.45 �A sup- ply current for a noise efficiency factor (NEF) of 4.

D. Stimulation As illustrated in Fig. 12(a), ENIAC on-chip electrodes

are implemented on top metal, as used for bond pads

and on-chip inductors. The exposed electrodes allow for

direct coating with a thin film of high-k materials such

as TiO2/ZrO2 to achieve high capacitance for high charge

delivery capacity. With 30-nm coating and 250 � 250 �m2 area, the coupling capacitance CEL is about 1.5 nF, one order of magnitude smaller than that of a

platinum electrode of same area. Total deliverable charge

per phase Qph can be expressed as

Qph ¼ ISTM � Tph ¼ CEL � VDD STM (4)

where ISTM is the stimulation current, Tph the time dura- tion of the phase, and VDD STM the total voltage dynamic excursion. Relatively low capacitance CEL can thus be compensated by an increased total voltage excursion

VDD STM to deliver the required charge per stimulation phase. In order to achieve Qph ¼ 10 nC per stimulation phase, needed for effective neural stimulation under typi- cal electrophysiological conditions, a dynamic voltage rail

with a total excursion of more than eight times the static

supply voltage VDDð¼ 0:8 VÞ is required. Conventionally, this can be implemented by generating

the required high power supply voltages and supplying con-

stant currents from fixed power rails. However, drawing

currents in this manner incurs large energy penalties due

to the large voltage drop across the current source. Instead, a much better way to perform stimulation is

to slowly ramp up the supply rails in an adiabatic fashion

to minimize the voltage drop across the current source.

Generation of the adiabatic voltage rails can be imple-

mented in various ways. External capacitors [89] or an

external inductor [90] can be employed. Alternatively,

pulse width control in rectifier can be used [199]. How-

ever, all of these methods have output ranges within the LC tank swing voltages or VDD. Recently, on-chip charge pumps are employed to generate a wide voltage excur-

sion for adiabatic stimulation [87]. Because this approach

utilizes the dc power supply as the input of charge

pumps, series of power efficiency loss cannot be avoided

in implantation settings. In addition, this method could

generate discrete levels of power supplies only, so the

energy losses due to the voltage drops across the current source were considerable.

In contrast, ENIAC implements an adiabatic stimula-

tor that generates, at minimum energy losses, ramping

voltage power rails with greater than eight times the

voltage excursion of the LC tank, and with no need for

any external components. Consistent with the observa-

tions in Section II-A2, differential adiabatic stimulation

across a selected pair of electrodes is implemented, since

Fig. 13. Measured stimulation voltage and current waveforms with platinum model electrode.

Fig. 12. (a) Simplified stackup of ENIAC showing an electrode coated with high-k materials for capacitive interface.

(b) Principle of adiabatic stimulation with ENIAC. During the first

phase, adiabatic voltage rails are generated directly from the LC

tank for energy-efficient stimulation. During the second phase,

the energy stored across the capacitive electrodes is replenished

for further energy savings.

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the miniaturized and enclosed ENIAC system permits

no access to a distal ground electrode. As illustrated in

Fig. 12(b), the ENIAC stimulator operates in two

phases. During the first phase, constant complementary

currents are provided through the differential capacitive

electrodes. The ramping voltage adiabatic power rails VDD STM and VSS STM providing the complementary cur- rents are generated directly from the LC tank utilizing a

foldable stack of rectifiers. During the second phase en-

ergy is replenished by returning the charge stored on

the electrode capacitors to the system VDD and VSS for reuse by other ENIAC modules. For triphasic rather

than biphasic stimulation, as shown, the two phases are

repeated but now with opposite polarity. This is accom- plished by swapping the electrode connections through

the switch matrix prior to executing the same two-phase

sequence. Finally, the electrodes are shorted to even out

any residual charge on the electrode capacitors.

Fig. 13 shows measured voltage and current wave-

form for the triphasic stimulation with a platinum model

electrode, consistent with the model in Fig. 12(b), and

showing 145 �A of current delivered per electrode

channel. This is four times larger than other integrated

ECoG systems even though no external components

are used and system volume is substantially smaller

(Table 2).

VI. CONCLUDING REMARKS

In this work, we highlighted the importance of high den-

sity electrocorticography for brain activity mapping,

brain–computer interfaces, and treatments for neurologi-

cal disorders. We reviewed the critical design challenges

on fully implantable ECoG interface systems in their ma-

jor aspects including electrode interface, recording and

stimulation circuitry, wireless power and data communi-

cations. In addition, we surveyed state-of-the-art systems at the forefront of clinical and research applications and

noted the rapid evolution of the technology in the past

few years. Finally, we make the case for a new type of de-

vice that promises to expand the applications of implant-

able brain monitoring: modular �ECoG. We demonstrate a new approach to miniaturization of modular �ECoG with our fully integrated encapsulated neural interfacing

acquisition chip (ENIAC). This system on a chip is capa- ble of recording, stimulation, wireless power conditioning

and bidirectional communication without the need for

any external components. Its major specifications, perfor-

mances, and functionalities are summarized in compari-

son with other state-of-the-art ECoG interface systems in

Table 2. Having a fully integrated neural interface sys-

tem, including electrodes and antenna is a new milestone

for miniaturization that sets the stage for exciting clinical and research developments. h

Table 2 Comparison of State-of-the-Art Wireless Integrated ECoG Recording and Stimulation Systems

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Acknowledgment

The authors would like to thank V. Gilja, S. Dayeh,

E. Halgren, B. McNaughton, and J. Viventi for critical

input and stimulating discussions on clinical and funda-

mental neuroscience applications of high-density ECoG

neural interfaces.

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ABOUT THE AUTHORS

Sohmyung Ha (Member, IEEE) received the B.S.

(summa cum laude) and M.S. degrees in electrical

engineering from the Korea Advanced Institute

of Science and Technology (KAIST), Daejeon,

South Korea, in 2004 and 2006 and the M.S. and

Ph.D. degrees in bioengineering from the Univer-

sity of California San Diego, La Jolla, CA, USA, in

2015 and 2016, respectively.

From 2006 to 2010, he worked as an Analog

and Mixed-Signal Circuit Designer at Samsung

Electronics Inc., Yongin, Korea, where he was a part of the engineering

team responsible for several of the world best-selling multimedia de-

vices, smartphones and TVs. As of September 2016, he joins New York

University Abu Dhabi, UAE, as an Assistant Professor in Electrical Engi-

neering. His research aims at advancing the engineering and applica-

tions of silicon-integrated technology interfacing with biology in a

variety of forms ranging from implantable biomedical devices to unob-

trusive wearable sensors.

Dr. Ha received the Fulbright Fellowship from 2010 to 2012, and the

Engelson Ph.D. Thesis Award from the Department of Bioengineering,

University of California San Diego, in 2016.

Abraham Akinin (Student Member, IEEE) was

born in Caracas, Venezuela. He received the B.S.

degree in biomedical engineering and physics

from the University of Miami, Coral Gables, FL,

USA, in 2010. He is currently working toward the

Ph.D. degree at the Bioengineering Department

and the Institute for Neural Computation, Univer-

sity of California San Diego, La Jolla, CA, USA.

His research interests include design of

closed-loop neuroprosthetics and biomedical in-

strumentation to restore sensory and cognitive function.

Jiwoong Park (Student Member, IEEE) received

the B.Sc. degree in electronic and computer

engineering from Hanyang University, Seoul,

South Korea, in 2012 and the M.S. degree in

electrical and computer engineering from the Uni-

versity of California San Diego (UCSD), La Jolla,

CA, USA, in 2014, where he is currently working

toward the Ph.D. degree.

His research interests include the design of

ultralow power body area network systems and

the design of miniaturized wireless power transfer systems for biomed-

ical implants.

Chul Kim (Student Member, IEEE) received the

B.S. degree from Kyungpook National University,

Daegu, South Korea, in 2007 and the M.S. degree

from Korea Advanced Institute of Science and

Technology (KAIST), Daejeon, South Korea, in

2009, both in electrical engineering. He is

currently working toward the Ph.D. degree in

the Bioengineering Department, University of

California San Diego, La Jolla, CA, USA.

During 2009–2012, he worked for SK HYNIX

as a Power Circuitry Designer for DRAM. His research focuses on

designing micropower integrated circuits and systems for biomedical

applications and brain-machine interfaces.

32 Proceedings of the IEEE | Vol. 105, No. 1, January 2017

Ha et al.: Silicon-Integrated High-Density Electrocortical Interfaces

Authorized licensed use limited to: University of Houston. Downloaded on March 25,2020 at 04:55:14 UTC from IEEE Xplore. Restrictions apply.

Hui Wang (Student Member, IEEE) received the

B.Sc. degree in microelectronics and the S.M.

degree in circuits and systems from Shanghai

Jiao Tong University, Shanghai, China, in 2009

and 2012, respectively. He is currently working

toward the Ph.D. degree in electrical and com-

puter engineering at the University of California

San Diego (UCSD), La Jolla, CA, USA.

His research interests include the design of

fully integrated low-power acquisition platforms

for biomedical and implantable applications, ultralow-power clock

generations, and energy-efficient mixed-signal integrated circuits for

long-term environmental and medical monitoring systems.

Christoph Maier (Member, IEEE) received the

Diplom-Physiker degree from the University of

Heidelberg, Heidelberg, Germany, in 1995 and

the Dr.sc.techn. degree in electrical engineering

from the Swiss Federal Institute of Technology

Zurich, Zurich, Switzerland, in 2000.

After time in industry, he joined the Inte-

grated Systems Neuroengineering Laboratory,

University of California San Diego, La Jolla, CA,

USA, as a Postdoctoral Researcher in 2010. His

main research interests are interfaces for electrophysiological signals

and modeling neural networks in analog VLSI.

Patrick P. Mercier (Member, IEEE) received the

B.Sc. degree in electrical and computer engineer-

ing from the University of Alberta, Edmonton,

AB, Canada, in 2006 and the S.M. and Ph.D.

degrees in electrical engineering and computer

science from the Massachusetts Institute of Tech-

nology (MIT), Cambridge, MA, USA, in 2008 and

2012, respectively.

He is currently an Assistant Professor in Elec-

trical and Computer Engineering at the Univer-

sity of California San Diego (UCSD), La Jolla, CA, USA, where he is also

the Co-Director of the Center for Wearable Sensors. His research inter-

ests include the design of energy-efficient microsystems, focusing on

the design of RF circuits, power converters, and sensor interfaces for

miniaturized systems and biomedical applications.

Prof. Mercier received a Natural Sciences and Engineering Council of

Canada (NSERC) Julie Payette fellowship in 2006, NSERC Postgraduate

Scholarships in 2007 and 2009, an Intel Ph.D. Fellowship in 2009, the

2009 ISSCC Jack Kilby Award for Outstanding Student Paper at ISSCC

2010, a Graduate Teaching Award in Electrical and Computer Engineer-

ing at UCSD in 2013, the Hellman Fellowship Award in 2014, the Beck-

man Young Investigator Award in 2015, the DARPA Young Faculty

Award in 2015, and the UCSD Academic Senate Distinguished Teaching

Award in 2016. He currently serves as an Associate Editor of the IEEE

TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS and the IEEE TRANSAC-

TIONS ON VERY LARGE SCALE INTEGRATION, and is coeditor of Ultra-Low-

Power Short-Range Radios (New York, NY, USA: Springer-Verlag, 2015),

and Power Management Integrated Circuits (Boca Raton, FL, USA: CRC

Press, 2016).

Gert Cauwenberghs (Fellow, IEEE) received the

M.Eng. degree in applied physics from the Uni-

versity of Brussels, Brussels, Belgium, in 1988

and the M.S. and Ph.D. degrees in electrical engi-

neering from the California Institute of Technol-

ogy, Pasadena, CA, USA, in 1989 and 1994,

respectively.

Currently, he is a Professor of Bioengineering

at the University of California San Diego, La Jolla,

CA, USA, where he codirects the Institute for

Neural Computation, participates as a member of the Institute of Engi-

neering in Medicine, and serves on the Computational Neuroscience Ex-

ecutive Committee of the Department of Neurosciences graduate

program. Previously, he was Professor of Electrical and Computer Engi-

neering at Johns Hopkins University, Baltimore, MD, USA and Visiting

Professor of Brain and Cognitive Science at the Massachusetts Institute

of Technology, Cambridge, MA, USA. He cofounded and chairs the Sci-

entific Advisory Board of Cognionics Inc. His research focuses on micro-

power biomedical instrumentation, neuron–silicon and brain–machine

interfaces, neuromorphic engineering, and adaptive intelligent systems.

Dr. Cauwenberghs received the National Science Foundation Career

Award in 1997, the Office of Naval Research (ONR) Young Investigator

Award in 1999, and the Presidential Early Career Award for Scientists

and Engineers in 2000. He was Francqui Fellow of the Belgian Ameri-

can Educational Foundation. He was a Distinguished Lecturer of the

IEEE Circuits and Systems Society in 2002–2003. He served IEEE in a

variety of roles including as General Chair of the IEEE Biomedical Cir-

cuits and Systems Conference (BioCAS 2011, San Diego), as Program

Chair of the IEEE Engineering in Medicine and Biology Conference

(EMBC 2012, San Diego), and as Editor-in-Chief of the IEEE TRANSACTIONS

ON BIOMEDICAL CIRCUITS AND SYSTEMS.

Vol. 105, No. 1, January 2017 | Proceedings of the IEEE 33

Ha et al.: Silicon-Integrated High-Density Electrocortical Interfaces

Authorized licensed use limited to: University of Houston. Downloaded on March 25,2020 at 04:55:14 UTC from IEEE Xplore. Restrictions apply.

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