Digital Circuits Lab Report
7447_datasheet.pdf
© 2001 Fairchild Semiconductor Corporation DS006518 www.fairchildsemi.com
September 1986
Revised July 2001
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DM7446A, DM7447A BCD to 7-Segment Decoders/Drivers
General Description The DM7446A and DM7447A feature active-LOW outputs designed for driving common-anode LEDs or incandescent indicators directly. All of the circuits have full ripple-blank- ing input/output controls and a lamp test input. Segment identification and resultant displays are shown on a follow- ing page. Display patterns for BCD input counts above nine are unique symbols to authenticate input conditions.
All of the circuits incorporate automatic leading and/or trail- ing-edge, zero-blanking control (RBI and RBO). Lamp test (LT) of these devices may be performed at any time when the BI/RBO node is at a HIGH logic level. All types contain an overriding blanking input (BI) which can be used to con- trol the lamp intensity (by pulsing) or to inhibit the outputs.
Features ■ All circuit types feature lamp intensity modulation
capability
■ Open-collector outputs drive indicators directly
■ Lamp-test provision
■ Leading/trailing zero suppression
Ordering Code:
Connection Diagram
Order Number Package Number Package Description
DM7446AN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
DM7447AN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
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A Function Table
H = HIGH level, L = LOW level, X = Don’t Care
Note 1: BI/RBO is a wire-AND logic serving as blanking input (BI) and/or ripple-blanking output (RBO).
Note 2: The blanking input (BI) must be OPEN or held at a HIGH logic level when output functions 0 through 15 are desired. The ripple-blanking input (RBI) must be OPEN or HIGH if blanking of a decimal zero is not desired.
Note 3: When a LOW logic level is applied directly to the blanking input (BI), all segment outputs are HIGH regardless of the level of any other input.
Note 4: When ripple-blanking input (RBI) and inputs A, B, C, and D are at a LOW level with the lamp test input HIGH, all segment outputs go H and the rip- ple-blanking output (RBO) goes to a LOW level (response condition).
Note 5: When the blanking input/ripple-blanking output (BI/RBO) is OPEN or held HIGH and a LOW is applied to the lamp-test input, all segment outputs are L .
Logic Diagram
Decimal or Inputs BI/RBO Outputs Note
Function LT RBI D C B A (Note 1) a b c d e f g
0 H H L L L L H L L L L L L H
1 H X L L L H H H L L H H H H
2 H X L L H L H L L H L L H L
3 H X L L H H H L L L L H H L
4 H X L H L L H H L L H H L L
5 H X L H L H H L H L L H L L
6 H X L H H L H H H L L L L L
7 H X L H H H H L L L H H H H (Note 2)
8 H X H L L L H L L L L L L L
9 H X H L L H H L L L H H L L
10 H X H L H L H H H H L L H L
11 H X H L H H H H H L L H H L
12 H X H H L L H H L H H H L L
13 H X H H L H H L H H L H L L
14 H X H H H L H H H H L L L L
15 H X H H H H H H H H H H H H
BI X X X X X X L H H H H H H H (Note 3)
RBI H L L L L L L H H H H H H H (Note 4)
LT L X X X X X H L L L L L L L (Note 5)
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Absolute Maximum Ratings(Note 6) Note 6: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation.
Recommended Operating Conditions
Supply Voltage 7V
Input Voltage 5.5V
Operating Free Air Temperature Range 0°C to +70°C Storage Temperature Range −65°C to +150°C
Symbol Parameter Min Nom Max Units
DM7446A
VCC Supply Voltage 4.75 5 5.25 V
VIH HIGH Level Input Voltage 2 V
VIL LOW Level Input Voltage 0.8 V
VOH HIGH Level Output Voltage (a thru g) 30 V
IOH HIGH Level Output Current (BI/RBO) −0.2 µA IOL LOW Level Output Current (a thru g) 40 mA
IOL LOW Level Output Current (BI/RBO) 8 mA
TA Free Air Operating Temperature 0 70 °C DM7447A
VCC Supply Voltage 4.75 5 5.25 V
VIH HIGH Level Input Voltage 2 V
VIL LOW Level Input Voltage 0.8 V
VOH HIGH Level Output Voltage (a thru g) 15 V
IOH HIGH Level Output Current (BI/RBO) −0.2 µA IOL LOW Level Output Current (a thru g) 40 mA
IOL LOW Level Output Current (BI/RBO) 8 mA
TA Free Air Operating Temperature 0 70 °C
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A DM7446A Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Note 7: All typicals are at VCC = 5V, TA = 25°C.
Note 8: ICC is measured with all outputs OPEN and all inputs at 4.5V.
DM7446A Switching Characteristics at VCC = 5V and TA = 25°C
Symbol Parameter Conditions Min Typ
Max Units (Note 7)
VI Input Clamp Voltage VCC = Min, II = −12 mA −1.5 V
VOH HIGH Level Output VCC = Min 2.4 3.7 V
Voltage (BI/RBO) IOH = Max
ICEX HIGH Level Output VCC = Max, VO = 30V 250 µA
Current (a thru g) VIL = Max, VIH = Min
VOL LOW Level VCC = Min, IOL = Max 0.3 0.4 V
Output Voltage VIH = Min, VIL = Max
II Input Current @ Max VCC = Max, VI = 5.5V 1 mA
Input Voltage (Except BI/RBO)
IIH HIGH Level Input VCC = Max, VI = 2.4V 40 µA
Current (Except BI/RBO)
IIL LOW Level Input VCC = Max BI/RBO −4 mA
Current VI = 0.4V Others −1.6
IOS Short Circuit VCC = Max −4 mA Output Current (BI/RBO)
ICC Supply Current VCC = Max 60 103 mA
(Note 8)
Symbol Parameter Conditions Min Max Units
tPLH Propagation Delay Time CL = 15 pF 100 ns
LOW-to-HIGH Level Output RL = 120Ω
tPHL Propagation Delay Time 100 ns
HIGH-to-LOW Level Output
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DM7447A Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Note 9: All typicals are at VCC = 5V, TA = 25°C.
Note 10: ICC is measured with all outputs OPEN and all inputs at 4.5V.
DM7447A Switching Characteristics at VCC = 5V and TA = 25°C
Symbol Parameter Conditions Min Typ
Max Units (Note 9)
VI Input Clamp Voltage VCC = Min, II = −12 mA −1.5 V
VOH HIGH Level Output VCC = Min 2.4 3.7 V
Voltage (BI/RBO) IOH = Max
ICEX HIGH Level Output VCC = Max, VO = 15V 250 µA
Current (a thru g) VIL = Max, VIH = Min
VOL LOW Level Output VCC = Min, IOL = Max 0.3 0.4 V
Voltage VIH = Min, VIL = Max
II Input Current @ Max VCC = Max, VI = 5.5V 1 mA
Input Voltage
IIH HIGH Level Input Current VCC = Max, VI = 2.4V 40 µA
IIL LOW Level Input VCC = Max BI/RBO −4 mA
Current VI = 0.4V Others −1.6
IOS Short Circuit VCC = Max −4 mA Output Current (BI/RBO)
ICC Supply Current VCC = Max 60 103 mA
(Note 10)
Symbol Parameter Conditions Min Max Units
tPLH Propagation Delay Time CL = 15 pF 100 ns
LOW-to-HIGH Level Output RL = 120Ω
tPHL Propagation Delay Time 100 ns
HIGH-to-LOW Level Output
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16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user.
2. A critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
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BCD_7Seg_7447.ms14
Kmap grouping_Dont Cares.pdf
Lab4_BCD7Seg_INSTRUCTIONS.pdf
EET 271 – Winter 2018 NAME: _________________________
Lab # 4: BCD to Seven-Segment Display PART 1 - Software
Objectives:
1. Develop Karnaugh maps from given truth table 2. Determine simplified Boolean expressions for each display segment 3. Simulate BCD to 7-segment display circuit via logic gates in Multisim
Procedure:
BCD Inputs Seven Segment Outputs Decimal A B C D a b c d e f g
0 0 0 0 0 1 1 1 1 1 1 0 1 0 0 0 1 0 1 1 0 0 0 0 2 0 0 1 0 1 1 0 1 1 0 1 3 0 0 1 1 1 1 1 1 0 0 1 4 0 1 0 0 0 1 1 0 0 1 1 5 0 1 0 1 1 0 1 1 0 1 1 6 0 1 1 0 1 0 1 1 1 1 1 7 0 1 1 1 1 1 1 0 0 0 0 8 1 0 0 0 1 1 1 1 1 1 1 9 1 0 0 1 1 1 1 1 0 1 1
1. Using above Truth Table, fill out the Karnaugh maps for each output segment, then simplify.
Segment a Segment b
Segment c Segment d
Segment e Segment f
Segment g
2. Simulate the AND-OR combinational logic circuit in Multisim.
a. Multisim Tips and Tricks: i. Vcc and Ground components are found in the “Sources” menu
ii. Switches (SPDT) are found in the “Basic” menu iii. The logic gates (AND, OR, NOT) are found in the “TIL” sub-menu in the “Misc
Digital” menu iv. The 7-Segment Display (SEVEN_SEG_COM_K) can be found in the “Indicators”
menu. NOTE: This is a “Common-Cathode display”. Refer to datasheet. v. Double-click on a component to change characteristics (Labeling, control, etc)
vi. Right-click on a component for Rotation/Flip options
b. Refer to image below to help you get started:
3. Verify working circuit by comparing the decimal values displayed on 7-segment display to BCD input values. Do the input-output relationships match the truth table?
4. Name and save your Multisim file using the following convention: LASTNAME_Lab4
PART 2 - Hardware
Objectives:
1. Understand datasheets for the 7447, 7-Segment Display, and Resistor Pack ICs 2. Reference Multisim circuit in order to translate software to hardware 3. Build physical circuit using NI ELVIS and Digital Writer
Procedure:
1. Open datasheets for the following ICs a. 7447 – BCD to Seven Segment Decoder b. LTS-312AHR – Seven Segment Display
i. NOTE: This is a “Common-Anode display” pay attention to the differences between this display and the type used in the simulation.
c. Image for the 470Ω Resistor Pack IC
2. Open the Multisim file attached to the Canvas assignment. a. Click Run to begin simulation and confirm proper operation
3. Using the components supplied in the lab, construct the circuit on NI ELVIS
a. Keep your wiring clean! It will be very difficult for you to troubleshoot messy wiring. b. You will utilize the Digital Writer in the ELVISmx Instrument Launcher to control the BCD
input to the 7447
4. Demonstrate proper operation of your completed circuit to the Instructor or TA.
a. Instructor/TA initials to signify working circuit: _______________
5. Take a picture of your functioning circuit. Picture must show circuit detail.
6. CLEAN UP YOUR WORKSTATION: Remove all wires and ICs from the ELVIS unit and return to their original locations. Take extra caution to not bend pins on ICs
Lab Submission:
Submit your completed Multisim file from Part 1, AND picture of your circuit from Part 2 to Canvas by the due date. You will also submit this document to the instructor.