Programming Language and Compilers

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Programming Language & Compiler

SIMPLE MACHINE SIMULATION

The architecture of the Von Neumann Machine can be modeled with a simple machine simulation. The instructions and data are both loaded into the computer memory. The program's instruction pointer is set to the first command to be executed. The instruction pointer is incremented as the program continues to execute. The flow of control can be altered by the instructions themselves (for example, the instruction pointer can be set to "jump" to a different place rather than the next consecutive instruction). The program data is accessed by using the address of the information within the commands that are being executed. The program is terminated by a "halt" command and control is returned to the operating system so that another program may be loaded into the memory of the machine.

The architecture includes Random Access Memory (memory – divided into words which are addressed by their relative location from the beginning or 0 address), registers (special fast memory used to manipulate information – both data and commands—during program execution), an accumulator – special register used for calculations, instruction register (where instructions are loaded in order to be executed), instruction pointer or index (register with the address or index of the current instruction), a data pointer or index (register with address of next available data address in memory) and control unit (controls the loading and execution of each new instruction).

In the following exercise, you are the control unit within the CPU. The program information has been loaded into memory – modeled by using an array – and the instruction pointer has been set to the address of the first command in memory and a operation stack pointer is set to the last available element in the array. The instruction register and accumulator are cleared and ready for you to use. Instructions are loaded from address 0 up (called low memory) and the data is loaded from address 99 down.

Memory is divided into addressable words. For this exercise, we are going to assume that a word is four digits in length. Assume that the memory array can contain up to 100 addressable words, indexed from 0 to 99. Each instruction occupies one word in memory (four digits). The instructions are formatted so that the left two digits are the operation code and the right tow digits are a memory address (0..99).

Instruction format: XXYY where XX is the operation code and YY is an address in memory (0..99)

The operation codes for the Simple Machine Language are:

10 Read – reads a word from the keyboard into the specified location in memory

11 Write – writes a word from the specified location in memory to the monitor screen

20 Load – loads a word from the specified location in memory to the accumulator

21 Store – stores a word from the accumulator into the specified location in memory

30 Add – adds a word from the specified location in memory to the accumulator

31 Subtract – subtracts a word from the specified location in memory from the accumulator

32 Divide – divides a word from the specified location in memory into the accumulator

33 Multiply – multiplies a word from the specified location in memory by the accumulator

40 Branch – sets the instruction pointer to go to the specified location in memory. ( branches or jumps)

41 BranchNegative – branches to the specified location in memory if the accumulator is negative

42 BranchZero - branches to the specified location in memory if the accumulator is zero.

43 HALT - the program execution is stopped.

Example: 1009 instruction means get the input from the keyboard and store it into address 09.

SAMPLE SML PROGRAM

Example 1

Location

Number

Instruction

00

1007

Read A

01

1008

Read B

02

2007

Load A

03

3008

Add B

04

2109

Store C

05

1109

Write C

06

4300

Halt

07

0000

Variable A

08

0000

Variable B

09

0000

Result C

Example 2

Location

Number

Instruction

00

1009

Read A

01

1010

Read B

02

2009

Load A

03

3110

Subtract B

04

4107

Branch negative to 07

05

1109

Write A

06

4300

Halt

07

1110

Write B

08

4300

Halt

09

0000

Variable A

10

0000

Variable B

SIMPLE MACHINE LANGUAGE ASSEMBLER SIMULATION

Write a program to simulate the SML (Simple Machine Language Assembler). Your program must read the instructions from a source file. Prompt the user for a file name, and then read the instruction into an array in memory. The program is to simulate the accumulator, instruction pointer, and instruction register during the execution of the program. Your simulator code should actually execute the assembler commands generating input and output commands.

Help: Create a Scanner to read a String representing a file name

Then create another Scanner to read a file like Scanner inFile=new Scanner(new File(…))

… should be replaced by the name of the file.

Define an array of 100 integers like int [] memory=new int[100];

Using a loop to load the contents into the array like

int index=0;

while(inFile.hasNext())

{

memory[index]=inFile.nextInt();

index++;

}

Define a variable representing accumulator

Using a do/while loop to process array inst ….like

Define two variable representing operator and operand

Loop array memory

find operator code and operand using divide and modulo from each instruction

using switch like

switch (operator){

case 10:

memory[operand]=in.nextInt(); break;

Case 43:

While(operator!=43);

Programming Language & Compiler

SIMPLE MACHINE SIMULATION

The architecture of the Von Neumann Machine can be modeled with a simple machine

simulation. The instructions and data are both loaded into the computer memory. The

program's

instruction pointer is set to the first command to be executed. The instruction

pointer is incremented as the program continues to execute. The flow of control can be

altered by the instructions themselves (for example, the instruction pointer can be set t

o

"jump" to a different place rather than the next consecutive instruction). The program

data is accessed by using the address of the information within the commands that are

being executed. The program is terminated by a "halt" command and control is retu

rned

to the operating system so that another program may be loaded into the memory of the

machine.

The architecture includes Random Access Memory (memory

divided into words which

are addressed by their relative location from the beginning or 0 address),

registers

(special fast memory used to manipulate information

both data and commands

during

program execution), an accumulator

special register used for calculations, instruction

register (where instructions are loaded in order to be executed), instruc

tion pointer or

index (register with the address or index of the current instruction), a data pointer or

index (register with address of next available data address in memory) and control unit

(controls the loading and execution of each new instruction).

I

n the following exercise, you are the control unit within the CPU. The program

information has been loaded into memory

modeled by using an array

and the

instruction pointer has been set to the address of the first command in memory and a

operation stac

k pointer is set to the last available element in the array. The instruction

register and accumulator are cleared and ready for you to use. Instructions are loaded

from address 0 up (called low memory) and the data is loaded from address 99 down.

Memory is

divided into addressable words. For this exercise, we are going to assume that

a word is four digits in length. Assume that the memory array can contain up to 100

addressable words, indexed from 0 to 99. Each instruction occupies one word in memory

(four

digits). The instructions are formatted so that the left two digits are the operation

code and the right tow digits are a memory address (0..99).

Instruction format: XXYY where XX is the operation code and YY is an address in

memory (0..99)

The operation

codes for the Simple Machine Language are:

Programming Language & Compiler

SIMPLE MACHINE SIMULATION

The architecture of the Von Neumann Machine can be modeled with a simple machine

simulation. The instructions and data are both loaded into the computer memory. The

program's instruction pointer is set to the first command to be executed. The instruction

pointer is incremented as the program continues to execute. The flow of control can be

altered by the instructions themselves (for example, the instruction pointer can be set to

"jump" to a different place rather than the next consecutive instruction). The program

data is accessed by using the address of the information within the commands that are

being executed. The program is terminated by a "halt" command and control is returned

to the operating system so that another program may be loaded into the memory of the

machine.

The architecture includes Random Access Memory (memory – divided into words which

are addressed by their relative location from the beginning or 0 address), registers

(special fast memory used to manipulate information – both data and commands—during

program execution), an accumulator – special register used for calculations, instruction

register (where instructions are loaded in order to be executed), instruction pointer or

index (register with the address or index of the current instruction), a data pointer or

index (register with address of next available data address in memory) and control unit

(controls the loading and execution of each new instruction).

In the following exercise, you are the control unit within the CPU. The program

information has been loaded into memory – modeled by using an array – and the

instruction pointer has been set to the address of the first command in memory and a

operation stack pointer is set to the last available element in the array. The instruction

register and accumulator are cleared and ready for you to use. Instructions are loaded

from address 0 up (called low memory) and the data is loaded from address 99 down.

Memory is divided into addressable words. For this exercise, we are going to assume that

a word is four digits in length. Assume that the memory array can contain up to 100

addressable words, indexed from 0 to 99. Each instruction occupies one word in memory

(four digits). The instructions are formatted so that the left two digits are the operation

code and the right tow digits are a memory address (0..99).

Instruction format: XXYY where XX is the operation code and YY is an address in

memory (0..99)

The operation codes for the Simple Machine Language are: