Computer science lab assignment
InputOutput_MSP432asm/.ccsproject
InputOutput_MSP432asm/.cproject
InputOutput_MSP432asm/.launches/InputOutput_MSP432asm.launch
InputOutput_MSP432asm/.project
InputOutput_MSP432asm org.eclipse.cdt.managedbuilder.core.genmakebuilder org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder full,incremental, com.ti.ccstudio.core.ccsNature org.eclipse.cdt.core.cnature org.eclipse.cdt.managedbuilder.core.managedBuildNature org.eclipse.cdt.core.ccnature org.eclipse.cdt.managedbuilder.core.ScannerConfigNatureInputOutput_MSP432asm/.settings/org.eclipse.cdt.codan.core.prefs
eclipse.preferences.version=1 inEditor=false onBuild=false
InputOutput_MSP432asm/.settings/org.eclipse.cdt.debug.core.prefs
eclipse.preferences.version=1 org.eclipse.cdt.debug.core.toggleBreakpointModel=com.ti.ccstudio.debug.CCSBreakpointMarker
InputOutput_MSP432asm/.settings/org.eclipse.core.resources.prefs
eclipse.preferences.version=1 encoding//Debug/makefile=UTF-8 encoding//Debug/objects.mk=UTF-8 encoding//Debug/sources.mk=UTF-8 encoding//Debug/subdir_rules.mk=UTF-8 encoding//Debug/subdir_vars.mk=UTF-8
InputOutput_MSP432asm/Debug/InputOutput_MSP432asm.map
****************************************************************************** TI ARM Linker PC v5.2.7 ****************************************************************************** >> Linked Thu Sep 01 09:34:52 2016 OUTPUT FILE NAME: <InputOutput_MSP432asm.out> ENTRY POINT SYMBOL: "_c_int00" address: 000003ed MEMORY CONFIGURATION name origin length used unused attr fill ---------------------- -------- --------- -------- -------- ---- -------- MAIN 00000000 00040000 000004fc 0003fb04 R X INFO 00200000 00004000 00000000 00004000 R X SRAM_CODE 01000000 00010000 00000000 00010000 RW X SRAM_DATA 20000000 00010000 00000014 0000ffec RW SEGMENT ALLOCATION MAP run origin load origin length init length attrs members ---------- ----------- ---------- ----------- ----- ------- 00000000 00000000 000004fc 000004fc r-x 00000000 00000000 00000144 00000144 r-- .intvecs 00000144 00000144 000003b8 000003b8 r-x .text 20000000 20000000 00000014 00000014 rw- 20000000 20000000 00000014 00000014 rw- .data SECTION ALLOCATION MAP output attributes/ section page origin length input sections -------- ---- ---------- ---------- ---------------- .intvecs 0 00000000 00000144 00000000 00000144 msp432_startup_ccs.obj (.intvecs) .text 0 00000144 000003b8 00000144 00000102 main.obj (.text) 00000246 0000009c rtsv7M4_T_le_v4SPD16_eabi.lib : memcpy_t2.obj (.text) 000002e2 00000002 --HOLE-- [fill = 0] 000002e4 0000009a msp432_startup_ccs.obj (.text) 0000037e 00000002 --HOLE-- [fill = 0] 00000380 0000006c rtsv7M4_T_le_v4SPD16_eabi.lib : autoinit.obj (.text) 000003ec 00000050 : boot.obj (.text) 0000043c 0000004c : cpy_tbl.obj (.text) 00000488 00000044 : exit.obj (.text) 000004cc 00000018 : args_main.obj (.text) 000004e4 00000014 : _lock.obj (.text) 000004f8 00000004 : pre_init.obj (.text) .cinit 0 00000000 00000000 UNINITIALIZED .data 0 20000000 00000014 20000000 00000008 rtsv7M4_T_le_v4SPD16_eabi.lib : _lock.obj (.data) 20000008 00000008 : exit.obj (.data) 20000010 00000004 : stkdepth_vars.obj (.data) .TI.persistent * 0 20000000 00000000 UNINITIALIZED .stack 0 20010000 00000000 UNINITIALIZED GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name address name ------- ---- 00000339 ADC14_IRQHandler 00000341 AES256_IRQHandler 00000489 C$$EXIT 00000315 COMP_E0_IRQHandler 00000317 COMP_E1_IRQHandler 0000030b CS_IRQHandler 00000345 DMA_ERR_IRQHandler 0000034d DMA_INT0_IRQHandler 0000034b DMA_INT1_IRQHandler 00000349 DMA_INT2_IRQHandler 00000347 DMA_INT3_IRQHandler 00000303 DebugMon_Handler 0000035b DisableInterrupts 00000329 EUSCIA0_IRQHandler 0000032b EUSCIA1_IRQHandler 0000032d EUSCIA2_IRQHandler 0000032f EUSCIA3_IRQHandler 00000331 EUSCIB0_IRQHandler 00000333 EUSCIB1_IRQHandler 00000335 EUSCIB2_IRQHandler 00000337 EUSCIB3_IRQHandler 00000361 EnableInterrupts 00000371 EndCritical 00000313 FLCTL_IRQHandler 00000311 FPU_IRQHandler 0000030d PCM_IRQHandler 0000034f PORT1_IRQHandler 00000351 PORT2_IRQHandler 00000353 PORT3_IRQHandler 00000355 PORT4_IRQHandler 00000357 PORT5_IRQHandler 00000359 PORT6_IRQHandler 00000309 PSS_IRQHandler 00000305 PendSV_Handler 00000343 RTC_C_IRQHandler UNDEFED SHT$$INIT_ARRAY$$Base UNDEFED SHT$$INIT_ARRAY$$Limit 00000301 SVC_Handler 00000367 StartCritical 00000307 SysTick_Handler 0000033b T32_INT1_IRQHandler 0000033d T32_INT2_IRQHandler 0000033f T32_INTC_IRQHandler 00000319 TA0_0_IRQHandler 0000031b TA0_N_IRQHandler 0000031d TA1_0_IRQHandler 0000031f TA1_N_IRQHandler 00000321 TA2_0_IRQHandler 00000323 TA2_N_IRQHandler 00000325 TA3_0_IRQHandler 00000327 TA3_N_IRQHandler 4000480c WDTCTL_SYM 0000030f WDT_A_IRQHandler 00000379 WaitForInterrupt 20010000 __STACK_END 00000000 __STACK_SIZE UNDEFED __TI_CINIT_Base UNDEFED __TI_CINIT_Limit UNDEFED __TI_Handler_Table_Base UNDEFED __TI_Handler_Table_Limit 00000381 __TI_auto_init 20000008 __TI_cleanup_ptr 2000000c __TI_dtors_ptr 00000000 __TI_static_base__ 00000247 __aeabi_memcpy 00000247 __aeabi_memcpy4 00000247 __aeabi_memcpy8 ffffffff __binit__ ffffffff __c_args__ 20010000 __stack 000004cd _args_main 000003ed _c_int00 20000000 _lock 000004f3 _nop 000004eb _register_lock 000004e5 _register_unlock 000004f9 _system_pre_init 20000004 _unlock 0000048d abort ffffffff binit 0000043d copy_in 00000495 exit 00000000 interruptVectors 0000017d main 20000010 main_func_sp 00000247 memcpy GLOBAL SYMBOLS: SORTED BY Symbol Address address name ------- ---- 00000000 __STACK_SIZE 00000000 __TI_static_base__ 00000000 interruptVectors 0000017d main 00000247 __aeabi_memcpy 00000247 __aeabi_memcpy4 00000247 __aeabi_memcpy8 00000247 memcpy 00000301 SVC_Handler 00000303 DebugMon_Handler 00000305 PendSV_Handler 00000307 SysTick_Handler 00000309 PSS_IRQHandler 0000030b CS_IRQHandler 0000030d PCM_IRQHandler 0000030f WDT_A_IRQHandler 00000311 FPU_IRQHandler 00000313 FLCTL_IRQHandler 00000315 COMP_E0_IRQHandler 00000317 COMP_E1_IRQHandler 00000319 TA0_0_IRQHandler 0000031b TA0_N_IRQHandler 0000031d TA1_0_IRQHandler 0000031f TA1_N_IRQHandler 00000321 TA2_0_IRQHandler 00000323 TA2_N_IRQHandler 00000325 TA3_0_IRQHandler 00000327 TA3_N_IRQHandler 00000329 EUSCIA0_IRQHandler 0000032b EUSCIA1_IRQHandler 0000032d EUSCIA2_IRQHandler 0000032f EUSCIA3_IRQHandler 00000331 EUSCIB0_IRQHandler 00000333 EUSCIB1_IRQHandler 00000335 EUSCIB2_IRQHandler 00000337 EUSCIB3_IRQHandler 00000339 ADC14_IRQHandler 0000033b T32_INT1_IRQHandler 0000033d T32_INT2_IRQHandler 0000033f T32_INTC_IRQHandler 00000341 AES256_IRQHandler 00000343 RTC_C_IRQHandler 00000345 DMA_ERR_IRQHandler 00000347 DMA_INT3_IRQHandler 00000349 DMA_INT2_IRQHandler 0000034b DMA_INT1_IRQHandler 0000034d DMA_INT0_IRQHandler 0000034f PORT1_IRQHandler 00000351 PORT2_IRQHandler 00000353 PORT3_IRQHandler 00000355 PORT4_IRQHandler 00000357 PORT5_IRQHandler 00000359 PORT6_IRQHandler 0000035b DisableInterrupts 00000361 EnableInterrupts 00000367 StartCritical 00000371 EndCritical 00000379 WaitForInterrupt 00000381 __TI_auto_init 000003ed _c_int00 0000043d copy_in 00000489 C$$EXIT 0000048d abort 00000495 exit 000004cd _args_main 000004e5 _register_unlock 000004eb _register_lock 000004f3 _nop 000004f9 _system_pre_init 20000000 _lock 20000004 _unlock 20000008 __TI_cleanup_ptr 2000000c __TI_dtors_ptr 20000010 main_func_sp 20010000 __STACK_END 20010000 __stack 4000480c WDTCTL_SYM ffffffff __binit__ ffffffff __c_args__ ffffffff binit UNDEFED SHT$$INIT_ARRAY$$Base UNDEFED SHT$$INIT_ARRAY$$Limit UNDEFED __TI_CINIT_Base UNDEFED __TI_CINIT_Limit UNDEFED __TI_Handler_Table_Base UNDEFED __TI_Handler_Table_Limit [86 symbols]
InputOutput_MSP432asm/Debug/InputOutput_MSP432asm.out
InputOutput_MSP432asm/Debug/InputOutput_MSP432asm_linkInfo.xml
TI ARM Linker PC v5.2.7 Copyright (c) 1996-2015 Texas Instruments Incorporated 0x57c858ac 0x0 InputOutput_MSP432asm.out _c_int00 0x3ed .\ object main.obj main.obj .\ object msp432_startup_ccs.obj msp432_startup_ccs.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.7\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib boot.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.7\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib exit.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.7\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib pre_init.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.7\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib stkdepth_vars.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.7\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib _lock.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.7\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib args_main.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.7\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib autoinit.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.7\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib cpy_tbl.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.7\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib memcpy_t2.obj .intvecs 0x0 0x0 0x144 .text 0x144 0x144 0x102 .text 0x246 0x246 0x9c .text 0x2e4 0x2e4 0x9a .text 0x380 0x380 0x6c .text 0x3ec 0x3ec 0x50 .text 0x43c 0x43c 0x4c .text 0x488 0x488 0x44 .text 0x4cc 0x4cc 0x18 .text 0x4e4 0x4e4 0x14 .text 0x4f8 0x4f8 0x4 .stack true 0x20010000 0x0 .stack true 0x20010000 0x0 .data 0x20000000 0x20000000 0x8 .data 0x20000008 0x20000008 0x8 .data 0x20000010 0x20000010 0x4 .debug_info 0x0 0x0 0x227 .debug_info 0x227 0x227 0x104 .debug_info 0x32b 0x32b 0xf1 .debug_info 0x41c 0x41c 0x169d .debug_info 0x1ab9 0x1ab9 0x84 .debug_info 0x1b3d 0x1b3d 0x169 .debug_info 0x1ca6 0x1ca6 0x1a7 .debug_info 0x1e4d 0x1e4d 0x14c .debug_info 0x1f99 0x1f99 0x223 .debug_info 0x21bc 0x21bc 0x15e .debug_info 0x231a 0x231a 0x11f .debug_info 0x2439 0x2439 0x13a .debug_info 0x2573 0x2573 0x129 .debug_info 0x269c 0x269c 0x235 .debug_info 0x28d1 0x28d1 0x17c .debug_info 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.debug_str 0x2d9 0x2d9 0x1b5 .debug_str 0x48e 0x48e 0xed .debug_str 0x57b 0x57b 0x15e .debug_pubtypes 0x0 0x0 0xed .debug_pubtypes 0xed 0xed 0x1f .debug_pubtypes 0x10c 0x10c 0x1f .debug_pubtypes 0x12b 0x12b 0x1b .debug_pubtypes 0x146 0x146 0x32 .debug_pubtypes 0x178 0x178 0x50 .debug_pubtypes 0x1c8 0x1c8 0x23 .debug_pubtypes 0x1eb 0x1eb 0x1d .intvecs 0x0 0x0 0x144 .text 0x144 0x144 0x3b8 .const 0x0 0x0 .cinit 0x0 0x0 .pinit 0x0 0x0 .flashMailbox 0x0 0x0 .vtable 0x0 0x0 .sysmem 0x0 0x0 .stack 0x20010000 0x0 .TI.noinit 0x0 0x0 .bss 0x0 0x0 BSS_GROUP 0x0 0x0 .TI.persistent 0x20000000 0x0 .data 0x20000000 0x20000000 0x14 DATA_GROUP 0x20000000 0x20000000 0x14 .debug_info 0x0 0x0 0x3749 .debug_line 0x0 0x0 0xe87 .debug_abbrev 0x0 0x0 0x964 .debug_aranges 0x0 0x0 0x328 .debug_pubnames 0x0 0x0 0x6b9 .debug_frame 0x0 0x0 0x76e .debug_str 0x0 0x0 0x6d9 .debug_pubtypes 0x0 0x0 0x208 SEGMENT_0 0x0 0x0 0x4fc 0x5 SEGMENT_1 0x20000000 0x20000000 0x14 0x6 MAIN 0x0 0x0 0x40000 0x4fc 0x3fb04 RX 0x0 0x144 0x144 0x3b8 0x4fc 0x3fb04 INFO 0x0 0x200000 0x4000 0x0 0x4000 RX SRAM_CODE 0x0 0x1000000 0x10000 0x0 0x10000 RWX SRAM_DATA 0x0 0x20000000 0x10000 0x14 0xffec RW 0x20000000 0x14 0x20000014 0xffec 0x20010000 0x0 WDTCTL_SYM 0x4000480c binit 0xffffffff __binit__ 0xffffffff __STACK_SIZE 0x0 __STACK_END 0x20010000 __c_args__ 0xffffffff __TI_static_base__ 0x0 main 0x17d T32_INT2_IRQHandler 0x33d PendSV_Handler 0x305 SysTick_Handler 0x307 EUSCIA3_IRQHandler 0x32f SVC_Handler 0x301 EUSCIB1_IRQHandler 0x333 PORT4_IRQHandler 0x355 AES256_IRQHandler 0x341 FPU_IRQHandler 0x311 EUSCIB2_IRQHandler 0x335 PORT1_IRQHandler 0x34f RTC_C_IRQHandler 0x343 TA2_0_IRQHandler 0x321 TA3_N_IRQHandler 0x327 DMA_INT3_IRQHandler 0x347 PORT2_IRQHandler 0x351 StartCritical 0x367 TA0_0_IRQHandler 0x319 PSS_IRQHandler 0x309 TA1_N_IRQHandler 0x31f EUSCIA1_IRQHandler 0x32b EUSCIA2_IRQHandler 0x32d COMP_E0_IRQHandler 0x315 WDT_A_IRQHandler 0x30f EUSCIB0_IRQHandler 0x331 FLCTL_IRQHandler 0x313 EndCritical 0x371 DMA_INT1_IRQHandler 0x34b PCM_IRQHandler 0x30d ADC14_IRQHandler 0x339 T32_INTC_IRQHandler 0x33f DMA_INT2_IRQHandler 0x349 TA3_0_IRQHandler 0x325 EUSCIA0_IRQHandler 0x329 DMA_ERR_IRQHandler 0x345 DisableInterrupts 0x35b PORT5_IRQHandler 0x357 TA1_0_IRQHandler 0x31d TA2_N_IRQHandler 0x323 COMP_E1_IRQHandler 0x317 EUSCIB3_IRQHandler 0x337 WaitForInterrupt 0x379 interruptVectors 0x0 EnableInterrupts 0x361 PORT6_IRQHandler 0x359 TA0_N_IRQHandler 0x31b T32_INT1_IRQHandler 0x33b DebugMon_Handler 0x303 DMA_INT0_IRQHandler 0x34d PORT3_IRQHandler 0x353 CS_IRQHandler 0x30b _c_int00 0x3ed __stack 0x20010000 C$$EXIT 0x489 abort 0x48d exit 0x495 __TI_dtors_ptr 0x2000000c __TI_cleanup_ptr 0x20000008 _system_pre_init 0x4f9 main_func_sp 0x20000010 _nop 0x4f3 _lock 0x20000000 _unlock 0x20000004 _register_lock 0x4eb _register_unlock 0x4e5 _args_main 0x4cd __TI_auto_init 0x381 copy_in 0x43d memcpy 0x247 __aeabi_memcpy 0x247 __aeabi_memcpy8 0x247 __aeabi_memcpy4 0x247 __TI_Handler_Table_Base 0x0 __TI_Handler_Table_Limit 0x0 __TI_CINIT_Limit 0x0 __TI_CINIT_Base 0x0 SHT$$INIT_ARRAY$$Limit 0x0 SHT$$INIT_ARRAY$$Base 0x0InputOutput_MSP432asm/Debug/ccsObjs.opt
"./main.obj" "./msp432_startup_ccs.obj" "../msp432p401r.cmd" -l"libc.a"
InputOutput_MSP432asm/Debug/main.obj
InputOutput_MSP432asm/Debug/makefile
################################################################################ # Automatically-generated file. Do not edit! ################################################################################ SHELL = cmd.exe CG_TOOL_ROOT := C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7 GEN_OPTS__FLAG := GEN_CMDS__FLAG := ORDERED_OBJS += \ "./main.obj" \ "./msp432_startup_ccs.obj" \ "../msp432p401r.cmd" \ $(GEN_CMDS__FLAG) \ -l"libc.a" \ -include ../makefile.init RM := DEL /F RMDIR := RMDIR /S/Q # All of the sources participating in the build are defined here -include sources.mk -include subdir_vars.mk -include subdir_rules.mk -include objects.mk ifneq ($(MAKECMDGOALS),clean) ifneq ($(strip $(S_DEPS)),) -include $(S_DEPS) endif ifneq ($(strip $(S_UPPER_DEPS)),) -include $(S_UPPER_DEPS) endif ifneq ($(strip $(S62_DEPS)),) -include $(S62_DEPS) endif ifneq ($(strip $(C64_DEPS)),) -include $(C64_DEPS) endif ifneq ($(strip $(ASM_DEPS)),) -include $(ASM_DEPS) endif ifneq ($(strip $(CC_DEPS)),) -include $(CC_DEPS) endif ifneq ($(strip $(S55_DEPS)),) -include $(S55_DEPS) endif ifneq ($(strip $(C67_DEPS)),) -include $(C67_DEPS) endif ifneq ($(strip $(CLA_DEPS)),) -include $(CLA_DEPS) endif ifneq ($(strip $(C??_DEPS)),) -include $(C??_DEPS) endif ifneq ($(strip $(CPP_DEPS)),) -include $(CPP_DEPS) endif ifneq ($(strip $(S??_DEPS)),) -include $(S??_DEPS) endif ifneq ($(strip $(C_DEPS)),) -include $(C_DEPS) endif ifneq ($(strip $(C62_DEPS)),) -include $(C62_DEPS) endif ifneq ($(strip $(CXX_DEPS)),) -include $(CXX_DEPS) endif ifneq ($(strip $(C++_DEPS)),) -include $(C++_DEPS) endif ifneq ($(strip $(ASM_UPPER_DEPS)),) -include $(ASM_UPPER_DEPS) endif ifneq ($(strip $(K_DEPS)),) -include $(K_DEPS) endif ifneq ($(strip $(C43_DEPS)),) -include $(C43_DEPS) endif ifneq ($(strip $(INO_DEPS)),) -include $(INO_DEPS) endif ifneq ($(strip $(S67_DEPS)),) -include $(S67_DEPS) endif ifneq ($(strip $(SA_DEPS)),) -include $(SA_DEPS) endif ifneq ($(strip $(S43_DEPS)),) -include $(S43_DEPS) endif ifneq ($(strip $(OPT_DEPS)),) -include $(OPT_DEPS) endif ifneq ($(strip $(PDE_DEPS)),) -include $(PDE_DEPS) endif ifneq ($(strip $(S64_DEPS)),) -include $(S64_DEPS) endif ifneq ($(strip $(C_UPPER_DEPS)),) -include $(C_UPPER_DEPS) endif ifneq ($(strip $(C55_DEPS)),) -include $(C55_DEPS) endif endif -include ../makefile.defs # Add inputs and outputs from these tool invocations to the build variables EXE_OUTPUTS += \ InputOutput_MSP432asm.out \ EXE_OUTPUTS__QUOTED += \ "InputOutput_MSP432asm.out" \ BIN_OUTPUTS += \ InputOutput_MSP432asm.hex \ BIN_OUTPUTS__QUOTED += \ "InputOutput_MSP432asm.hex" \ # All Target all: InputOutput_MSP432asm.out # Tool invocations InputOutput_MSP432asm.out: $(OBJS) $(CMD_SRCS) $(GEN_CMDS) @echo 'Building target: $@' @echo 'Invoking: MSP432 Linker' "C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/bin/armcl" -mv7M4 --code_state=16 --float_support=FPv4SPD16 --abi=eabi -me --advice:power=all -g --gcc --define=__MSP432P401R__ --define=TARGET_IS_MSP432P4XX --define=ccs --diag_wrap=off --display_error_number --diag_warning=225 -z -m"InputOutput_MSP432asm.map" --heap_size=0 --stack_size=0 --cinit_hold_wdt=off -i"C:/ti/ccsv6/ccs_base/arm/include" -i"C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/lib" -i"C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/include" --reread_libs --display_error_number --diag_wrap=off --warn_sections --xml_link_info="InputOutput_MSP432asm_linkInfo.xml" -o "InputOutput_MSP432asm.out" $(ORDERED_OBJS) @echo 'Finished building target: $@' @echo ' ' InputOutput_MSP432asm.hex: $(EXE_OUTPUTS) @echo 'Invoking: MSP432 Hex Utility' "C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/bin/armhex" -o "InputOutput_MSP432asm.hex" $(EXE_OUTPUTS__QUOTED) @echo 'Finished building: $@' @echo ' ' # Other Targets clean: -$(RM) $(EXE_OUTPUTS__QUOTED)$(BIN_OUTPUTS__QUOTED) -$(RM) "msp432_startup_ccs.pp" -$(RM) "main.obj" "msp432_startup_ccs.obj" -$(RM) "main.pp" -@echo 'Finished clean' -@echo ' ' .PHONY: all clean dependents .SECONDARY: -include ../makefile.targets
InputOutput_MSP432asm/Debug/msp432_startup_ccs.obj
InputOutput_MSP432asm/Debug/msp432_startup_ccs.pp
# FIXED msp432_startup_ccs.obj: ../msp432_startup_ccs.c msp432_startup_ccs.obj: C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/include/stdint.h ../msp432_startup_ccs.c: C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/include/stdint.h:
InputOutput_MSP432asm/Debug/objects.mk
################################################################################ # Automatically-generated file. Do not edit! ################################################################################ USER_OBJS := LIBS := -l"libc.a"
InputOutput_MSP432asm/Debug/sources.mk
################################################################################ # Automatically-generated file. Do not edit! ################################################################################ O_SRCS := CPP_SRCS := K_SRCS := LD_SRCS := S67_SRCS := LDS_SRCS := CMD_SRCS := EXE_SRCS := CXX_SRCS := CMD_UPPER_SRCS := ELF_SRCS := C43_SRCS := S55_SRCS := LD_UPPER_SRCS := C62_SRCS := S_UPPER_SRCS := A_SRCS := SA_SRCS := C55_SRCS := LDS_UPPER_SRCS := C_UPPER_SRCS := OUT_SRCS := INO_SRCS := OBJ_SRCS := S62_SRCS := LIB_SRCS := PDE_SRCS := ASM_SRCS := ASM_UPPER_SRCS := C++_SRCS := CLA_SRCS := S??_SRCS := C_SRCS := C67_SRCS := S_SRCS := S43_SRCS := OPT_SRCS := C64_SRCS := CC_SRCS := C??_SRCS := S64_SRCS := OBJS := BIN_OUTPUTS := S_DEPS := S_UPPER_DEPS := S62_DEPS := C64_DEPS := ASM_DEPS := CC_DEPS := S55_DEPS := C67_DEPS := CLA_DEPS := C??_DEPS := CPP_DEPS := S??_DEPS := C_DEPS := C62_DEPS := EXE_OUTPUTS := CXX_DEPS := C++_DEPS := ASM_UPPER_DEPS := K_DEPS := C43_DEPS := INO_DEPS := S67_DEPS := SA_DEPS := S43_DEPS := OPT_DEPS := PDE_DEPS := S64_DEPS := C_UPPER_DEPS := C55_DEPS := CPP_DEPS__QUOTED := C67_DEPS__QUOTED := INO_DEPS__QUOTED := C??_DEPS__QUOTED := S_UPPER_DEPS__QUOTED := CLA_DEPS__QUOTED := ASM_UPPER_DEPS__QUOTED := C62_DEPS__QUOTED := CXX_DEPS__QUOTED := EXE_OUTPUTS__QUOTED := S67_DEPS__QUOTED := BIN_OUTPUTS__QUOTED := C_DEPS__QUOTED := C_UPPER_DEPS__QUOTED := OPT_DEPS__QUOTED := S_DEPS__QUOTED := K_DEPS__QUOTED := S??_DEPS__QUOTED := C64_DEPS__QUOTED := C++_DEPS__QUOTED := OBJS__QUOTED := CC_DEPS__QUOTED := S43_DEPS__QUOTED := S55_DEPS__QUOTED := SA_DEPS__QUOTED := C55_DEPS__QUOTED := PDE_DEPS__QUOTED := C43_DEPS__QUOTED := S62_DEPS__QUOTED := ASM_DEPS__QUOTED := S64_DEPS__QUOTED := # Every subdirectory with source files must be described here SUBDIRS := \ . \
InputOutput_MSP432asm/Debug/subdir_rules.mk
################################################################################ # Automatically-generated file. Do not edit! ################################################################################ # Each subdirectory must supply rules for building sources it contributes main.obj: ../main.asm $(GEN_OPTS) $(GEN_HDRS) @echo 'Building file: $<' @echo 'Invoking: MSP432 Compiler' "C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/bin/armcl" -mv7M4 --code_state=16 --float_support=FPv4SPD16 --abi=eabi -me --include_path="C:/ti/ccsv6/ccs_base/arm/include" --include_path="C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/include" --include_path="C:/ti/ccsv6/ccs_base/arm/include/CMSIS" --advice:power=all -g --gcc --define=__MSP432P401R__ --define=TARGET_IS_MSP432P4XX --define=ccs --diag_wrap=off --display_error_number --diag_warning=225 --preproc_with_compile --preproc_dependency="main.pp" $(GEN_OPTS__FLAG) "$<" @echo 'Finished building: $<' @echo ' ' msp432_startup_ccs.obj: ../msp432_startup_ccs.c $(GEN_OPTS) $(GEN_HDRS) @echo 'Building file: $<' @echo 'Invoking: MSP432 Compiler' "C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/bin/armcl" -mv7M4 --code_state=16 --float_support=FPv4SPD16 --abi=eabi -me --include_path="C:/ti/ccsv6/ccs_base/arm/include" --include_path="C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/include" --include_path="C:/ti/ccsv6/ccs_base/arm/include/CMSIS" --advice:power=all -g --gcc --define=__MSP432P401R__ --define=TARGET_IS_MSP432P4XX --define=ccs --diag_wrap=off --display_error_number --diag_warning=225 --preproc_with_compile --preproc_dependency="msp432_startup_ccs.pp" $(GEN_OPTS__FLAG) "$<" @echo 'Finished building: $<' @echo ' '
InputOutput_MSP432asm/Debug/subdir_vars.mk
################################################################################ # Automatically-generated file. Do not edit! ################################################################################ # Add inputs and outputs from these tool invocations to the build variables CMD_SRCS += \ ../msp432p401r.cmd ASM_SRCS += \ ../main.asm C_SRCS += \ ../msp432_startup_ccs.c OBJS += \ ./main.obj \ ./msp432_startup_ccs.obj ASM_DEPS += \ ./main.pp C_DEPS += \ ./msp432_startup_ccs.pp C_DEPS__QUOTED += \ "msp432_startup_ccs.pp" OBJS__QUOTED += \ "main.obj" \ "msp432_startup_ccs.obj" ASM_DEPS__QUOTED += \ "main.pp" ASM_SRCS__QUOTED += \ "../main.asm" C_SRCS__QUOTED += \ "../msp432_startup_ccs.c"
InputOutput_MSP432asm/main.asm
; InputOutput.s ; Runs on MSP432 ; Test the GPIO initialization functions by setting the LED ; color according to the status of the switches. ; Daniel Valvano ; June 20, 2015 ; This example accompanies the book ; "Embedded Systems: Introduction to the MSP432 Microcontroller", ; ISBN: 978-1512185676, Jonathan Valvano, copyright (c) 2015 ; Section 4.2 Program 4.1 ; ;Copyright 2015 by Jonathan W. Valvano, [email protected] ; You may use, edit, run or distribute this file ; as long as the above copyright notice remains ;THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED ;OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF ;MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ;VALVANO SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, ;OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. ;For more information about my classes, my research, and my books, see ;http://users.ece.utexas.edu/~valvano/ ; built-in LED1 connected to P1.0 ; negative logic built-in Button 1 connected to P1.1 ; negative logic built-in Button 2 connected to P1.4 ; built-in red LED connected to P2.0 ; built-in green LED connected to P2.1 ; built-in blue LED connected to P2.2 .thumb .text .align 2 P1IN .field 0x40004C00,32 ; Port 1 Input P2IN .field 0x40004C01,32 ; Port 2 Input P2OUT .field 0x40004C03,32 ; Port 2 Output P1OUT .field 0x40004C02,32 ; Port 1 Output P1DIR .field 0x40004C04,32 ; Port 1 Direction P2DIR .field 0x40004C05,32 ; Port 2 Direction P1REN .field 0x40004C06,32 ; Port 1 Resistor Enable P2REN .field 0x40004C07,32 ; Port 2 Resistor Enable P1DS .field 0x40004C08,32 ; Port 1 Drive Strength P2DS .field 0x40004C09,32 ; Port 2 Drive Strength P1SEL0 .field 0x40004C0A,32 ; Port 1 Select 0 P2SEL0 .field 0x40004C0B,32 ; Port 2 Select 0 P1SEL1 .field 0x40004C0C,32 ; Port 1 Select 1 P2SEL1 .field 0x40004C0D,32 ; Port 2 Select 1 RED .equ 0x01 GREEN .equ 0x02 BLUE .equ 0x04 SW1 .equ 0x02 ; on the left side of the LaunchPad board SW2 .equ 0x10 ; on the right side of the LaunchPad board .global main .thumbfunc main main: .asmfunc BL Port1_Init ; initialize P1.1 and P1.4 and make them inputs (P1.1 and P1.4 built-in buttons) BL Port2_Init ; initialize P2.2-P2.0 and make them outputs (P2.2-P2.0 built-in LEDs) loop BL Port1_Input ; read both of the switches on Port 1 CMP R0, #0x10 ; R0 == 0x10? BEQ sw1pressed ; if so, switch 1 pressed CMP R0, #0x02 ; R0 == 0x02? BEQ sw2pressed ; if so, switch 2 pressed CMP R0, #0x00 ; R0 == 0x00? BEQ bothpressed ; if so, both switches pressed CMP R0, #0x12 ; R0 == 0x12? BEQ nopressed ; if so, neither switch pressed ; if none of the above, unexpected return value MOV R0, #(RED+GREEN+BLUE) ; R0 = (RED|GREEN|BLUE) (all LEDs on) BL Port2_Output ; turn all of the LEDs on B loop sw1pressed MOV R0, #BLUE ; R0 = BLUE (blue LED on) BL Port2_Output ; turn the blue LED on B loop sw2pressed MOV R0, #RED ; R0 = RED (red LED on) BL Port2_Output ; turn the red LED on B loop bothpressed MOV R0, #GREEN ; R0 = GREEN (green LED on) BL Port2_Output ; turn the green LED on B loop nopressed MOV R0, #0 ; R0 = 0 (no LEDs on) BL Port2_Output ; turn all of the LEDs off B loop .endasmfunc ;------------Port1_Init------------ ; Initialize GPIO Port 1 for negative logic switches on P1.1 and ; P1.4 as the LaunchPad is wired. Weak internal pull-up ; resistors are enabled. ; Input: none ; Output: none ; Modifies: R0, R1 Port1_Init: .asmfunc LDR R1, P1SEL0 MOV R0, #0x00 ; configure P1.4 and P1.1 as GPIO STRB R0, [R1] LDR R1, P1SEL1 MOV R0, #0x00 ; configure P1.4 and P1.1 as GPIO STRB R0, [R1] LDR R1, P1DIR MOV R0, #0x00 ; make P1.4 and P1.1 inputs STRB R0, [R1] LDR R1, P1REN MOV R0, #0x12 ; enable pull resistors on P1.4 and P1.1 STRB R0, [R1] LDR R1, P1OUT MOV R0, #0x12 ; P1.4 and P1.1 are pull-up STRB R0, [R1] BX LR .endasmfunc ;------------Port1_Input------------ ; Read and return the status of the switches. ; Input: none ; Output: R0 0x10 if only Switch 1 is pressed ; R0 0x02 if only Switch 2 is pressed ; R0 0x00 if both switches are pressed ; R0 0x12 if no switches are pressed ; Modifies: R1 Port1_Input: .asmfunc LDR R1, P1IN LDRB R0, [R1] ; read all 8 bits of Port 1 AND R0, R0, #0x12 ; select the input pins P1.1 and P1.4 BX LR .endasmfunc ;------------Port2_Init------------ ; Initialize GPIO Port 2 red, green, and blue LEDs as ; the LaunchPad is wired. ; Input: none ; Output: none ; Modifies: R0, R1 Port2_Init: .asmfunc LDR R1, P2SEL0 MOV R0, #0x00 ; configure P2.2-P2.0 as GPIO STRB R0, [R1] LDR R1, P2SEL1 MOV R0, #0x00 ; configure P2.2-P2.0 as GPIO STRB R0, [R1] LDR R1, P2DS MOV R0, #0x07 ; make P2.2-P2.0 high drive strength STRB R0, [R1] LDR R1, P2DIR MOV R0, #0x07 ; make P2.2-P2.0 out STRB R0, [R1] LDR R1, P2OUT MOV R0, #0x00 ; all LEDs off STRB R0, [R1] BX LR .endasmfunc ;------------Port2_Output------------ ; Set the output state of P2. ; Input: R0 new state of P2 (only 8 least significant bits) ; Output: none ; Modifies: R1 Port2_Output: .asmfunc LDR R1, P2OUT STRB R0, [R1] ; write to P2.7-P2.0 BX LR .endasmfunc .end
InputOutput_MSP432asm/msp432_startup_ccs.c
//***************************************************************************** // // Copyright (C) 2012 - 2014 Texas Instruments Incorporated - http://www.ti.com/ // // Redistribution and use in source and binary forms, with or without // modification, are permitted provided that the following conditions // are met: // // Redistributions of source code must retain the above copyright // notice, this list of conditions and the following disclaimer. // // Redistributions in binary form must reproduce the above copyright // notice, this list of conditions and the following disclaimer in the // documentation and/or other materials provided with the // distribution. // // Neither the name of Texas Instruments Incorporated nor the names of // its contributors may be used to endorse or promote products derived // from this software without specific prior written permission. // // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. // // MSP432 Family Interrupt Vector Table for CGT // //**************************************************************************** #include <stdint.h> /* Forward declaration of the default fault handlers. */ static void resetISR(void); static void nmiISR(void); static void faultISR(void); static void defaultISR(void); //Weak Function Deffinitions, can be written / declared in other files extern void SVC_Handler(void) __attribute__((weak)); /* SVCall handler */ extern void DebugMon_Handler(void) __attribute__((weak)); /* Debug monitor handler */ extern void PendSV_Handler(void) __attribute__((weak)); /* The PendSV handler */ extern void SysTick_Handler(void) __attribute__((weak)); /* The SysTick handler */ extern void PSS_IRQHandler(void) __attribute__((weak)); /* PSS ISR */ extern void CS_IRQHandler(void) __attribute__((weak)); /* CS ISR */ extern void PCM_IRQHandler(void) __attribute__((weak)); /* PCM ISR */ extern void WDT_A_IRQHandler(void) __attribute__((weak)); /* WDT ISR */ extern void FPU_IRQHandler(void) __attribute__((weak)); /* FPU ISR */ extern void FLCTL_IRQHandler(void) __attribute__((weak)); /* FLCTL ISR */ extern void COMP_E0_IRQHandler(void) __attribute__((weak)); /* COMP0 ISR */ extern void COMP_E1_IRQHandler(void) __attribute__((weak)); /* COMP1 ISR */ extern void TA0_0_IRQHandler(void) __attribute__((weak)); /* TA0_0 ISR */ extern void TA0_N_IRQHandler(void) __attribute__((weak)); /* TA0_N ISR */ extern void TA1_0_IRQHandler(void) __attribute__((weak)); /* TA1_0 ISR */ extern void TA1_N_IRQHandler(void) __attribute__((weak)); /* TA1_N ISR */ extern void TA2_0_IRQHandler(void) __attribute__((weak)); /* TA2_0 ISR */ extern void TA2_N_IRQHandler(void) __attribute__((weak)); /* TA2_N ISR */ extern void TA3_0_IRQHandler(void) __attribute__((weak)); /* TA3_0 ISR */ extern void TA3_N_IRQHandler(void) __attribute__((weak)); /* TA3_N ISR */ extern void EUSCIA0_IRQHandler(void) __attribute__((weak)); /* EUSCIA0 ISR */ extern void EUSCIA1_IRQHandler(void) __attribute__((weak)); /* EUSCIA1 ISR */ extern void EUSCIA2_IRQHandler(void) __attribute__((weak)); /* EUSCIA2 ISR */ extern void EUSCIA3_IRQHandler(void) __attribute__((weak)); /* EUSCIA3 ISR */ extern void EUSCIB0_IRQHandler(void) __attribute__((weak)); /* EUSCIB0 ISR */ extern void EUSCIB1_IRQHandler(void) __attribute__((weak)); /* EUSCIB1 ISR */ extern void EUSCIB2_IRQHandler(void) __attribute__((weak)); /* EUSCIB2 ISR */ extern void EUSCIB3_IRQHandler(void) __attribute__((weak)); /* EUSCIB3 ISR */ extern void ADC14_IRQHandler(void) __attribute__((weak)); /* ADC14 ISR */ extern void T32_INT1_IRQHandler(void) __attribute__((weak)); /* T32_INT1 ISR */ extern void T32_INT2_IRQHandler(void) __attribute__((weak)); /* T32_INT2 ISR */ extern void T32_INTC_IRQHandler(void) __attribute__((weak)); /* T32_INTC ISR */ extern void AES256_IRQHandler(void) __attribute__((weak)); /* AES ISR */ extern void RTC_C_IRQHandler(void) __attribute__((weak)); /* RTC ISR */ extern void DMA_ERR_IRQHandler(void) __attribute__((weak)); /* DMA_ERR ISR */ extern void DMA_INT3_IRQHandler(void) __attribute__((weak)); /* DMA_INT3 ISR */ extern void DMA_INT2_IRQHandler(void) __attribute__((weak)); /* DMA_INT2 ISR */ extern void DMA_INT1_IRQHandler(void) __attribute__((weak)); /* DMA_INT1 ISR */ extern void DMA_INT0_IRQHandler(void) __attribute__((weak)); /* DMA_INT0 ISR */ extern void PORT1_IRQHandler(void) __attribute__((weak)); /* PORT1 ISR */ extern void PORT2_IRQHandler(void) __attribute__((weak)); /* PORT2 ISR */ extern void PORT3_IRQHandler(void) __attribute__((weak)); /* PORT3 ISR */ extern void PORT4_IRQHandler(void) __attribute__((weak)); /* PORT4 ISR */ extern void PORT5_IRQHandler(void) __attribute__((weak)); /* PORT5 ISR */ extern void PORT6_IRQHandler(void) __attribute__((weak)); /* PORT6 ISR */ /* External declaration for the reset handler that is to be called when the */ /* processor is started */ extern void _c_int00(void); /* Linker variable that marks the top of the stack. */ extern unsigned long __STACK_END; /* External declarations for the interrupt handlers used by the application. */ /* To be added by user */ /* Intrrupt vector table. Note that the proper constructs must be placed on this to */ /* ensure that it ends up at physical address 0x0000.0000 or at the start of */ /* the program if located at a start address other than 0. */ #pragma DATA_SECTION(interruptVectors, ".intvecs") void (* const interruptVectors[])(void) = { (void (*)(void))((uint32_t)&__STACK_END), /* The initial stack pointer */ resetISR, /* The reset handler */ nmiISR, /* The NMI handler */ faultISR, /* The hard fault handler */ defaultISR, /* The MPU fault handler */ defaultISR, /* The bus fault handler */ defaultISR, /* The usage fault handler */ 0, /* Reserved */ 0, /* Reserved */ 0, /* Reserved */ 0, /* Reserved */ SVC_Handler, /* SVCall handler */ DebugMon_Handler, /* Debug monitor handler */ 0, /* Reserved */ PendSV_Handler, /* The PendSV handler */ SysTick_Handler, /* The SysTick handler */ PSS_IRQHandler, /* PSS ISR */ CS_IRQHandler, /* CS ISR */ PCM_IRQHandler, /* PCM ISR */ WDT_A_IRQHandler, /* WDT ISR */ FPU_IRQHandler, /* FPU ISR */ FLCTL_IRQHandler, /* FLCTL ISR */ COMP_E0_IRQHandler, /* COMP0 ISR */ COMP_E1_IRQHandler, /* COMP1 ISR */ TA0_0_IRQHandler, /* TA0_0 ISR */ TA0_N_IRQHandler, /* TA0_N ISR */ TA1_0_IRQHandler, /* TA1_0 ISR */ TA1_N_IRQHandler, /* TA1_N ISR */ TA2_0_IRQHandler, /* TA2_0 ISR */ TA2_N_IRQHandler, /* TA2_N ISR */ TA3_0_IRQHandler, /* TA3_0 ISR */ TA3_N_IRQHandler, /* TA3_N ISR */ EUSCIA0_IRQHandler, /* EUSCIA0 ISR */ EUSCIA1_IRQHandler, /* EUSCIA1 ISR */ EUSCIA2_IRQHandler, /* EUSCIA2 ISR */ EUSCIA3_IRQHandler, /* EUSCIA3 ISR */ EUSCIB0_IRQHandler, /* EUSCIB0 ISR */ EUSCIB1_IRQHandler, /* EUSCIB1 ISR */ EUSCIB2_IRQHandler, /* EUSCIB2 ISR */ EUSCIB3_IRQHandler, /* EUSCIB3 ISR */ ADC14_IRQHandler, /* ADC14 ISR */ T32_INT1_IRQHandler, /* T32_INT1 ISR */ T32_INT2_IRQHandler, /* T32_INT2 ISR */ T32_INTC_IRQHandler, /* T32_INTC ISR */ AES256_IRQHandler, /* AES ISR */ RTC_C_IRQHandler, /* RTC ISR */ DMA_ERR_IRQHandler, /* DMA_ERR ISR */ DMA_INT3_IRQHandler, /* DMA_INT3 ISR */ DMA_INT2_IRQHandler, /* DMA_INT2 ISR */ DMA_INT1_IRQHandler, /* DMA_INT1 ISR */ DMA_INT0_IRQHandler, /* DMA_INT0 ISR */ PORT1_IRQHandler, /* PORT1 ISR */ PORT2_IRQHandler, /* PORT2 ISR */ PORT3_IRQHandler, /* PORT3 ISR */ PORT4_IRQHandler, /* PORT4 ISR */ PORT5_IRQHandler, /* PORT5 ISR */ PORT6_IRQHandler, /* PORT6 ISR */ defaultISR, /* Reserved 41 */ defaultISR, /* Reserved 42 */ defaultISR, /* Reserved 43 */ defaultISR, /* Reserved 44 */ defaultISR, /* Reserved 45 */ defaultISR, /* Reserved 46 */ defaultISR, /* Reserved 47 */ defaultISR, /* Reserved 48 */ defaultISR, /* Reserved 49 */ defaultISR, /* Reserved 50 */ defaultISR, /* Reserved 51 */ defaultISR, /* Reserved 52 */ defaultISR, /* Reserved 53 */ defaultISR, /* Reserved 54 */ defaultISR, /* Reserved 55 */ defaultISR, /* Reserved 56 */ defaultISR, /* Reserved 57 */ defaultISR, /* Reserved 58 */ defaultISR, /* Reserved 59 */ defaultISR, /* Reserved 60 */ defaultISR, /* Reserved 61 */ defaultISR, /* Reserved 62 */ defaultISR, /* Reserved 63 */ defaultISR /* Reserved 64 */ }; /* This is the code that gets called when the processor first starts execution */ /* following a reset event. Only the absolutely necessary set is performed, */ /* after which the application supplied entry() routine is called. Any fancy */ /* actions (such as making decisions based on the reset cause register, and */ /* resetting the bits in that register) are left solely in the hands of the */ /* application. */ void resetISR(void) { /* Jump to the CCS C Initialization Routine. */ __asm(" .global _c_int00\n" " LDR R0,WDT\n" " LDR R1,HOLD\n" " STRH R1,[R0]\n" // turn off watchdog " b.w _c_int00\n" "WDT .field 0x4000480C,32\n" // pointer to 16-bit register "HOLD .field 0x00005A80,32"); // WDTPW | WDTHOLD } /* This is the code that gets called when the processor receives a NMI. This */ /* simply enters an infinite loop, preserving the system state for examination */ /* by a debugger. */ static void nmiISR(void) { /* Fault trap exempt from ULP advisor */ #pragma diag_push #pragma CHECK_ULP("-2.1") /* Enter an infinite loop. */ while(1) { } #pragma diag_pop } /* This is the code that gets called when the processor receives a fault */ /* interrupt. This simply enters an infinite loop, preserving the system state */ /* for examination by a debugger. */ static void faultISR(void) { /* Fault trap exempt from ULP advisor */ #pragma diag_push #pragma CHECK_ULP("-2.1") /* Enter an infinite loop. */ while(1) { } #pragma diag_pop } /* This is the code that gets called when the processor receives an unexpected */ /* interrupt. This simply enters an infinite loop, preserving the system state */ /* for examination by a debugger. */ static void defaultISR(void) { /* Fault trap exempt from ULP advisor */ #pragma diag_push #pragma CHECK_ULP("-2.1") /* Enter an infinite loop. */ while(1) { } #pragma diag_pop } //These Functions are all weakly defined, so the user can write over them in an external file void SVC_Handler(void){ while(1){}} /* SVCall handler */ void DebugMon_Handler(void){ while(1){}} /* Debug monitor handler */ void PendSV_Handler(void){ while(1){}} void SysTick_Handler(void){ while(1){}} void PSS_IRQHandler(void){ while(1){}} /* PSS ISR */ void CS_IRQHandler(void){ while(1){}} /* CS ISR */ void PCM_IRQHandler(void){ while(1){}} /* PCM ISR */ void WDT_A_IRQHandler(void){ while(1){}} /* WDT ISR */ void FPU_IRQHandler(void){ while(1){}} /* FPU ISR */ void FLCTL_IRQHandler(void){ while(1){}} /* FLCTL ISR */ void COMP_E0_IRQHandler(void){ while(1){}} /* COMP0 ISR */ void COMP_E1_IRQHandler(void){ while(1){}} /* COMP1 ISR */ void TA0_0_IRQHandler(void){ while(1){}} /* TA0_0 ISR */ void TA0_N_IRQHandler(void){ while(1){}} /* TA0_N ISR */ void TA1_0_IRQHandler(void){ while(1){}} /* TA1_0 ISR */ void TA1_N_IRQHandler(void){ while(1){}} /* TA1_N ISR */ void TA2_0_IRQHandler(void){ while(1){}} /* TA2_0 ISR */ void TA2_N_IRQHandler(void){ while(1){}} /* TA2_N ISR */ void TA3_0_IRQHandler(void){ while(1){}} /* TA3_0 ISR */ void TA3_N_IRQHandler(void){ while(1){}} /* TA3_N ISR */ void EUSCIA0_IRQHandler(void){ while(1){}} /* EUSCIA0 ISR */ void EUSCIA1_IRQHandler(void){ while(1){}} /* EUSCIA1 ISR */ void EUSCIA2_IRQHandler(void){ while(1){}} /* EUSCIA2 ISR */ void EUSCIA3_IRQHandler(void){ while(1){}} /* EUSCIA3 ISR */ void EUSCIB0_IRQHandler(void){ while(1){}} /* EUSCIB0 ISR */ void EUSCIB1_IRQHandler(void){ while(1){}} /* EUSCIB1 ISR */ void EUSCIB2_IRQHandler(void){ while(1){}} /* EUSCIB2 ISR */ void EUSCIB3_IRQHandler(void){ while(1){}} /* EUSCIB3 ISR */ void ADC14_IRQHandler(void){ while(1){}} /* ADC14 ISR */ void T32_INT1_IRQHandler(void){ while(1){}} /* T32_INT1 ISR */ void T32_INT2_IRQHandler(void){ while(1){}} /* T32_INT2 ISR */ void T32_INTC_IRQHandler(void){ while(1){}} /* T32_INTC ISR */ void AES256_IRQHandler(void){ while(1){}} /* AES ISR */ void RTC_C_IRQHandler(void){ while(1){}} /* RTC ISR */ void DMA_ERR_IRQHandler(void){ while(1){}} /* DMA_ERR ISR */ void DMA_INT3_IRQHandler(void){ while(1){}} /* DMA_INT3 ISR */ void DMA_INT2_IRQHandler(void){ while(1){}} /* DMA_INT2 ISR */ void DMA_INT1_IRQHandler(void){ while(1){}} /* DMA_INT1 ISR */ void DMA_INT0_IRQHandler(void){ while(1){}} /* DMA_INT0 ISR */ void PORT1_IRQHandler(void){ while(1){}} /* PORT1 ISR */ void PORT2_IRQHandler(void){ while(1){}} /* PORT2 ISR */ void PORT3_IRQHandler(void){ while(1){}} /* PORT3 ISR */ void PORT4_IRQHandler(void){ while(1){}} /* PORT4 ISR */ void PORT5_IRQHandler(void){ while(1){}} /* PORT5 ISR */ void PORT6_IRQHandler(void){ while(1){}} /* PORT6 ISR */ //****************************************************************************** // // Useful functions. // //****************************************************************************** extern void DisableInterrupts(void) ; extern void EnableInterrupts(void) ; extern void StartCritical(void) ; extern void EndCritical(void); extern void WaitForInterrupt (void); //*********** DisableInterrupts *************** // disable interrupts // inputs: none // outputs: none void DisableInterrupts(void){ __asm (" CPSID I\n" " BX LR\n"); } //*********** EnableInterrupts *************** // emable interrupts // inputs: none // outputs: none void EnableInterrupts(void){ __asm (" CPSIE I\n" " BX LR\n"); } //*********** StartCritical ************************ // make a copy of previous I bit, disable interrupts // inputs: none // outputs: previous I bit void StartCritical(void){ __asm (" MRS R0, PRIMASK ; save old status \n" " CPSID I ; mask all (except faults)\n" " BX LR\n"); } //*********** EndCritical ************************ // using the copy of previous I bit, restore I bit to previous value // inputs: previous I bit // outputs: none void EndCritical(void){ __asm (" MSR PRIMASK, R0\n" " BX LR\n"); } //*********** WaitForInterrupt ************************ // go to low power mode while waiting for the next interrupt // inputs: none // outputs: none void WaitForInterrupt(void){ __asm (" WFI\n" " BX LR\n"); }
InputOutput_MSP432asm/msp432p401r.cmd
/****************************************************************************** * * Copyright (C) 2012 - 2015 Texas Instruments Incorporated - http://www.ti.com/ * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Default linker command file for Texas Instruments MSP432P401R * * File creation date: 2015-01-20 * *****************************************************************************/ --retain=interruptVectors --retain=flashMailbox MEMORY { MAIN (RX) : origin = 0x00000000, length = 0x00040000 INFO (RX) : origin = 0x00200000, length = 0x00004000 SRAM_CODE (RWX): origin = 0x01000000, length = 0x00010000 SRAM_DATA (RW) : origin = 0x20000000, length = 0x00010000 } /* The following command line options are set as part of the CCS project. */ /* If you are building using the command line, or for some reason want to */ /* define them here, you can uncomment and modify these lines as needed. */ /* If you are using CCS for building, it is probably better to make any such */ /* modifications in your CCS project and leave this file alone. */ /* */ /* A heap size of 1024 bytes is recommended when you plan to use printf() */ /* for debug output to the console window. */ /* */ /* --heap_size=1024 */ /* --stack_size=512 */ /* --library=rtsv7M4_T_le_eabi.lib */ /* Section allocation in memory */ SECTIONS { .intvecs: > 0x00000000 .text : > MAIN .const : > MAIN .cinit : > MAIN .pinit : > MAIN .flashMailbox : > 0x00200000 .vtable : > 0x20000000 .data : > SRAM_DATA .bss : > SRAM_DATA .sysmem : > SRAM_DATA .stack : > SRAM_DATA (HIGH) } /* Symbolic definition of the WDTCTL register for RTS */ WDTCTL_SYM = 0x4000480C;
InputOutput_MSP432asm/targetConfigs/MSP432P401R.ccxml
InputOutput_MSP432asm/targetConfigs/readme.txt
The 'targetConfigs' folder contains target-configuration (.ccxml) files, automatically generated based on the device and connection settings specified in your project on the Properties > General page. Please note that in automatic target-configuration management, changes to the project's device and/or connection settings will either modify an existing or generate a new target-configuration file. Thus, if you manually edit these auto-generated files, you may need to re-apply your changes. Alternatively, you may create your own target-configuration file for this project and manage it manually. You can always switch back to automatic target-configuration management by checking the "Manage the project's target-configuration automatically" checkbox on the project's Properties > General page.