IFT 201 HW4

[IFT 201]

Computer and Network Systems: Organization and Administration

Homework Assignment 4

You must show your work to earn points

Score: 40 pts

0. Full Name on the submitted paper (1 pt)

COMBINATIONAL CIRCUITS (19 pts)

Note:

· Draw all your circuits using logisim software. It is an easy to use and easy to understand digital logic tool.

· Download the software from www.cburch.com/logisim

· DO NOT hand-draw your circuits. All hand-drawn circuits will be ignored.

I. Demonstrate by means of truth tables the validity of the identity below (2pt)

X + YZ = (X+Y)(X+Z)

II. Obtain the truth table of the function below (All terms evaluated must be shown in the truth table) (2pt)

G = WXY’ + WXZ’ +WXZ + YZ’

III. Draw the circuit diagram corresponding to the Boolean expression below (2pts)

F = AC(B’ + D) + A’C(B’ + D’) + BC(A’ + D’)

IV. Optimize the expression below using Kmap (3pts)

Z = AC’ + B’D + A’CD + ABCD

Grading Rubric

1 point for having the correct KMap structure and populating correctly

1 point for correct circles (3 circles)

1 point for the final optimized equation

V. You are to design a combinational circuit that accepts a 4-bit number and generates a 3-bit binary number output that approximates the square root of the number. For example, if the square root is 3.5 or larger, give a result of 4. If the square root is < 3.5 and >= 2.5 (less than 3.5 and greater or equal to 2.5), give a result of 3.

Provide the truth table that captures the above desired system behavior. (2pts)

VI. You are to design a system that sounds a buzzer inside a home whenever motion outside is detected at night. Assume a motion sensor has an output M that indicates whether motion is detected (M=1 means motion detected) and a light sensor with output L that indicates if light is detected (L=1 means light is detected). The buzzer inside the home has a single input B that when 1, sounds the buzzer.

Capture the above desired system behavior using an equation, and then convert the equation to a circuit using AND, OR, and NOT gates (equation: 2pts, circuit: 1pt)

VII. For the Truth table below

a) Convert the function F to an equation (1pt)

b) Use K-map to optimize the equation (1pts)

c) Convert the optimized equation to a digital circuit (1 pt)

a	b	c	F
0	0	0	0
0	0	1	1
0	1	0	1
0	1	1	1
1	0	0	0
1	0	1	1
1	1	0	1
1	1	1	1

VIII. Create a Boolean equation representation for the digital circuit below (2pts)

x

y

G

z

SEQUENTIAL CIRCUITS

IX. Complete the timing diagrams below for an edge-triggered D Flip Flop (rising edge implied). Assume the output is 0 initially. (2 pts)

Clk
D
Q

X. For FSMs with the following numbers of states, indicate the smallest possible number of bits for a state register representing those states. (2 pts)

a. 23

b. 900

XI. Design a Moore sequence recognizer that detects the non-overlapping sequence “101”. Use binary encoded state labels and design and draw the circuit schematic similar to the one drawn in the lecture. (5 pts)

XII. Design a Mealy sequence recognizer that detects the non-overlapping sequence “101”. Use binary encoded state labels and draw the circuit schematic similar to the one drawn in class. (5 pts)

XIII. Reverse engineer the behavior of the sequential circuit shown in the figure below to FSM (follow the steps in the controller design process in reverse). (6 pts)

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