Introduction to digital design Lab task 3
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IDSLAbtask3.pdf
Lab 3: Overview
1. D-Type Flip Flops
2. Counters
3. Sequencer
4. Binary Coded Decimal (BCD) Counter
5. Lab 3 Tasks
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D-Type Flip Flops
1. D-Type Flip Flops
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• D-Type flip flops are positive edge triggered flip flops – the data stored in the flip flop only changes when a positive edge is sent to the clock input
• In Xilinx, there are two types – FDC & FDR (Flip flop, D-type, asynchronous Clear/synchronous Reset)
D-Type Flip Flops - Operation
1. D-Type Flip Flops
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• The output Q is the input data D when a positive edge is triggered (from Low to High)
D-Type Flip Flops - Example
1. D-Type Flip Flops - Example
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• Consider this configuration of a D-type flip flop, what would be the output?
• When there is a positive edge on the clock input, the output complements
Counters
2. Counters
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• Counters are sequential circuits which count through a sequence
• The sequence is designed and drawn (in the schematics) by the author
• There are 2 distinct types of counters:
• Asynchronous counters
• Example: Ripple counters - Sequencers
• Synchronous counters
• Example: Binary Coded Decimal(BCD) counter
Counters – Asynchronous counter
2. Counters
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• The outputs of the D-type flip flops in ripple counters are connected to the
clock input of the next flip flop in series
• The input for each flip flop is the complement of the output
• The edge sensitive transition causes a change in the following flip flop,
leading to the name ripple counters
• Inherent delay between output and input
Counters – Synchronous counter
2. Counters
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• The sequencing of a synchronous counter is only dependent on the clock
input into the flip flop
• Unlike the ripple counter, the outputs of each flip flop doesn’t feed into any
clock inputs of other flip flops
Sequencers
3. Sequencers
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• A sequencer is an example of a ripple counter
• It takes a clock input and sequences the outputs
• The output can be n bits with no limits D1 D0
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
D2 D1 D0
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
0 0 0
Sequencers – 2-bit Sequencer Example
3. Sequencers - Example
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• Looking at the sequence in the
truth table, it is evident that
we need a 2-bit counter to
produce this sequence
• Inherent delay by the signal
travelling through the wires
from one flip flop to another
Next State
D1 D0
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
Binary Coded Decimal (BCD) Counters
4. BCD Counter
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• Flip flops hold 1 bit of information (2 possible outputs)
• In order to convert to a decimal based system (radix 10 system), you will need
to encode the possible outputs of 0-9 into binary
• From the 10 possible outputs, you can see that you will need 4 bits to encode
0 to 9
• Remember – HEX2SSD (0-F) inputs which were encoded into 4 input bits
(W,X,Y,Z)
BCD Counters - Example
4. BCD Counter – Example
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• For the counter to count up from 0 – 9, the truth table can be seen below
Current State Next State
Q3 Q2 Q1 Q0 D3 D2 D1 D0
0 0 0 0 0 0 0 1
0 0 0 1 0 0 1 0
0 0 1 0 0 0 1 1
0 0 1 1 0 1 0 0
0 1 0 0 0 1 0 1
0 1 0 1 0 1 1 0
0 1 1 0 0 1 1 1
0 1 1 1 1 0 0 0
1 0 0 0 1 0 0 1
1 0 0 1 0 0 0 0
• For each flip flop, the input will be
based on the current state
• All four flip flops will be triggered at
the same time, thus synchronous
counters
BCD Counters - Example
4. BCD Counter – Example
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Current State Next State
Q3 Q2 Q1 Q0 D3 D2 D1 D0
0 0 0 0 0 0 0 1
0 0 0 1 0 0 1 0
0 0 1 0 0 0 1 1
0 0 1 1 0 1 0 0
0 1 0 0 0 1 0 1
0 1 0 1 0 1 1 0
0 1 1 0 0 1 1 1
0 1 1 1 1 0 0 0
1 0 0 0 1 0 0 1
1 0 0 1 0 0 0 0
• Derive the Boolean expression for
each of the flip flops through K-
Maps
• Remember – Cases A-F (10-15) can
use don’t cares when creating your
K-Maps
BCD Counters - Example
4. BCD Counter – Example
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• The schematics should be something like this
Lab 3 Task:
5. Lab 3 Task
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• Extend the 2 bit Ripple counter to fit your assignment
• Extend the BCD Counter to fit your assignment (remember that one BCD
Counter can count up one SSD, you need to count up 4 digits in clock mode)
• Reference: Videos on UTS Online
