system verilog Create a test plan and self-checking test-bench for the ALU

HW1.docx

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Homework 1

From Chapter 1: Verification Guidelines

The purpose of this homework is to:

1. Practice writing a test plan

2. Practice writing a test-bench

3. Become comfortable with the VCS verification tool

Create a test plan and self-checking test-bench for the ALU we went over in class. The ALU design is provided in the hw1 directory and has the following characteristics.

1. Reset which resets C to 0.

2. 4-bit signed inputs, A and B

3. 5-bit registered signed output C

4. 4 op-codes

a. add

b. sub

c. bitwise invert input A

d. reduction OR input B

5. Assume the following encoding of the opcodes.

Opcode	Encoding
add	2’b00
sub	2’b01
bitwise invert input A	2’b10
reduction OR input B	2’b11

You must use VCS and your testbench must be self checking. Cut and paste the transcript window into your HW submission.

Deliverables:

1. Test plan for ALU

2. Code for ALU testbench

3. Copy of transcript on terminal window after running VCS

4. Waveforms as observed using DVE.