Computer science lab assignment
Himaoeen
GPIO_MSP432asm.zipGPIO_MSP432asm/.ccsproject
GPIO_MSP432asm/.cproject
GPIO_MSP432asm/.launches/GPIO_MSP432asm.launch
GPIO_MSP432asm/.project
GPIO_MSP432asm org.eclipse.cdt.managedbuilder.core.genmakebuilder org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder full,incremental, com.ti.ccstudio.core.ccsNature org.eclipse.cdt.core.cnature org.eclipse.cdt.managedbuilder.core.managedBuildNature org.eclipse.cdt.core.ccnature org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
GPIO_MSP432asm/.settings/org.eclipse.cdt.codan.core.prefs
eclipse.preferences.version=1 inEditor=false onBuild=false
GPIO_MSP432asm/.settings/org.eclipse.cdt.debug.core.prefs
eclipse.preferences.version=1 org.eclipse.cdt.debug.core.toggleBreakpointModel=com.ti.ccstudio.debug.CCSBreakpointMarker
GPIO_MSP432asm/.settings/org.eclipse.core.resources.prefs
eclipse.preferences.version=1 encoding//Debug/makefile=UTF-8 encoding//Debug/objects.mk=UTF-8 encoding//Debug/sources.mk=UTF-8 encoding//Debug/subdir_rules.mk=UTF-8 encoding//Debug/subdir_vars.mk=UTF-8
GPIO_MSP432asm/Debug/GPIO_MSP432asm.map
****************************************************************************** TI ARM Linker PC v5.2.7 ****************************************************************************** >> Linked Thu Sep 01 09:34:02 2016 OUTPUT FILE NAME: <GPIO_MSP432asm.out> ENTRY POINT SYMBOL: "_c_int00" address: 00000361 MEMORY CONFIGURATION name origin length used unused attr fill ---------------------- -------- --------- -------- -------- ---- -------- MAIN 00000000 00040000 00000470 0003fb90 R X INFO 00200000 00004000 00000000 00004000 R X SRAM_CODE 01000000 00010000 00000000 00010000 RW X SRAM_DATA 20000000 00010000 00000014 0000ffec RW SEGMENT ALLOCATION MAP run origin load origin length init length attrs members ---------- ----------- ---------- ----------- ----- ------- 00000000 00000000 00000470 00000470 r-x 00000000 00000000 00000144 00000144 r-- .intvecs 00000144 00000144 0000032c 0000032c r-x .text 20000000 20000000 00000014 00000014 rw- 20000000 20000000 00000014 00000014 rw- .data SECTION ALLOCATION MAP output attributes/ section page origin length input sections -------- ---- ---------- ---------- ---------------- .intvecs 0 00000000 00000144 00000000 00000144 msp432_startup_ccs.obj (.intvecs) .text 0 00000144 0000032c 00000144 0000009c rtsv7M4_T_le_v4SPD16_eabi.lib : memcpy_t2.obj (.text) 000001e0 0000009a msp432_startup_ccs.obj (.text) 0000027a 00000002 --HOLE-- [fill = 0] 0000027c 00000078 main.obj (.text) 000002f4 0000006c rtsv7M4_T_le_v4SPD16_eabi.lib : autoinit.obj (.text) 00000360 00000050 : boot.obj (.text) 000003b0 0000004c : cpy_tbl.obj (.text) 000003fc 00000044 : exit.obj (.text) 00000440 00000018 : args_main.obj (.text) 00000458 00000014 : _lock.obj (.text) 0000046c 00000004 : pre_init.obj (.text) .cinit 0 00000000 00000000 UNINITIALIZED .data 0 20000000 00000014 20000000 00000008 rtsv7M4_T_le_v4SPD16_eabi.lib : _lock.obj (.data) 20000008 00000008 : exit.obj (.data) 20000010 00000004 : stkdepth_vars.obj (.data) .TI.persistent * 0 20000000 00000000 UNINITIALIZED .stack 0 20010000 00000000 UNINITIALIZED GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name address name ------- ---- 00000235 ADC14_IRQHandler 0000023d AES256_IRQHandler 000003fd C$$EXIT 00000211 COMP_E0_IRQHandler 00000213 COMP_E1_IRQHandler 00000207 CS_IRQHandler 00000241 DMA_ERR_IRQHandler 00000249 DMA_INT0_IRQHandler 00000247 DMA_INT1_IRQHandler 00000245 DMA_INT2_IRQHandler 00000243 DMA_INT3_IRQHandler 000001ff DebugMon_Handler 00000257 DisableInterrupts 00000225 EUSCIA0_IRQHandler 00000227 EUSCIA1_IRQHandler 00000229 EUSCIA2_IRQHandler 0000022b EUSCIA3_IRQHandler 0000022d EUSCIB0_IRQHandler 0000022f EUSCIB1_IRQHandler 00000231 EUSCIB2_IRQHandler 00000233 EUSCIB3_IRQHandler 0000025d EnableInterrupts 0000026d EndCritical 0000020f FLCTL_IRQHandler 0000020d FPU_IRQHandler 00000209 PCM_IRQHandler 0000024b PORT1_IRQHandler 0000024d PORT2_IRQHandler 0000024f PORT3_IRQHandler 00000251 PORT4_IRQHandler 00000253 PORT5_IRQHandler 00000255 PORT6_IRQHandler 00000205 PSS_IRQHandler 00000201 PendSV_Handler 0000023f RTC_C_IRQHandler UNDEFED SHT$$INIT_ARRAY$$Base UNDEFED SHT$$INIT_ARRAY$$Limit 000001fd SVC_Handler 00000263 StartCritical 00000203 SysTick_Handler 00000237 T32_INT1_IRQHandler 00000239 T32_INT2_IRQHandler 0000023b T32_INTC_IRQHandler 00000215 TA0_0_IRQHandler 00000217 TA0_N_IRQHandler 00000219 TA1_0_IRQHandler 0000021b TA1_N_IRQHandler 0000021d TA2_0_IRQHandler 0000021f TA2_N_IRQHandler 00000221 TA3_0_IRQHandler 00000223 TA3_N_IRQHandler 4000480c WDTCTL_SYM 0000020b WDT_A_IRQHandler 00000275 WaitForInterrupt 20010000 __STACK_END 00000000 __STACK_SIZE UNDEFED __TI_CINIT_Base UNDEFED __TI_CINIT_Limit UNDEFED __TI_Handler_Table_Base UNDEFED __TI_Handler_Table_Limit 000002f5 __TI_auto_init 20000008 __TI_cleanup_ptr 2000000c __TI_dtors_ptr 00000000 __TI_static_base__ 00000145 __aeabi_memcpy 00000145 __aeabi_memcpy4 00000145 __aeabi_memcpy8 ffffffff __binit__ ffffffff __c_args__ 20010000 __stack 00000441 _args_main 00000361 _c_int00 20000000 _lock 00000467 _nop 0000045f _register_lock 00000459 _register_unlock 0000046d _system_pre_init 20000004 _unlock 00000401 abort ffffffff binit 000003b1 copy_in 00000409 exit 00000000 interruptVectors 000002bb main 20000010 main_func_sp 00000145 memcpy GLOBAL SYMBOLS: SORTED BY Symbol Address address name ------- ---- 00000000 __STACK_SIZE 00000000 __TI_static_base__ 00000000 interruptVectors 00000145 __aeabi_memcpy 00000145 __aeabi_memcpy4 00000145 __aeabi_memcpy8 00000145 memcpy 000001fd SVC_Handler 000001ff DebugMon_Handler 00000201 PendSV_Handler 00000203 SysTick_Handler 00000205 PSS_IRQHandler 00000207 CS_IRQHandler 00000209 PCM_IRQHandler 0000020b WDT_A_IRQHandler 0000020d FPU_IRQHandler 0000020f FLCTL_IRQHandler 00000211 COMP_E0_IRQHandler 00000213 COMP_E1_IRQHandler 00000215 TA0_0_IRQHandler 00000217 TA0_N_IRQHandler 00000219 TA1_0_IRQHandler 0000021b TA1_N_IRQHandler 0000021d TA2_0_IRQHandler 0000021f TA2_N_IRQHandler 00000221 TA3_0_IRQHandler 00000223 TA3_N_IRQHandler 00000225 EUSCIA0_IRQHandler 00000227 EUSCIA1_IRQHandler 00000229 EUSCIA2_IRQHandler 0000022b EUSCIA3_IRQHandler 0000022d EUSCIB0_IRQHandler 0000022f EUSCIB1_IRQHandler 00000231 EUSCIB2_IRQHandler 00000233 EUSCIB3_IRQHandler 00000235 ADC14_IRQHandler 00000237 T32_INT1_IRQHandler 00000239 T32_INT2_IRQHandler 0000023b T32_INTC_IRQHandler 0000023d AES256_IRQHandler 0000023f RTC_C_IRQHandler 00000241 DMA_ERR_IRQHandler 00000243 DMA_INT3_IRQHandler 00000245 DMA_INT2_IRQHandler 00000247 DMA_INT1_IRQHandler 00000249 DMA_INT0_IRQHandler 0000024b PORT1_IRQHandler 0000024d PORT2_IRQHandler 0000024f PORT3_IRQHandler 00000251 PORT4_IRQHandler 00000253 PORT5_IRQHandler 00000255 PORT6_IRQHandler 00000257 DisableInterrupts 0000025d EnableInterrupts 00000263 StartCritical 0000026d EndCritical 00000275 WaitForInterrupt 000002bb main 000002f5 __TI_auto_init 00000361 _c_int00 000003b1 copy_in 000003fd C$$EXIT 00000401 abort 00000409 exit 00000441 _args_main 00000459 _register_unlock 0000045f _register_lock 00000467 _nop 0000046d _system_pre_init 20000000 _lock 20000004 _unlock 20000008 __TI_cleanup_ptr 2000000c __TI_dtors_ptr 20000010 main_func_sp 20010000 __STACK_END 20010000 __stack 4000480c WDTCTL_SYM ffffffff __binit__ ffffffff __c_args__ ffffffff binit UNDEFED SHT$$INIT_ARRAY$$Base UNDEFED SHT$$INIT_ARRAY$$Limit UNDEFED __TI_CINIT_Base UNDEFED __TI_CINIT_Limit UNDEFED __TI_Handler_Table_Base UNDEFED __TI_Handler_Table_Limit [86 symbols]
GPIO_MSP432asm/Debug/GPIO_MSP432asm.out
GPIO_MSP432asm/Debug/GPIO_MSP432asm_linkInfo.xml
TI ARM Linker PC v5.2.7 Copyright (c) 1996-2015 Texas Instruments Incorporated 0x57c8587a 0x0 GPIO_MSP432asm.out _c_int00 0x361 .\ object main.obj main.obj .\ object msp432_startup_ccs.obj msp432_startup_ccs.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.7\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib boot.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.7\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib exit.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.7\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib pre_init.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.7\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib stkdepth_vars.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.7\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib _lock.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.7\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib args_main.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.7\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib autoinit.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.7\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib cpy_tbl.obj C:\ti\ccsv6\tools\compiler\ti-cgt-arm_5.2.7\lib\ archive rtsv7M4_T_le_v4SPD16_eabi.lib memcpy_t2.obj .intvecs 0x0 0x0 0x144 .text 0x144 0x144 0x9c .text 0x1e0 0x1e0 0x9a .text 0x27c 0x27c 0x78 .text 0x2f4 0x2f4 0x6c .text 0x360 0x360 0x50 .text 0x3b0 0x3b0 0x4c .text 0x3fc 0x3fc 0x44 .text 0x440 0x440 0x18 .text 0x458 0x458 0x14 .text 0x46c 0x46c 0x4 .stack true 0x20010000 0x0 .stack true 0x20010000 0x0 .data 0x20000000 0x20000000 0x8 .data 0x20000008 0x20000008 0x8 .data 0x20000010 0x20000010 0x4 .debug_info 0x0 0x0 0x108 .debug_info 0x108 0x108 0xfd .debug_info 0x205 0x205 0xea .debug_info 0x2ef 0x2ef 0x1696 .debug_info 0x1985 0x1985 0x84 .debug_info 0x1a09 0x1a09 0x169 .debug_info 0x1b72 0x1b72 0x1a7 .debug_info 0x1d19 0x1d19 0x14c .debug_info 0x1e65 0x1e65 0x223 .debug_info 0x2088 0x2088 0x15e .debug_info 0x21e6 0x21e6 0x11f .debug_info 0x2305 0x2305 0x13a .debug_info 0x243f 0x243f 0x129 .debug_info 0x2568 0x2568 0x235 .debug_info 0x279d 0x279d 0x17c .debug_info 0x2919 0x2919 0x17d .debug_info 0x2a96 0x2a96 0x5e .debug_info 0x2af4 0x2af4 0x2d3 .debug_info 0x2dc7 0x2dc7 0x18d .debug_info 0x2f54 0x2f54 0x39 .debug_info 0x2f8d 0x2f8d 0xcd .debug_info 0x305a 0x305a 0x1f6 .debug_info 0x3250 0x3250 0x199 .debug_info 0x33e9 0x33e9 0x2c .debug_info 0x3415 0x3415 0x2c .debug_info 0x3441 0x3441 0x12b .debug_info 0x356c 0x356c 0xa2 .debug_line 0x0 0x0 0x66 .debug_line 0x66 0x66 0x3b .debug_line 0xa1 0xa1 0x3b .debug_line 0xdc 0xdc 0x55a .debug_line 0x636 0x636 0x20 .debug_line 0x656 0x656 0x52 .debug_line 0x6a8 0x6a8 0xa4 .debug_line 0x74c 0x74c 0x2a .debug_line 0x776 0x776 0x7a .debug_line 0x7f0 0x7f0 0x40 .debug_line 0x830 0x830 0x33 .debug_line 0x863 0x863 0x20 .debug_line 0x883 0x883 0x2b .debug_line 0x8ae 0x8ae 0x68 .debug_line 0x916 0x916 0x2b .debug_line 0x941 0x941 0x50 .debug_line 0x991 0x991 0x2b .debug_line 0x9bc 0x9bc 0xb4 .debug_line 0xa70 0xa70 0x79 .debug_line 0xae9 0xae9 0x2e .debug_line 0xb17 0xb17 0xa6 .debug_line 0xbbd 0xbbd 0xb3 .debug_line 0xc70 0xc70 0x68 .debug_line 0xcd8 0xcd8 0x2e .debug_line 0xd06 0xd06 0xa5 .debug_line 0xdab 0xdab 0x88 .debug_abbrev 0x0 0x0 0x5f .debug_abbrev 0x5f 0x5f 0x5d .debug_abbrev 0xbc 0xbc 0x29 .debug_abbrev 0xe5 0xe5 0xf8 .debug_abbrev 0x1dd 0x1dd 0x1f .debug_abbrev 0x1fc 0x1fc 0x3e .debug_abbrev 0x23a 0x23a 0x6b .debug_abbrev 0x2a5 0x2a5 0x29 .debug_abbrev 0x2ce 0x2ce 0xba .debug_abbrev 0x388 0x388 0x55 .debug_abbrev 0x3dd 0x3dd 0x27 .debug_abbrev 0x404 0x404 0x45 .debug_abbrev 0x449 0x449 0x29 .debug_abbrev 0x472 0x472 0x6f .debug_abbrev 0x4e1 0x4e1 0x8e .debug_abbrev 0x56f 0x56f 0x68 .debug_abbrev 0x5d7 0x5d7 0x49 .debug_abbrev 0x620 0x620 0x9a .debug_abbrev 0x6ba 0x6ba 0x7e .debug_abbrev 0x738 0x738 0x24 .debug_abbrev 0x75c 0x75c 0x4b .debug_abbrev 0x7a7 0x7a7 0x9c .debug_abbrev 0x843 0x843 0x8c .debug_abbrev 0x8cf 0x8cf 0x24 .debug_abbrev 0x8f3 0x8f3 0x24 .debug_abbrev 0x917 0x917 0x3e .debug_abbrev 0x955 0x955 0xf .debug_aranges 0x0 0x0 0x28 .debug_aranges 0x28 0x28 0x1c8 .debug_aranges 0x1f0 0x1f0 0x20 .debug_aranges 0x210 0x210 0x30 .debug_aranges 0x240 0x240 0x20 .debug_aranges 0x260 0x260 0x30 .debug_aranges 0x290 0x290 0x20 .debug_aranges 0x2b0 0x2b0 0x20 .debug_aranges 0x2d0 0x2d0 0x20 .debug_aranges 0x2f0 0x2f0 0x20 .debug_pubnames 0x0 0x0 0x29 .debug_pubnames 0x29 0x29 0x27 .debug_pubnames 0x50 0x50 0x474 .debug_pubnames 0x4c4 0x4c4 0x1f .debug_pubnames 0x4e3 0x4e3 0x3a .debug_pubnames 0x51d 0x51d 0x35 .debug_pubnames 0x552 0x552 0x27 .debug_pubnames 0x579 0x579 0x23 .debug_pubnames 0x59c 0x59c 0x28 .debug_pubnames 0x5c4 0x5c4 0x43 .debug_pubnames 0x607 0x607 0x21 .debug_pubnames 0x628 0x628 0x25 .debug_pubnames 0x64d 0x64d 0x1e .debug_pubnames 0x66b 0x66b 0x1d .debug_frame 0x0 0x0 0x404 .debug_frame 0x404 0x404 0xb3 .debug_frame 0x4b7 0x4b7 0x7f .debug_frame 0x536 0x536 0xa1 .debug_frame 0x5d7 0x5d7 0x7f .debug_frame 0x656 0x656 0x8a .debug_frame 0x6e0 0x6e0 0x8e .debug_str 0x0 0x0 0xf5 .debug_str 0xf5 0xf5 0xec .debug_str 0x1e1 0x1e1 0xf8 .debug_str 0x2d9 0x2d9 0x1b5 .debug_str 0x48e 0x48e 0xed .debug_str 0x57b 0x57b 0x15e .debug_pubtypes 0x0 0x0 0xed .debug_pubtypes 0xed 0xed 0x1f .debug_pubtypes 0x10c 0x10c 0x1f .debug_pubtypes 0x12b 0x12b 0x1b .debug_pubtypes 0x146 0x146 0x32 .debug_pubtypes 0x178 0x178 0x50 .debug_pubtypes 0x1c8 0x1c8 0x23 .debug_pubtypes 0x1eb 0x1eb 0x1d .intvecs 0x0 0x0 0x144 .text 0x144 0x144 0x32c .const 0x0 0x0 .cinit 0x0 0x0 .pinit 0x0 0x0 .flashMailbox 0x0 0x0 .vtable 0x0 0x0 .sysmem 0x0 0x0 .stack 0x20010000 0x0 .TI.noinit 0x0 0x0 .bss 0x0 0x0 BSS_GROUP 0x0 0x0 .TI.persistent 0x20000000 0x0 .data 0x20000000 0x20000000 0x14 DATA_GROUP 0x20000000 0x20000000 0x14 .debug_info 0x0 0x0 0x360e .debug_line 0x0 0x0 0xe33 .debug_abbrev 0x0 0x0 0x964 .debug_aranges 0x0 0x0 0x310 .debug_pubnames 0x0 0x0 0x688 .debug_frame 0x0 0x0 0x76e .debug_str 0x0 0x0 0x6d9 .debug_pubtypes 0x0 0x0 0x208 SEGMENT_0 0x0 0x0 0x470 0x5 SEGMENT_1 0x20000000 0x20000000 0x14 0x6 MAIN 0x0 0x0 0x40000 0x470 0x3fb90 RX 0x0 0x144 0x144 0x32c 0x470 0x3fb90 INFO 0x0 0x200000 0x4000 0x0 0x4000 RX SRAM_CODE 0x0 0x1000000 0x10000 0x0 0x10000 RWX SRAM_DATA 0x0 0x20000000 0x10000 0x14 0xffec RW 0x20000000 0x14 0x20000014 0xffec 0x20010000 0x0 WDTCTL_SYM 0x4000480c binit 0xffffffff __binit__ 0xffffffff __STACK_SIZE 0x0 __STACK_END 0x20010000 __c_args__ 0xffffffff __TI_static_base__ 0x0 main 0x2bb T32_INT2_IRQHandler 0x239 PendSV_Handler 0x201 SysTick_Handler 0x203 EUSCIA3_IRQHandler 0x22b SVC_Handler 0x1fd EUSCIB1_IRQHandler 0x22f PORT4_IRQHandler 0x251 AES256_IRQHandler 0x23d FPU_IRQHandler 0x20d EUSCIB2_IRQHandler 0x231 PORT1_IRQHandler 0x24b RTC_C_IRQHandler 0x23f TA2_0_IRQHandler 0x21d TA3_N_IRQHandler 0x223 DMA_INT3_IRQHandler 0x243 PORT2_IRQHandler 0x24d StartCritical 0x263 TA0_0_IRQHandler 0x215 PSS_IRQHandler 0x205 TA1_N_IRQHandler 0x21b EUSCIA1_IRQHandler 0x227 EUSCIA2_IRQHandler 0x229 COMP_E0_IRQHandler 0x211 WDT_A_IRQHandler 0x20b EUSCIB0_IRQHandler 0x22d FLCTL_IRQHandler 0x20f EndCritical 0x26d DMA_INT1_IRQHandler 0x247 PCM_IRQHandler 0x209 ADC14_IRQHandler 0x235 T32_INTC_IRQHandler 0x23b DMA_INT2_IRQHandler 0x245 TA3_0_IRQHandler 0x221 EUSCIA0_IRQHandler 0x225 DMA_ERR_IRQHandler 0x241 DisableInterrupts 0x257 PORT5_IRQHandler 0x253 TA1_0_IRQHandler 0x219 TA2_N_IRQHandler 0x21f COMP_E1_IRQHandler 0x213 EUSCIB3_IRQHandler 0x233 WaitForInterrupt 0x275 interruptVectors 0x0 EnableInterrupts 0x25d PORT6_IRQHandler 0x255 TA0_N_IRQHandler 0x217 T32_INT1_IRQHandler 0x237 DebugMon_Handler 0x1ff DMA_INT0_IRQHandler 0x249 PORT3_IRQHandler 0x24f CS_IRQHandler 0x207 _c_int00 0x361 __stack 0x20010000 C$$EXIT 0x3fd abort 0x401 exit 0x409 __TI_dtors_ptr 0x2000000c __TI_cleanup_ptr 0x20000008 _system_pre_init 0x46d main_func_sp 0x20000010 _nop 0x467 _lock 0x20000000 _unlock 0x20000004 _register_lock 0x45f _register_unlock 0x459 _args_main 0x441 __TI_auto_init 0x2f5 copy_in 0x3b1 memcpy 0x145 __aeabi_memcpy 0x145 __aeabi_memcpy8 0x145 __aeabi_memcpy4 0x145 __TI_Handler_Table_Base 0x0 __TI_Handler_Table_Limit 0x0 __TI_CINIT_Limit 0x0 __TI_CINIT_Base 0x0 SHT$$INIT_ARRAY$$Limit 0x0 SHT$$INIT_ARRAY$$Base 0x0 Link successful
GPIO_MSP432asm/Debug/ccsObjs.opt
"./main.obj" "./msp432_startup_ccs.obj" "../msp432p401r.cmd" -l"libc.a"
GPIO_MSP432asm/Debug/main.obj
GPIO_MSP432asm/Debug/makefile
################################################################################ # Automatically-generated file. Do not edit! ################################################################################ SHELL = cmd.exe CG_TOOL_ROOT := C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7 GEN_OPTS__FLAG := GEN_CMDS__FLAG := ORDERED_OBJS += \ "./main.obj" \ "./msp432_startup_ccs.obj" \ "../msp432p401r.cmd" \ $(GEN_CMDS__FLAG) \ -l"libc.a" \ -include ../makefile.init RM := DEL /F RMDIR := RMDIR /S/Q # All of the sources participating in the build are defined here -include sources.mk -include subdir_vars.mk -include subdir_rules.mk -include objects.mk ifneq ($(MAKECMDGOALS),clean) ifneq ($(strip $(S_DEPS)),) -include $(S_DEPS) endif ifneq ($(strip $(S_UPPER_DEPS)),) -include $(S_UPPER_DEPS) endif ifneq ($(strip $(S62_DEPS)),) -include $(S62_DEPS) endif ifneq ($(strip $(C64_DEPS)),) -include $(C64_DEPS) endif ifneq ($(strip $(ASM_DEPS)),) -include $(ASM_DEPS) endif ifneq ($(strip $(CC_DEPS)),) -include $(CC_DEPS) endif ifneq ($(strip $(S55_DEPS)),) -include $(S55_DEPS) endif ifneq ($(strip $(C67_DEPS)),) -include $(C67_DEPS) endif ifneq ($(strip $(CLA_DEPS)),) -include $(CLA_DEPS) endif ifneq ($(strip $(C??_DEPS)),) -include $(C??_DEPS) endif ifneq ($(strip $(CPP_DEPS)),) -include $(CPP_DEPS) endif ifneq ($(strip $(S??_DEPS)),) -include $(S??_DEPS) endif ifneq ($(strip $(C_DEPS)),) -include $(C_DEPS) endif ifneq ($(strip $(C62_DEPS)),) -include $(C62_DEPS) endif ifneq ($(strip $(CXX_DEPS)),) -include $(CXX_DEPS) endif ifneq ($(strip $(C++_DEPS)),) -include $(C++_DEPS) endif ifneq ($(strip $(ASM_UPPER_DEPS)),) -include $(ASM_UPPER_DEPS) endif ifneq ($(strip $(K_DEPS)),) -include $(K_DEPS) endif ifneq ($(strip $(C43_DEPS)),) -include $(C43_DEPS) endif ifneq ($(strip $(INO_DEPS)),) -include $(INO_DEPS) endif ifneq ($(strip $(S67_DEPS)),) -include $(S67_DEPS) endif ifneq ($(strip $(SA_DEPS)),) -include $(SA_DEPS) endif ifneq ($(strip $(S43_DEPS)),) -include $(S43_DEPS) endif ifneq ($(strip $(OPT_DEPS)),) -include $(OPT_DEPS) endif ifneq ($(strip $(PDE_DEPS)),) -include $(PDE_DEPS) endif ifneq ($(strip $(S64_DEPS)),) -include $(S64_DEPS) endif ifneq ($(strip $(C_UPPER_DEPS)),) -include $(C_UPPER_DEPS) endif ifneq ($(strip $(C55_DEPS)),) -include $(C55_DEPS) endif endif -include ../makefile.defs # Add inputs and outputs from these tool invocations to the build variables EXE_OUTPUTS += \ GPIO_MSP432asm.out \ EXE_OUTPUTS__QUOTED += \ "GPIO_MSP432asm.out" \ BIN_OUTPUTS += \ GPIO_MSP432asm.hex \ BIN_OUTPUTS__QUOTED += \ "GPIO_MSP432asm.hex" \ # All Target all: GPIO_MSP432asm.out # Tool invocations GPIO_MSP432asm.out: $(OBJS) $(CMD_SRCS) $(GEN_CMDS) @echo 'Building target: $@' @echo 'Invoking: MSP432 Linker' "C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/bin/armcl" -mv7M4 --code_state=16 --float_support=FPv4SPD16 --abi=eabi -me --advice:power=all -g --gcc --define=__MSP432P401R__ --define=TARGET_IS_MSP432P4XX --define=ccs --diag_wrap=off --display_error_number --diag_warning=225 -z -m"GPIO_MSP432asm.map" --heap_size=0 --stack_size=0 --cinit_hold_wdt=off -i"C:/ti/ccsv6/ccs_base/arm/include" -i"C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/lib" -i"C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/include" --reread_libs --display_error_number --diag_wrap=off --warn_sections --xml_link_info="GPIO_MSP432asm_linkInfo.xml" -o "GPIO_MSP432asm.out" $(ORDERED_OBJS) @echo 'Finished building target: $@' @echo ' ' GPIO_MSP432asm.hex: $(EXE_OUTPUTS) @echo 'Invoking: MSP432 Hex Utility' "C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/bin/armhex" -o "GPIO_MSP432asm.hex" $(EXE_OUTPUTS__QUOTED) @echo 'Finished building: $@' @echo ' ' # Other Targets clean: -$(RM) $(EXE_OUTPUTS__QUOTED)$(BIN_OUTPUTS__QUOTED) -$(RM) "msp432_startup_ccs.pp" -$(RM) "main.obj" "msp432_startup_ccs.obj" -$(RM) "main.pp" -@echo 'Finished clean' -@echo ' ' .PHONY: all clean dependents .SECONDARY: -include ../makefile.targets
GPIO_MSP432asm/Debug/msp432_startup_ccs.obj
GPIO_MSP432asm/Debug/msp432_startup_ccs.pp
# FIXED msp432_startup_ccs.obj: ../msp432_startup_ccs.c msp432_startup_ccs.obj: C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/include/stdint.h ../msp432_startup_ccs.c: C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/include/stdint.h:
GPIO_MSP432asm/Debug/objects.mk
################################################################################ # Automatically-generated file. Do not edit! ################################################################################ USER_OBJS := LIBS := -l"libc.a"
GPIO_MSP432asm/Debug/sources.mk
################################################################################ # Automatically-generated file. Do not edit! ################################################################################ O_SRCS := CPP_SRCS := K_SRCS := LD_SRCS := S67_SRCS := LDS_SRCS := CMD_SRCS := EXE_SRCS := CXX_SRCS := CMD_UPPER_SRCS := ELF_SRCS := C43_SRCS := S55_SRCS := LD_UPPER_SRCS := C62_SRCS := S_UPPER_SRCS := A_SRCS := SA_SRCS := C55_SRCS := LDS_UPPER_SRCS := C_UPPER_SRCS := OUT_SRCS := INO_SRCS := OBJ_SRCS := S62_SRCS := LIB_SRCS := PDE_SRCS := ASM_SRCS := ASM_UPPER_SRCS := C++_SRCS := CLA_SRCS := S??_SRCS := C_SRCS := C67_SRCS := S_SRCS := S43_SRCS := OPT_SRCS := C64_SRCS := CC_SRCS := C??_SRCS := S64_SRCS := OBJS := BIN_OUTPUTS := S_DEPS := S_UPPER_DEPS := S62_DEPS := C64_DEPS := ASM_DEPS := CC_DEPS := S55_DEPS := C67_DEPS := CLA_DEPS := C??_DEPS := CPP_DEPS := S??_DEPS := C_DEPS := C62_DEPS := EXE_OUTPUTS := CXX_DEPS := C++_DEPS := ASM_UPPER_DEPS := K_DEPS := C43_DEPS := INO_DEPS := S67_DEPS := SA_DEPS := S43_DEPS := OPT_DEPS := PDE_DEPS := S64_DEPS := C_UPPER_DEPS := C55_DEPS := CPP_DEPS__QUOTED := C67_DEPS__QUOTED := INO_DEPS__QUOTED := C??_DEPS__QUOTED := S_UPPER_DEPS__QUOTED := CLA_DEPS__QUOTED := ASM_UPPER_DEPS__QUOTED := C62_DEPS__QUOTED := CXX_DEPS__QUOTED := EXE_OUTPUTS__QUOTED := S67_DEPS__QUOTED := BIN_OUTPUTS__QUOTED := C_DEPS__QUOTED := C_UPPER_DEPS__QUOTED := OPT_DEPS__QUOTED := S_DEPS__QUOTED := K_DEPS__QUOTED := S??_DEPS__QUOTED := C64_DEPS__QUOTED := C++_DEPS__QUOTED := OBJS__QUOTED := CC_DEPS__QUOTED := S43_DEPS__QUOTED := S55_DEPS__QUOTED := SA_DEPS__QUOTED := C55_DEPS__QUOTED := PDE_DEPS__QUOTED := C43_DEPS__QUOTED := S62_DEPS__QUOTED := ASM_DEPS__QUOTED := S64_DEPS__QUOTED := # Every subdirectory with source files must be described here SUBDIRS := \ . \
GPIO_MSP432asm/Debug/subdir_rules.mk
################################################################################ # Automatically-generated file. Do not edit! ################################################################################ # Each subdirectory must supply rules for building sources it contributes main.obj: ../main.asm $(GEN_OPTS) $(GEN_HDRS) @echo 'Building file: $<' @echo 'Invoking: MSP432 Compiler' "C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/bin/armcl" -mv7M4 --code_state=16 --float_support=FPv4SPD16 --abi=eabi -me --include_path="C:/ti/ccsv6/ccs_base/arm/include" --include_path="C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/include" --include_path="C:/ti/ccsv6/ccs_base/arm/include/CMSIS" --advice:power=all -g --gcc --define=__MSP432P401R__ --define=TARGET_IS_MSP432P4XX --define=ccs --diag_wrap=off --display_error_number --diag_warning=225 --preproc_with_compile --preproc_dependency="main.pp" $(GEN_OPTS__FLAG) "$<" @echo 'Finished building: $<' @echo ' ' msp432_startup_ccs.obj: ../msp432_startup_ccs.c $(GEN_OPTS) $(GEN_HDRS) @echo 'Building file: $<' @echo 'Invoking: MSP432 Compiler' "C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/bin/armcl" -mv7M4 --code_state=16 --float_support=FPv4SPD16 --abi=eabi -me --include_path="C:/ti/ccsv6/ccs_base/arm/include" --include_path="C:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.7/include" --include_path="C:/ti/ccsv6/ccs_base/arm/include/CMSIS" --advice:power=all -g --gcc --define=__MSP432P401R__ --define=TARGET_IS_MSP432P4XX --define=ccs --diag_wrap=off --display_error_number --diag_warning=225 --preproc_with_compile --preproc_dependency="msp432_startup_ccs.pp" $(GEN_OPTS__FLAG) "$<" @echo 'Finished building: $<' @echo ' '
GPIO_MSP432asm/Debug/subdir_vars.mk
################################################################################ # Automatically-generated file. Do not edit! ################################################################################ # Add inputs and outputs from these tool invocations to the build variables CMD_SRCS += \ ../msp432p401r.cmd ASM_SRCS += \ ../main.asm C_SRCS += \ ../msp432_startup_ccs.c OBJS += \ ./main.obj \ ./msp432_startup_ccs.obj ASM_DEPS += \ ./main.pp C_DEPS += \ ./msp432_startup_ccs.pp C_DEPS__QUOTED += \ "msp432_startup_ccs.pp" OBJS__QUOTED += \ "main.obj" \ "msp432_startup_ccs.obj" ASM_DEPS__QUOTED += \ "main.pp" ASM_SRCS__QUOTED += \ "../main.asm" C_SRCS__QUOTED += \ "../msp432_startup_ccs.c"
GPIO_MSP432asm/main.asm
; GPIO.asm ; Runs on MSP432 ; Initialize four GPIO pins as outputs. Continually generate output to ; drive simulated stepper motor. ; Daniel Valvano ; June 20, 2015 ; This example accompanies the book ; "Embedded Systems: Introduction to the MSP432 Microcontroller", ; ISBN: 978-1512185676, Jonathan Valvano, copyright (c) 2015 ; Volume 1 Program 4.5 ; ;Copyright 2015 by Jonathan W. Valvano, [email protected] ; You may use, edit, run or distribute this file ; as long as the above copyright notice remains ;THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED ;OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF ;MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ;VALVANO SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, ;OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. ;For more information about my classes, my research, and my books, see ;http://users.ece.utexas.edu/~valvano/ ; P4.3 is an output to LED3, negative logic ; P4.2 is an output to LED2, negative logic ; P4.1 is an output to LED1, negative logic ; P4.0 is an output to LED0, negative logic .thumb .text .align 2 P4IN .field 0x40004C21,32 ; Port 4 Input P4OUT .field 0x40004C23,32 ; Port 4 Output P4DIR .field 0x40004C25,32 ; Port 4 Direction P4REN .field 0x40004C27,32 ; Port 4 Resistor Enable P4SEL0 .field 0x40004C2B,32 ; Port 4 Select 0 P4SEL1 .field 0x40004C2D,32 ; Port 4 Select 1 .global main .thumbfunc main GPIO_Init: .asmfunc ; initialize P4.3-P4.0 and make them outputs LDR R1, P4SEL0 LDRB R0, [R1] BIC R0, R0, #0x0F ; configure stepper motor/LED pins as GPIO STRB R0, [R1] LDR R1, P4SEL1 LDRB R0, [R1] BIC R0, R0, #0x0F ; configure stepper motor/LED pins as GPIO STRB R0, [R1] ; make stepper motor/LED pins out LDR R1, P4DIR LDRB R0, [R1] ORR R0, R0, #0x0F ; output direction STRB R0, [R1] BX LR .endasmfunc main: .asmfunc BL GPIO_Init LDR R1, P4OUT ; R0 = LEDS loop ; first output: 1010, LED is 0101 LDRB R0, [R1] BIC R0, R0, #0x0F ORR R0, R0, #10 ; output value = 10 STRB R0, [R1] ; second output: 1001, LED is 0110 LDRB R0, [R1] BIC R0, R0, #0x0F ORR R0, R0, #9 ; output value = 9 STRB R0, [R1] ; third output: 0101, LED is 1010 LDRB R0, [R1] BIC R0, R0, #0x0F ORR R0, R0, #5 ; output value = 5 STRB R0, [R1] ; fourth output: 0110, LED is 1001 LDRB R0, [R1] BIC R0, R0, #0x0F ORR R0, R0, #6 ; output value = 6 STRB R0, [R1] B loop .endasmfunc .end
GPIO_MSP432asm/msp432_startup_ccs.c
//***************************************************************************** // // Copyright (C) 2012 - 2014 Texas Instruments Incorporated - http://www.ti.com/ // // Redistribution and use in source and binary forms, with or without // modification, are permitted provided that the following conditions // are met: // // Redistributions of source code must retain the above copyright // notice, this list of conditions and the following disclaimer. // // Redistributions in binary form must reproduce the above copyright // notice, this list of conditions and the following disclaimer in the // documentation and/or other materials provided with the // distribution. // // Neither the name of Texas Instruments Incorporated nor the names of // its contributors may be used to endorse or promote products derived // from this software without specific prior written permission. // // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. // // MSP432 Family Interrupt Vector Table for CGT // //**************************************************************************** #include <stdint.h> /* Forward declaration of the default fault handlers. */ static void resetISR(void); static void nmiISR(void); static void faultISR(void); static void defaultISR(void); //Weak Function Deffinitions, can be written / declared in other files extern void SVC_Handler(void) __attribute__((weak)); /* SVCall handler */ extern void DebugMon_Handler(void) __attribute__((weak)); /* Debug monitor handler */ extern void PendSV_Handler(void) __attribute__((weak)); /* The PendSV handler */ extern void SysTick_Handler(void) __attribute__((weak)); /* The SysTick handler */ extern void PSS_IRQHandler(void) __attribute__((weak)); /* PSS ISR */ extern void CS_IRQHandler(void) __attribute__((weak)); /* CS ISR */ extern void PCM_IRQHandler(void) __attribute__((weak)); /* PCM ISR */ extern void WDT_A_IRQHandler(void) __attribute__((weak)); /* WDT ISR */ extern void FPU_IRQHandler(void) __attribute__((weak)); /* FPU ISR */ extern void FLCTL_IRQHandler(void) __attribute__((weak)); /* FLCTL ISR */ extern void COMP_E0_IRQHandler(void) __attribute__((weak)); /* COMP0 ISR */ extern void COMP_E1_IRQHandler(void) __attribute__((weak)); /* COMP1 ISR */ extern void TA0_0_IRQHandler(void) __attribute__((weak)); /* TA0_0 ISR */ extern void TA0_N_IRQHandler(void) __attribute__((weak)); /* TA0_N ISR */ extern void TA1_0_IRQHandler(void) __attribute__((weak)); /* TA1_0 ISR */ extern void TA1_N_IRQHandler(void) __attribute__((weak)); /* TA1_N ISR */ extern void TA2_0_IRQHandler(void) __attribute__((weak)); /* TA2_0 ISR */ extern void TA2_N_IRQHandler(void) __attribute__((weak)); /* TA2_N ISR */ extern void TA3_0_IRQHandler(void) __attribute__((weak)); /* TA3_0 ISR */ extern void TA3_N_IRQHandler(void) __attribute__((weak)); /* TA3_N ISR */ extern void EUSCIA0_IRQHandler(void) __attribute__((weak)); /* EUSCIA0 ISR */ extern void EUSCIA1_IRQHandler(void) __attribute__((weak)); /* EUSCIA1 ISR */ extern void EUSCIA2_IRQHandler(void) __attribute__((weak)); /* EUSCIA2 ISR */ extern void EUSCIA3_IRQHandler(void) __attribute__((weak)); /* EUSCIA3 ISR */ extern void EUSCIB0_IRQHandler(void) __attribute__((weak)); /* EUSCIB0 ISR */ extern void EUSCIB1_IRQHandler(void) __attribute__((weak)); /* EUSCIB1 ISR */ extern void EUSCIB2_IRQHandler(void) __attribute__((weak)); /* EUSCIB2 ISR */ extern void EUSCIB3_IRQHandler(void) __attribute__((weak)); /* EUSCIB3 ISR */ extern void ADC14_IRQHandler(void) __attribute__((weak)); /* ADC14 ISR */ extern void T32_INT1_IRQHandler(void) __attribute__((weak)); /* T32_INT1 ISR */ extern void T32_INT2_IRQHandler(void) __attribute__((weak)); /* T32_INT2 ISR */ extern void T32_INTC_IRQHandler(void) __attribute__((weak)); /* T32_INTC ISR */ extern void AES256_IRQHandler(void) __attribute__((weak)); /* AES ISR */ extern void RTC_C_IRQHandler(void) __attribute__((weak)); /* RTC ISR */ extern void DMA_ERR_IRQHandler(void) __attribute__((weak)); /* DMA_ERR ISR */ extern void DMA_INT3_IRQHandler(void) __attribute__((weak)); /* DMA_INT3 ISR */ extern void DMA_INT2_IRQHandler(void) __attribute__((weak)); /* DMA_INT2 ISR */ extern void DMA_INT1_IRQHandler(void) __attribute__((weak)); /* DMA_INT1 ISR */ extern void DMA_INT0_IRQHandler(void) __attribute__((weak)); /* DMA_INT0 ISR */ extern void PORT1_IRQHandler(void) __attribute__((weak)); /* PORT1 ISR */ extern void PORT2_IRQHandler(void) __attribute__((weak)); /* PORT2 ISR */ extern void PORT3_IRQHandler(void) __attribute__((weak)); /* PORT3 ISR */ extern void PORT4_IRQHandler(void) __attribute__((weak)); /* PORT4 ISR */ extern void PORT5_IRQHandler(void) __attribute__((weak)); /* PORT5 ISR */ extern void PORT6_IRQHandler(void) __attribute__((weak)); /* PORT6 ISR */ /* External declaration for the reset handler that is to be called when the */ /* processor is started */ extern void _c_int00(void); /* Linker variable that marks the top of the stack. */ extern unsigned long __STACK_END; /* External declarations for the interrupt handlers used by the application. */ /* To be added by user */ /* Intrrupt vector table. Note that the proper constructs must be placed on this to */ /* ensure that it ends up at physical address 0x0000.0000 or at the start of */ /* the program if located at a start address other than 0. */ #pragma DATA_SECTION(interruptVectors, ".intvecs") void (* const interruptVectors[])(void) = { (void (*)(void))((uint32_t)&__STACK_END), /* The initial stack pointer */ resetISR, /* The reset handler */ nmiISR, /* The NMI handler */ faultISR, /* The hard fault handler */ defaultISR, /* The MPU fault handler */ defaultISR, /* The bus fault handler */ defaultISR, /* The usage fault handler */ 0, /* Reserved */ 0, /* Reserved */ 0, /* Reserved */ 0, /* Reserved */ SVC_Handler, /* SVCall handler */ DebugMon_Handler, /* Debug monitor handler */ 0, /* Reserved */ PendSV_Handler, /* The PendSV handler */ SysTick_Handler, /* The SysTick handler */ PSS_IRQHandler, /* PSS ISR */ CS_IRQHandler, /* CS ISR */ PCM_IRQHandler, /* PCM ISR */ WDT_A_IRQHandler, /* WDT ISR */ FPU_IRQHandler, /* FPU ISR */ FLCTL_IRQHandler, /* FLCTL ISR */ COMP_E0_IRQHandler, /* COMP0 ISR */ COMP_E1_IRQHandler, /* COMP1 ISR */ TA0_0_IRQHandler, /* TA0_0 ISR */ TA0_N_IRQHandler, /* TA0_N ISR */ TA1_0_IRQHandler, /* TA1_0 ISR */ TA1_N_IRQHandler, /* TA1_N ISR */ TA2_0_IRQHandler, /* TA2_0 ISR */ TA2_N_IRQHandler, /* TA2_N ISR */ TA3_0_IRQHandler, /* TA3_0 ISR */ TA3_N_IRQHandler, /* TA3_N ISR */ EUSCIA0_IRQHandler, /* EUSCIA0 ISR */ EUSCIA1_IRQHandler, /* EUSCIA1 ISR */ EUSCIA2_IRQHandler, /* EUSCIA2 ISR */ EUSCIA3_IRQHandler, /* EUSCIA3 ISR */ EUSCIB0_IRQHandler, /* EUSCIB0 ISR */ EUSCIB1_IRQHandler, /* EUSCIB1 ISR */ EUSCIB2_IRQHandler, /* EUSCIB2 ISR */ EUSCIB3_IRQHandler, /* EUSCIB3 ISR */ ADC14_IRQHandler, /* ADC14 ISR */ T32_INT1_IRQHandler, /* T32_INT1 ISR */ T32_INT2_IRQHandler, /* T32_INT2 ISR */ T32_INTC_IRQHandler, /* T32_INTC ISR */ AES256_IRQHandler, /* AES ISR */ RTC_C_IRQHandler, /* RTC ISR */ DMA_ERR_IRQHandler, /* DMA_ERR ISR */ DMA_INT3_IRQHandler, /* DMA_INT3 ISR */ DMA_INT2_IRQHandler, /* DMA_INT2 ISR */ DMA_INT1_IRQHandler, /* DMA_INT1 ISR */ DMA_INT0_IRQHandler, /* DMA_INT0 ISR */ PORT1_IRQHandler, /* PORT1 ISR */ PORT2_IRQHandler, /* PORT2 ISR */ PORT3_IRQHandler, /* PORT3 ISR */ PORT4_IRQHandler, /* PORT4 ISR */ PORT5_IRQHandler, /* PORT5 ISR */ PORT6_IRQHandler, /* PORT6 ISR */ defaultISR, /* Reserved 41 */ defaultISR, /* Reserved 42 */ defaultISR, /* Reserved 43 */ defaultISR, /* Reserved 44 */ defaultISR, /* Reserved 45 */ defaultISR, /* Reserved 46 */ defaultISR, /* Reserved 47 */ defaultISR, /* Reserved 48 */ defaultISR, /* Reserved 49 */ defaultISR, /* Reserved 50 */ defaultISR, /* Reserved 51 */ defaultISR, /* Reserved 52 */ defaultISR, /* Reserved 53 */ defaultISR, /* Reserved 54 */ defaultISR, /* Reserved 55 */ defaultISR, /* Reserved 56 */ defaultISR, /* Reserved 57 */ defaultISR, /* Reserved 58 */ defaultISR, /* Reserved 59 */ defaultISR, /* Reserved 60 */ defaultISR, /* Reserved 61 */ defaultISR, /* Reserved 62 */ defaultISR, /* Reserved 63 */ defaultISR /* Reserved 64 */ }; /* This is the code that gets called when the processor first starts execution */ /* following a reset event. Only the absolutely necessary set is performed, */ /* after which the application supplied entry() routine is called. Any fancy */ /* actions (such as making decisions based on the reset cause register, and */ /* resetting the bits in that register) are left solely in the hands of the */ /* application. */ void resetISR(void) { /* Jump to the CCS C Initialization Routine. */ __asm(" .global _c_int00\n" " LDR R0,WDT\n" " LDR R1,HOLD\n" " STRH R1,[R0]\n" // turn off watchdog " b.w _c_int00\n" "WDT .field 0x4000480C,32\n" // pointer to 16-bit register "HOLD .field 0x00005A80,32"); // WDTPW | WDTHOLD } /* This is the code that gets called when the processor receives a NMI. This */ /* simply enters an infinite loop, preserving the system state for examination */ /* by a debugger. */ static void nmiISR(void) { /* Fault trap exempt from ULP advisor */ #pragma diag_push #pragma CHECK_ULP("-2.1") /* Enter an infinite loop. */ while(1) { } #pragma diag_pop } /* This is the code that gets called when the processor receives a fault */ /* interrupt. This simply enters an infinite loop, preserving the system state */ /* for examination by a debugger. */ static void faultISR(void) { /* Fault trap exempt from ULP advisor */ #pragma diag_push #pragma CHECK_ULP("-2.1") /* Enter an infinite loop. */ while(1) { } #pragma diag_pop } /* This is the code that gets called when the processor receives an unexpected */ /* interrupt. This simply enters an infinite loop, preserving the system state */ /* for examination by a debugger. */ static void defaultISR(void) { /* Fault trap exempt from ULP advisor */ #pragma diag_push #pragma CHECK_ULP("-2.1") /* Enter an infinite loop. */ while(1) { } #pragma diag_pop } //These Functions are all weakly defined, so the user can write over them in an external file void SVC_Handler(void){ while(1){}} /* SVCall handler */ void DebugMon_Handler(void){ while(1){}} /* Debug monitor handler */ void PendSV_Handler(void){ while(1){}} void SysTick_Handler(void){ while(1){}} void PSS_IRQHandler(void){ while(1){}} /* PSS ISR */ void CS_IRQHandler(void){ while(1){}} /* CS ISR */ void PCM_IRQHandler(void){ while(1){}} /* PCM ISR */ void WDT_A_IRQHandler(void){ while(1){}} /* WDT ISR */ void FPU_IRQHandler(void){ while(1){}} /* FPU ISR */ void FLCTL_IRQHandler(void){ while(1){}} /* FLCTL ISR */ void COMP_E0_IRQHandler(void){ while(1){}} /* COMP0 ISR */ void COMP_E1_IRQHandler(void){ while(1){}} /* COMP1 ISR */ void TA0_0_IRQHandler(void){ while(1){}} /* TA0_0 ISR */ void TA0_N_IRQHandler(void){ while(1){}} /* TA0_N ISR */ void TA1_0_IRQHandler(void){ while(1){}} /* TA1_0 ISR */ void TA1_N_IRQHandler(void){ while(1){}} /* TA1_N ISR */ void TA2_0_IRQHandler(void){ while(1){}} /* TA2_0 ISR */ void TA2_N_IRQHandler(void){ while(1){}} /* TA2_N ISR */ void TA3_0_IRQHandler(void){ while(1){}} /* TA3_0 ISR */ void TA3_N_IRQHandler(void){ while(1){}} /* TA3_N ISR */ void EUSCIA0_IRQHandler(void){ while(1){}} /* EUSCIA0 ISR */ void EUSCIA1_IRQHandler(void){ while(1){}} /* EUSCIA1 ISR */ void EUSCIA2_IRQHandler(void){ while(1){}} /* EUSCIA2 ISR */ void EUSCIA3_IRQHandler(void){ while(1){}} /* EUSCIA3 ISR */ void EUSCIB0_IRQHandler(void){ while(1){}} /* EUSCIB0 ISR */ void EUSCIB1_IRQHandler(void){ while(1){}} /* EUSCIB1 ISR */ void EUSCIB2_IRQHandler(void){ while(1){}} /* EUSCIB2 ISR */ void EUSCIB3_IRQHandler(void){ while(1){}} /* EUSCIB3 ISR */ void ADC14_IRQHandler(void){ while(1){}} /* ADC14 ISR */ void T32_INT1_IRQHandler(void){ while(1){}} /* T32_INT1 ISR */ void T32_INT2_IRQHandler(void){ while(1){}} /* T32_INT2 ISR */ void T32_INTC_IRQHandler(void){ while(1){}} /* T32_INTC ISR */ void AES256_IRQHandler(void){ while(1){}} /* AES ISR */ void RTC_C_IRQHandler(void){ while(1){}} /* RTC ISR */ void DMA_ERR_IRQHandler(void){ while(1){}} /* DMA_ERR ISR */ void DMA_INT3_IRQHandler(void){ while(1){}} /* DMA_INT3 ISR */ void DMA_INT2_IRQHandler(void){ while(1){}} /* DMA_INT2 ISR */ void DMA_INT1_IRQHandler(void){ while(1){}} /* DMA_INT1 ISR */ void DMA_INT0_IRQHandler(void){ while(1){}} /* DMA_INT0 ISR */ void PORT1_IRQHandler(void){ while(1){}} /* PORT1 ISR */ void PORT2_IRQHandler(void){ while(1){}} /* PORT2 ISR */ void PORT3_IRQHandler(void){ while(1){}} /* PORT3 ISR */ void PORT4_IRQHandler(void){ while(1){}} /* PORT4 ISR */ void PORT5_IRQHandler(void){ while(1){}} /* PORT5 ISR */ void PORT6_IRQHandler(void){ while(1){}} /* PORT6 ISR */ //****************************************************************************** // // Useful functions. // //****************************************************************************** extern void DisableInterrupts(void) ; extern void EnableInterrupts(void) ; extern void StartCritical(void) ; extern void EndCritical(void); extern void WaitForInterrupt (void); //*********** DisableInterrupts *************** // disable interrupts // inputs: none // outputs: none void DisableInterrupts(void){ __asm (" CPSID I\n" " BX LR\n"); } //*********** EnableInterrupts *************** // emable interrupts // inputs: none // outputs: none void EnableInterrupts(void){ __asm (" CPSIE I\n" " BX LR\n"); } //*********** StartCritical ************************ // make a copy of previous I bit, disable interrupts // inputs: none // outputs: previous I bit void StartCritical(void){ __asm (" MRS R0, PRIMASK ; save old status \n" " CPSID I ; mask all (except faults)\n" " BX LR\n"); } //*********** EndCritical ************************ // using the copy of previous I bit, restore I bit to previous value // inputs: previous I bit // outputs: none void EndCritical(void){ __asm (" MSR PRIMASK, R0\n" " BX LR\n"); } //*********** WaitForInterrupt ************************ // go to low power mode while waiting for the next interrupt // inputs: none // outputs: none void WaitForInterrupt(void){ __asm (" WFI\n" " BX LR\n"); }
GPIO_MSP432asm/msp432p401r.cmd
/****************************************************************************** * * Copyright (C) 2012 - 2015 Texas Instruments Incorporated - http://www.ti.com/ * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Default linker command file for Texas Instruments MSP432P401R * * File creation date: 2015-01-20 * *****************************************************************************/ --retain=interruptVectors --retain=flashMailbox MEMORY { MAIN (RX) : origin = 0x00000000, length = 0x00040000 INFO (RX) : origin = 0x00200000, length = 0x00004000 SRAM_CODE (RWX): origin = 0x01000000, length = 0x00010000 SRAM_DATA (RW) : origin = 0x20000000, length = 0x00010000 } /* The following command line options are set as part of the CCS project. */ /* If you are building using the command line, or for some reason want to */ /* define them here, you can uncomment and modify these lines as needed. */ /* If you are using CCS for building, it is probably better to make any such */ /* modifications in your CCS project and leave this file alone. */ /* */ /* A heap size of 1024 bytes is recommended when you plan to use printf() */ /* for debug output to the console window. */ /* */ /* --heap_size=1024 */ /* --stack_size=512 */ /* --library=rtsv7M4_T_le_eabi.lib */ /* Section allocation in memory */ SECTIONS { .intvecs: > 0x00000000 .text : > MAIN .const : > MAIN .cinit : > MAIN .pinit : > MAIN .flashMailbox : > 0x00200000 .vtable : > 0x20000000 .data : > SRAM_DATA .bss : > SRAM_DATA .sysmem : > SRAM_DATA .stack : > SRAM_DATA (HIGH) } /* Symbolic definition of the WDTCTL register for RTS */ WDTCTL_SYM = 0x4000480C;
GPIO_MSP432asm/targetConfigs/MSP432P401R.ccxml
GPIO_MSP432asm/targetConfigs/readme.txt
The 'targetConfigs' folder contains target-configuration (.ccxml) files, automatically generated based on the device and connection settings specified in your project on the Properties > General page. Please note that in automatic target-configuration management, changes to the project's device and/or connection settings will either modify an existing or generate a new target-configuration file. Thus, if you manually edit these auto-generated files, you may need to re-apply your changes. Alternatively, you may create your own target-configuration file for this project and manage it manually. You can always switch back to automatic target-configuration management by checking the "Manage the project's target-configuration automatically" checkbox on the project's Properties > General page.
