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COMPUTER ARCHITECTURE I

FINAL EXAM

Length of Examination: 3 hrs

Problem 1. (22 points) Short questions.

1. Which of the following choice(s) is/are correct? A penalty will be applied for every wrong answer. (a) (4 pts) All sequential circuits can be implemented using

only JK flip-flops and NOT gates

only T flip-flops and NAND gates

only D flip-flops and AND gates only D flip-flops and NAND gates

(b) (4 pts) An overflow can occur after

the subtraction of two signed numbers

the addition of two unsigned numbers

a logic shift left

an arithmetic shift right

2. Perform the following conversions.

(a) (2 pts) (AB.2AD)16 = ( 171.1672 )10

(b) (2 pts) (10010.0)2 = ( 20 ) 9

3. A digital computer represents its floating point numbers using a signed 6-bit exponent and a signed

normalized 10-bit mantissa. Negative exponent and mantissa values are expressed in 2's complement. Show the binary values of the exponent and mantissa to represent (21.1)8.

10-bit mantissa= - ---'0100010010-----

6-bit exponent= _..00101

4. Using Table 6, translate the following machine codes to their equivalent assembly instructions.

Machine code (in Hex.) Equivalent in assembly

ecce BUN CCC I

1234 ADD 234

DCBA BSA CBA I

7002 SZE

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Problem 2. (20 points) A JK flip-flop A is used by a CPU to perform the following micro-operations (in RTL):

xT1 :A 0 Reset A to 0

yT2: A 1 Set A to 1

vT3: A 1 Set A to 1

Otherwise the content of A remains the same. The signals T1 , T2, ... are outputs of a decoder.

1. Draw the logic diagram of the control circuit governing the flip-flop A.

2. The above micro-operations are replaced by the following ones:

Without using excitation tables and K-maps, draw the new logic diagram of the control circuit governing the flip-flop A.

Problem 3. (26 points) Consider Program 1.

1. Use Table 6 to translate Program 1 in its equivalent machine code by specifying the machine code of each instruction/operand (in hexadecimal), and its address in the memory (in hexadecimal)

Program 1: Assembly program

ORG 0

X, HEX 0

ORG 17

Y, LDA A

SZA

LDA B

INC

STA C

HLT

ORG 100 A, 0

B, DEC 14

C, HEX 000A

END

I Address in Hex I Content in Hex I

2. After the execution of the program, what is the content (in hexadecimal) of the word with the symbolic address C? 0001

3. After the execution of the program, what is the content (in hexadecimal) of the register AC? AC = 0001

4. After the execution of the program, what is the content (in hexadecimal) of the word with address zero?

M[0] = 0000

0000

0000

0017 2100

0018 7004

0019 2101

001A 7020

001B 3102

001C 7001

0100 0000

0101 OOOE

0102 OOOA

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Problem 4. (20 points)

SRT, 0 Solution: IDA 160 CIR ORG 50 SZE CLA BUN EXT STA 161 LDA 161 LOP, LDA PTR I

INC STA 160 STA 161 BSA SRT EXT, BUN SRT l ISZ PTR

ISZ CTR BUN LOP HLT

PTR, 100 CTR, FFFO /DEC -16

Problem 5. (36 points) Consider the computer of Lab 3, the architecture of which is described in Figure 1 and Tables 1, 2, 3, 4, and 5. The instruction type is determined by the 2 most significant bits of the 8- bit register IR, as follows:

• Xo = IR’(7) IR’(6) denotes a memory-referenced instruction (MRI) in direct addressing mode; • X1 = IR’(7) IR(6) denotes a register-referenced instruction (RRI); and • X2 = IR(7) IR’(6) denotes a memory-referenced instruction (MRI) in indirect addressing mode. The flip-flop S is a STOP register which prevents PC from being incremented if S = 1. Assume that all registers are equipped with 3 control bits for loading the register, increment it by 1, and reset it to zero.

1. Find the list of all the micro-operations which use the bus and group them according to the register to be

placed on the bus (IR, AR, PC, etc.)

2. Draw the logic diagram of the control circuit which governs the bus.

3. Find the list of all the micro-operation which change: the value of register PC. " 4. Draw the logic diagram of the control circuit of PC.

This part is independent of part 1. Assume that 16 operands are stored in the memory starting from address 100 (Hex.) Write an assembly program to count the number of even operands and store it at address 161 (Hex.) The program should start at address 50 (Hex.) and use the subroutine SRT (of part 1). Do not exceed 14 lines of code.

1. Write an assembly subroutine (not a service routine) whose symbolic base address is SRT=200 (Hex.) to increment the content of address 161 (Hex.) if address 160 (Hex.) contains an even number. Do not exceed 12 lines of code.

Register Control functions

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Figure 1: 8-bit CPU architecture

Appendix

l OM oARc PSD|72 78 6 90

l OM oARc PSD|72 78 6 90

  • COMPUTER ARCHITECTURE I
    • only T flip-flops and NAND gates
    • only D flip-flops and NAND gates