Computer Systems Architecture
DLLM
Figures5.28.pdf
Read register 1
Read register 2
Write register
Write data
Registers ALU Zero
Read data 1
Read data 2
Sign extend
16 32
Instruction [31–26]
Instruction [25–21]
Instruction [20–16]
Instruction [15–0]
ALU result
M u x
M u x
Shift left 2
Shift left 2
Instruction register
PC 0
1
M u x
0
1
M u x
0
1
M u x
0
1 A
B 0 1 2 3
M u x
0
1
2
ALUOut
Instruction [15–0]
Memory data
register
Address
Write data
Memory MemData
4
Instruction [15–11]
PCWriteCond
PCWrite
IorD
MemRead
MemWrite
MemtoReg
IRWrite
PCSource
ALUOp
ALUSrcB
ALUSrcA
RegWrite
RegDst
26 28
Outputs
Control
Op [5–0]
ALU control
PC [31–28]
Instruction [25-0]
Instruction [5–0]
Jump address [31–0]
