Discussion: Multiplexers
DeezPump
EET130_U6_CombinationalLogicFunctions.pdf
EET 130– Digital Systems I
Combinational Logic Functions
2
Outline of the lecture
Half Adders and Full Adders
Parallel Binary Adders
Comparators
Decoders and Encoders
Multiplexers and Demultiplexers
Code Converters
Objective of the Lecture
After successful completion of the lecture students will be able to:
Distinguish between half adders and full adders
Use full adders to implement multibit parallel binary adders
Explain how a comparator operates and use comparators to compare
two binary numbers
State the function of decoders
Design 4 line to 16 line decoders
Design BCD to 7 segment decoders
Design BCD - to - Binary Code converter
Design Binary – to – Gray code converter
Design Gray – to – Binary code converter
State the function of encoders.
State the function of multiplexers and demultiplexers circuits.
3
The Half-Adder
Basic rule for binary addition.
The operations are performed by a logic ckt
called a half-adder.
The Half-Adder
The half-adder accepts two
binary digits on its inputs and
produces two binary digits on
its outputs, a sum bit and a
carry bit.
The Full-Adder
The full-adder accepts two input bits and an input carry and
generates a sum output and an output carry.
Full-Adder Logic
The Full-Adder
Parallel Binary Adders
Two or more full adders are connected to form
parallel binary adders.
To add two binary numbers, a full-adder is required for
each bit in the numbers.
So, for 2-bit numbers, two adders are needed.
Parallel Binary Adders
The carry output of each adder is connected
to the carry input of the next higher-order
adder.
Four-Bit Parallel Adders
A group of 4 bits is called a nibble. A basic
4-bit parallel adder is implemented with
four full-adder stages as shown.
Four-Bit Parallel Adders
The carry output of each adder is connected to the carry input of the next higher-order adder as indicated. These are called internal carries.
Comparators
To compare the magnitude of two binary
quantities to determine the relationship of
those quantities.
The simplest form a comparator ckt
determines whether two numbers are equal.
Equality
XOR gate can be used as a 2-bit comparator.
To compare binary numbers containing two bits each:
Inequality
Many IC comparators provide additional outputs
that indicate which of the two binary numbers
being compared is the larger.
Inequality
To determine an inequality of
binary numbers A and B, you first
examine the highest-order bit in
each number:
If A3=1 and B3=0 number A is
greater than number B
If A3=0 and B3=1 number A is less
than number B
If A3=B3 you must examine the
next lower bit position for an equality
Comparator
17
A3
(A<B)
B3
A2
B2
A1
B1
A0
B0
(A>B)
(A=B)
x3
x2
x1
x0
Decoders
A decoder detects the presence of a specified
combination of bits (code) on its inputs and
indicates the presence of that code by a specified
output level.
In its general form, a decoder has n input lines to
handle n bits and forms one to 2n output lines to
indicate the presence of one or more n-bit
combinations.
Decoders
19
Extract “Information” from the code
Binary Decoder
Example: 2-bit Binary Number
The Basic Binary Decoder
Suppose we need to determine when a
binary 1001 occurs on the inputs of a digital
ckt.
Decoders
A combinational circuit that converts binary information
from n coded inputs to a maximum 2n coded outputs → n
to 2n decoder
n-to-m decoder, m 2n
Examples: BCD-to-7-segment decoder,
where n = 4 and m = 10
Enable input: it must be on (active) for the decoder to
function, otherwise its outputs assume a single "disabled"
output code word
21
22
Decoders
Only one output is HIGH for each input code
23
2-to-4 Decoder
This is what a 2-to-4 decoder looks like on the inside
24
Three-line-to 8-line Decoder
Three inputs, A, B, C, are decoded into
eight outputs, O0 through O7
Each output Oi represents one of the
minterms of the 3 input variables
Di = 1 when the binary number CBA =
001
Shorthand: Di = mi
The output variables are mutually
exclusive; exactly one output has the
value 1 at any time, and the other seven
are 0
25
74138 Decoder W/Enable
Logic diagram for the 74LS138 decoder
The BCD-to-Decimal Decoder
The BCD-to- decimal converts each BCD code into one of ten possible decimal digit indications.
Called 4-line-to- 10-line decoder or 1-of-10 decoder
The BCD-to-Decimal Decoder
The BCD-to-7-Segment Decoder
The BCD-to-7-
segment decoder
accepts the BCD code
on its inputs and
provides outputs to
drive 7-segment
display devices to
produce a decimal
readout.
The BCD-to-7-Segment Decoder (The Application)
30
BCD-to-Decimal Decoders
Does not have an enable
input
Can be used as a 3-to-8
decoder with the D input
used as an enable input
(a) Logic diagram for the 7442 BCD-to-decimal decoder
(a) logic symbol (b) truth table
31
BCD to 7 Segment Decoder/Drivers
Common-anode: requires VCC , LED ON when Output is LOW
Common-cathode : NO VCC , LED ON when Output is HIGH
TTL and CMOS devices are
normally not used to drive the
common-cathode display directly
because of current (mA)
requirement. A buffer circuit is
used between the decoder chips
and common-cathode display
32
Implementing Boolean Functions with Decoders
A decoder can be conveniently used to implement a given
Boolean function
The decoder generates the required minterms and an
external OR gate is used to produce the sum of minterms
Figure on next slide shows the logic diagram where a 3-to-
8 line decoder is used to generate the Boolean function
given by the equation
CBACBACBACBAY ••+••+••+••=
33
Implementing Boolean Functions with Decoders
In general, an n-to-2n decoder and an
external m inputs OR gate can be used to
implement any combinational circuit with n
inputs and m outputs
Encoders
An encoder is a combinational logic ckt that
essentially performs a “reverse” decoder
function.
An encoder accepts an active level on one
of its inputs representing a digit, such as a
decimal or octal digit, and converts it to a
coded output such as BCD or binary.
Encoders can also be devised to encode
various symbols and alphabetic characters.
The Decimal-to-BCD Encoder
It has 10 inputs
and 4 outputs
corresponding to
the BCD code.
A3 = 8+9
A2 = 4+5+6+7
A1 = 2+3+6+7
A0 =
1+3+5+7+9
The Decimal-to-BCD Encoder
NOTE: A 0-digit input is not needed because the BCD outputs are all LOW when there are no HIGH input.
The Decimal-to-BCD Encoder (The
Application)
Prepared by K.T. NG 38
8-Line-To-3-Line Encoder
Note that A0 is not internally connected (A1 … A7=1111111, then
Q2Q1Q0=000)
Only one input should be low. Example: If A3 = A5 = 0, and all other
are High, then Q2Q1Q0 = 0112 (=310), NOT ACCEPTABLE
Code Converters
Binary-to-gray & gray-to-binary conversion
Multiplexers (Data Selectors)
A MUX is a device that allows digital information
from several sources to be routed onto a single
line for data transmission over that line to a
common destination.
The basic MUX has several data-input lines and a
single output line.
It also has data-select inputs, which permit digital
data on any one of the inputs to be switched to the
output line.
Multiplexers (Data Selectors)
Multiplexers (Data Selectors)
Multiplexers (Data Selectors)
44
4-to-1 line Multiplexer
Basic Multiplexer Function
45
Eight-Input Multiplexer: The 74151
46
Cascading Multiplexer Circuits
Large multiplexers implemented by cascading smaller ones
Control signals B and C simultaneously choose one of I0, I1, I2, I3 and one of I4, I5, I6, I7
Control signal A chooses which of the upper or lower Mux's output to gate to Z
Demultiplexers
A DEMUX basically
reverses the MUX
function.
It takes digital
information from one
line and distributes it to a
given number of output
lines.
It also known as data
distributor.
Demultiplexers
49
Summary
Half Adders and Full Adders
Parallel Binary Adders
Comparators
Decoders and Encoders
Multiplexers and Demultiplexers
Code Converters
