Amplifier design system and diode analysis

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BIOE3300-Lecture_Series_4_BiosignalAmplifiers_SP20201.pptx

Biosignal Amplifiers

BIOE 3300 – Biomedical Electronics

(Chapters 11 & 14)

1

Biomedical Instrumentation

General Architecture

Biomedical

Amplifiers

Human Interface Subsystem

Signal

Processing

User Interface

Human

Interaction

Main Classes of Ideal Amplifiers

Voltage Amplifier

Amplifies an input voltage by a given gain factor (AV)

Vout=AVVin

Current Amplifier

Amplifies an input current by a given gain factor (AI)

Iout=AIIin

Transconductance Amplifier

Senses the input voltage and forces an output current proportional (G) to this voltage to flow through the load.

Iout=GVin

Transresistance Amplifier

Senses the input current and forces an output voltage proportional (R) to this current to appear across the load.

Vout=RIin

3

Class Impedance Characteristics

Regardless of the amplifier class, a core objective of an amplifier system is to ensure that the output signal is a properly scaled version of the source signal. This can be achieved, in part, through the impedance characteristics of the amplifier.

4

Input Voltage Amplifiers desire to have a high input impedance

Output Voltage Amplifiers desire to have a low output impedance

Input Current Amplifiers desire to have a low input impedance

Output Current Amplifiers desire to have a high output impedance

Ideal Voltage Amplifier Model

5

Ideal Voltage Amplifier Model Understanding Input Resistance (Impedance)

Ri is the input resistance of the amplifier

Rs is the source resistance

vs is the source voltage

vi is the input voltage to the amplifier

6

Voltage Amplifier Preferred Input Characteristics

Ri is the input resistance of the amplifier

Rs is the source resistance

vs is the source voltage

vi is the input voltage to the amplifier

In this problem,

vs is the source signal (i.e., heart) that we wish to amplify.

vi is the input voltage to the amplifier.

We have no control over Rs as this is the inherent resistance of the body.

Therefore, we can only design around Ri (amplifier input resistance).

The objective is to ensure that vi=vs (no distortion; the signal we want to amplify makes it to the input of the amplifier.

Voltage Amplifier Preferred Input Characteristics

Ri is the input resistance of the amplifier

Rs is the source resistance

vs is the source voltage

vi is the input voltage to the amplifier

The objective is to ensure that vi=vs (0% distortion; the signal we want to amplify makes it to the input of the amplifier.

Lets assume we design the amplifier with a very low input resistance (i.e., Ri0)

In this case, what would vi be equal to?

vi=0; we lost all of our signal vs

(100% Distortion); (not desired)

Lets assume the other extreme such that we design the amplifier with a very high input resistance (i.e., Ri  )

In this case, what would vi be equal to?

Since ii=0A then vi=vs (i.e., there can’t be a voltage difference over RBODY as 0 current is flowing).

(Thus, 0% distortion; objective achieved)

Ideal Voltage Amplifier Model Input: Ri  

9

Voltage Amplifier Preferred Output Characteristics

RO is the output resistance of the amplifier

RL is the load resistance

vs is the source voltage

vi is the input voltage to the amplifier

Avo is the gain of the amplifier

iO is the current leaving the amplifier

vo is the amplifier’s output voltage

The objective is to ensure that

vo=Avovi =Avovs (0% distortion; the output is a properly amplified version of the source signal.)

Lets assume we design the amplifier with a very high output resistance (i.e., Ro  )

In this case, what would vo be equal to?

vo=0 as io=0 we lost all of our signal. Avovi does not make it out of the amplifier

(100% Distortion); (not desired)

Lets assume the other extreme such that we design the amplifier with a very low output resistance (i.e., Ro 0)

In this case, what would vo be equal to?

As can be seen, vo=Avovi & assuming Ri  then vo=Avovi =Avovs

(0% distortion; objective achieved)

Ideal Voltage Amplifier Model Input: Ri   Output: Ro 0

As shown, to minimize distortion, voltage amplifiers must be designed with a high input resistance and low output resistance (i.e., Ri   & Ro 0)

11

Ideal Current Amplifier Model

Ai is the current gain of the amplifier

12

Ideal Current Amplifier Model Understanding Input Resistance (Impedance)

Ri is the input resistance of the amplifier

Rs is the source resistance

is is the source current

ii is the input current to the amplifier

The objective is to ensure that ii=is (0% distortion; the source signal we want to amplify makes it into the input of the amplifier.

Lets assume we design the amplifier with a very high input resistance (i.e., Ri  )

In this case, what would ii be equal to?

ii=0; we lost all of our signal is

(100% Distortion); (not desired)

Lets assume the other extreme such that we design the amplifier with a very low input resistance (i.e., Ri0 )

In this case, what would ii be equal to?

Since Ri0 no current will flow though Rs, therefore, ii=is

(Thus, 0% distortion; objective achieved)

13

Ideal Current Amplifier Model Input: Ri 0 

Ai is the current gain of the amplifier

14

Current Amplifier Understanding output impedance

RO is the output resistance of the amplifier

RL is the load resistance

is is the source current

ii is the input current into the amplifier

Ai is the gain of the amplifier

iO is the current leaving the amplifier

The objective is to ensure that

io=Aiii =Aiis (0% distortion; the output is a properly amplified version of the source signal.)

Lets assume we design the amplifier with a very low output resistance (i.e., Ro 0)

In this case, what would io be equal to?

io=0 we lost all of our signal. Aiii does not make it out of the amplifier (all of this current flows through Ro)

(100% Distortion); (not desired)

Lets assume the other extreme such that we design the amplifier with a very low output resistance (i.e., Ro  )

In this case, what would io be equal to?

As can be seen, io=Aiii & assuming Ri 0 then io=Aiii =Aiis

(0% distortion; objective achieved)

Ideal Current Amplifier Model Input: Ri 0  Output: Ro  

As shown, to minimize distortion, current amplifiers must be designed with a low input resistance and high output resistance (i.e., Ri 0 & Ro  )

16

Ideal Transconductance Amplifier Model Input: Ri   Output: Ro  

Transconductance Amplifier

Senses the input voltage and forces an output current proportional (G) to this voltage to flow through the load.

Iout=GVin

These amplifiers behave as voltage amplifiers with respect to the input and current amplifiers with respect to the output. Therefore, using the same reasons as before, to minimize distortion, transconductance amplifiers must be designed with a high input resistance and high output resistance (i.e., Ri   & Ro  )

17

Ideal Transresistance Amplifier Model Input: Ri 0  Output: Ro 0 

Transresistance Amplifier

Senses the input current and forces an output voltage proportional (R) to this current to appear across the load.

Vout=RIin

These amplifiers behave as current amplifiers with respect to the input and voltage amplifiers with respect to the output. Therefore, using the same reasons as before, to minimize distortion, transresistance amplifiers must be designed with a low input resistance and low output resistance (i.e., Ri 0  & Ro 0 )

18

Class Impedance Characteristics

Regardless of the amplifier class, a core objective of an amplifier system is to ensure that the output signal is a properly scaled version of the source signal. This can be achieved, in part, through the impedance characteristics of the amplifier.

19

Input Voltage Amplifiers desire to have a high input impedance

Output Voltage Amplifiers desire to have a low output impedance

Input Current Amplifiers desire to have a low input impedance

Output Current Amplifiers desire to have a high output impedance

Biopotential Amplifiers: Ideal Impedance Characteristics

To amplify a voltage potential from the

body it is desired to have an amplifier with a high input resistance

Voltage Amplifier

Transconductance Amplifier

20

Power relationship

Biocurrent Amplifiers: Ideal Impedance Characteristics

To amplify a current from the body, it is desired to have an amplifier with a low input resistance

Current Amplifier

Transresistance Amplifier

21

Basic Amplifier Concepts

Regardless of the class of amplifier, certain basic concepts hold

Input/Output Relationship

Output=(Gain Factor)*Input

Cascade Effect

22

Input/Output Relationship

Positive Gain

Non-inverting

Negative Gain

Inverting

23

Operational Amplifiers

The most common integrated circuit used for voltage amplification is the operational amplifier (op-amp).

The op-amp is a high-gain differential amplifier

These are active components, therefore they require a external power supply to operate/function

There are many different versions of op-amps available with varying specifications (LM741, OP07, OP27, LM747, OP37, ….)

Price ranges vary from $0.15 to $10’s

Price mainly depends on performance specifications

e.g. noise, speed, input resistance, etc…

24

Common Voltage Amplifier Configurations

Inverting

Non-Inverting

Summing

Differential including Instrumentation Amplifier

Buffer or Voltage Follower

Differentiating

Integrating

Bridge

25

Operational Amplifiers

Simplified Schematic

MODEL

26

Ideal Voltage Amplifier Model

27

Schematic of Common Op-amp

Common IC packages

28

Characteristics of Ideal Op-Amps

Infinite gain for the differential input signal (A=)

Zero gain for the common-mode input signal

vo=0 when v1=v2 (no offset voltage)

Infinite input impedance

Zero output impedance

Infinite bandwidth (no frequency response limitations or phase shift)

29

Engineering design with op-amps is usually facilitated by treating these devices as “ideal”.

After the initial design, then the “non-ideal” or “real-world” properties are usually considered.

At this point, the “brand” or “model” of op-amp is determined to achieve desired response or the design configuration may need to altered if the “non-ideal” properties cause a problem

30

Ideal Op-Amp Circuit Analysis

Based on Two Basic Rules

Rule 1: When the op-amp output is in its linear range, the two input terminals are at the same voltage

Rule 2: No current flows into either input terminal of the op-amp

31

Circuit Analysis for Op-amp Networks

Operational amplifiers are almost always used with negative feedback, in which part of the output signal is returned to the negative input in opposition to the source signal.

This provides a stabilized output through an ability to control or set the gain of the configuration.

32

Summing Point Constraint

In a negative feedback system, the ideal op-amp output voltage attains the value needed to force the differential input voltage and input current to zero. We call this fact the summing-point constraint.

In other words, if negative feedback is present, you can assume

V+ = V-

I+ = I-=0

33

Circuit Analysis Approach for Op-Amp Networks

(1) Verify that negative feedback is present.

(2) Assume that the differential input voltage and the input current of the op amp are forced to zero. (This is the summing-point constraint.)

(3) Apply standard circuit-analysis principles, such as Kirchhoff’s laws and Ohm’s law, to solve for the quantities of interest.

34

Standard Voltage Amplifier Configurations

Inverting

Non-Inverting

Summing

Differential including Instrumentation Amplifier

Buffer or Voltage Follower

Differentiating

Integrating

Bridge

35

Inverting Amplifier

36

Resistors

37

Choosing resistors for amplifier design

Prefer Values between 1k to 100k

Why > 1 k?

Helps avoid unnecessarily large currents from flowing in the circuit

Avoids damage to op-amp

Human/Animal subject considerations

Power issues

Why < 100 k?

Avoids unnecessarily small currents

Results in noise issues

Very large resistances lead to instability due to leakage currents over the surface of the resistors and circuit board. Stray pickup of undesired signals

38

Be aware of tolerance

Tolerance provides an indication of how the actual resistance value may deviate from the stated value

For example, suppose a 1 k resistor has a gold tolerance band.

This gold band indicates a 5% tolerance

Therefore, although 1 k is the stated value, the actual value may range between 950  to 1050 

1000 * 5% = 50   1 k + 50

Tolerance may lead to unexpected behavior in a design

Error in Amplifier Gain

Unusually low CMRR in differential amplifiers

(e.g. imbalance in resistors R1R3 R2R4 leading to a large CMG)

39

Tolerance and Amplifier Gain

(a) Design an inverting amplifier with a K= -150 V/V using 5% tolerance resistors

(b) Determine the minimum and maximum possible gain

40

Summing Amplifier

A summing amplifier accepts multiple input voltage signals which are amplified in an inverting manner then summed together into a single output.

41

Example (Amplifier System Analysis)

Find vo in terms of v1 and v2

Answer: vo=4v1-2v2

vo1

A

B

42

Non-Inverting Amplifier

vin(t)

vout(t)

43

Voltage Follower or Buffer

vin(t)

vout(t)

What is the purpose of a buffer?

What is the simplest configuration that has the same input-output relationship?

Does a buffer behave in the same manner?

Why is an amplifier needed?

Often in design, we need to cascade multiple configurations to achieve a desired outcome. In certain cases, however, subsequent stages can affect the behavior of prior stages (LOADING EFFECTS)

Used for stage isolation (minimize loading effects)

44

High Pass Filter to Inverting Amplifier Configuration Example

Types of Biopotential Measurements

Two Types

Monopolar Recordings – Single site biopotential measurements (i.e., made with 1-channel/single input type amplifiers)

Bipolar Recordings – Dual site differencing biopotential measurements (i.e., made with 2-channel/dual input type amplifiers)

Most common (e.g., utilized for ECG, EMG, EEG, EOG,etc…)

Regardless, whether monopolar or bipolar biopotential measurements, the amplifier used to interface to the body must have an extremely high input impedance to avoid distortion (ideally Rin∞)

Standard Differential Amplifier (Dual-Input)

46

Instrumentation Amplifier Bipolar Biopotential Amplifier

Excellent Bio-potential Amp

-High input impedance

-High Gain Possible

-Able to distribute over two stages

-Good Noise Rejection

1

2

3

47

Good Biopotential Amp

High input impedance

Good Noise Rejection

High Gain Possible

High Bandwidth

Example: EEG Amplifier Design

Design a bipolar EEG voltage amplifier with a gain of 2000 V/V.

(EEG signals can range from .1mV to 1 mV in amplitude)

For this application, a differential amplifier would be needed (i.e. bipolar measurements) with a suitable input impedance (need high impedance).

48

Instrumentation Amplifier

For this design, we need to determine R1, R2, R3, & R4 to realize an overall gain of K=2000 V/V.

49

Design

It is best to distribute the overall gain between the two stages

Note: too much gain on stage 1 may cause saturation after the initial stage due to slight DC biopotentials and/or biasing issues inherent in the fabrication of the op-amp

Too much gain on any single stage may also cause problems meeting the 1kΩ to 100kΩ preferred resistive component design requirement

One possible design

K1=50 K2=40

K1*K2=50*40=2000 V/V

50

Design

To design K1=50, choose an R2

e.g. R2=100k

Compute an R1

R1=2R2/(K1-1)=2(100k)/(50-1)

R1=4.08k

To design K2=40, choose an R4

e.g. R4=100k

Compute an R3

R3=R4/K2=100k/40=2.5k

51

Realistic Design

Note: resistor tolerance will cause ideal gain to deviate

Another consideration, in regards to gain, is that resistors are only commercially available in certain values

e.g. an R1=4.08k may be difficult to find

Using a 4 k resistor would cause the overall gain to be

K=51*40=2040 V/V

If a more precise gain is desired, a potentiometer (i.e. variable resistor) could be used for R1

52

Noise Rejection and Differential Amplifiers

One main problem in the measurement of bio-potentials is the presence of noise (especially, 60 Hz power line noise -see figure next slide)

(1) direct coupling to surface of body

(2) Poorly shielded electrode leads

For a differential amplifier, this noise is present at both inputs.

Signals of this type are known as common-mode signals.

Common to both inputs

These signals can mask the signal of interest, however, through proper design practices common-mode signals can be attenuated considerably.

53

Noise Rejection and Differential Amplifiers

The ability of an amplifier to attenuate common-mode signals is known as Common-Mode Rejection Ratio (CMRR)

Units: decibels (dB)

Ideally, we want CMG0

A more accurate expression for vo

54

Noise Rejection and Differential Amplifiers Example

Find the minimum CMRR for an ECG amplifier if:

the differential gain is 1000

the desired differential input signal has a peak amplitude of 1 mV

the common-mode signal is a 100 V peak 60Hz sine wave

And it is desired that the output contains a peak common-mode contribution that is 1% or less of the peak output caused by the differential signal

55

Noise Rejection and Differential Amplifiers Example

Solution: to compute CMRR we need DMG and CMG

Desired peak ECG signal is: (1mV)(1000)=1V

To meet the stated specification, the common-mode signal must have a peak value less than 1V*1%=0.01 V

Based on this, the CMG=Vocm/Vicm=0.01V/100V=10-4

DMG=1000

CMRR=20*log10(DMG/CMG)=20*log10(1000/10-4)=140dB

56

For ECG amplifiers needed CMRR is between 90-130dB

Common Mode Noise & CMRR

ECG (K=1000 V/V) CMRR 65dB

ECG (K=1000 V/V) CMRR 125 dB

What determines the CMRR for a Differential Amplifier?

(1) The inherent CMRR for the model of op-amp being used. 741: 90dB

OP07: 100-120dB

OP27/37: 126dB

(2) imbalance in resistances. For maximum CMRR R1=R3 and R2=R4

slight differences between resistances can affect CMRR significantly)

(3) Frequency of differential and common-mode signal

The model of op-amp determines the maximum attainable CMRR

58

59

60

CMRR and the Instrumentation Amplifier

For instrumentation amplifiers, the overall CMRR is solely determined by the second stage alone.

CMG for first stage is unity

Vo1

Vo2

61

Practical Measurement of CMRR

Measure the Differential mode gain (DMG)

Ground one input and apply a sinusoidal input of known amplitude to the second input

DMG=Vo/Vin

Measure the Common mode gain (CMG)

Apply a high amplitude sinusoid signal of known amplitude to both inputs

CMG=Vo/Vin

Compute CMRR

62

Practical Considerations (i.e. non-ideal characteristics) Operational Amplifiers

In practice, op-amps can behave quite differently from ideal under certain operating conditions

Known as Nonlinear effects

Clipping

Related to the physical achievable output voltage for an op-amp based amplifier. In practice, it is bound between an upper and lower limit determined in part by the DC power supply rails.

Slew Rate

Related to the rate of change in output voltage with respect to time. In practice, this is bound by an upper limit.

Bandwidth

Related to the range of frequencies in which the gain of the amplifier will behave as ideal.

63

Practical (i.e. non-ideal) Operation Amplifiers

Clipping

The output voltage of a real op-amp is limited to an operational range. This range is dependent on the internal design of the op-amp and the external DC power supply.

When the output voltage tries to exceed these limits, clipping occurs.

64

Example: Clipping

Listed in Specification Sheet

For a given op-amp model

65

66

Nonlinear Effects

Slew Rate (SR) Units: Voltage/time

Describes another limitation of practical op-amps where the magnitude of the rate of change of the output voltage is limited.

In other words, SR is how fast an op-amp can change its output voltage

Very important consideration for amplifiers with time varying input signals

If the slew rate is exceeded, the output voltage will be distorted

741: 0.5 V/s OP27: 2.8 V/s OP37: 17 V/s OP07:0.1-0.3 V/s

For sinusoidal signals, the minimal slew rate needed such that no output distortion occurs is:

67

68

Example: Slew rate

--Maximum rate of change is

0.5 V/us for a 741 op-amp

Vs(t)=2.5sin(105t)

Ideal

Actual

(741 op-amp)

If we want to achieve the ideal response for this configuration, what could be

done?

Use a different op-amp (e.g. OP37 SR=17 V/us)

What is the minimum slew rate needed to avoid distortion?

69

Example 14.6

Nonlinear Effects

Gain Bandwidth Product (GBWP)

Sometimes referred to unity gain (Gain =1) small signal bandwidth

Determined by the model of the op-amp

For a single op-amp configuration, the GBWP is constant

Allows determination of the range of input frequencies for which the designed gain of the amplifier will behave as ideal

This is referred to as the amplifier bandwidth

A input signal which has a frequency that exceeds the bandwidth will not be amplified to the full extent.

Gain

Frequency

Ideal

Non-Ideal

Units: (Hz)

70

71

Example #1

Determine the bandwidth of a non-inverting amplifier designed for a gain of 50 that is built with a

741 op-amp GBWP = 1 MHz

OP-27 op-amp GBWP = 8MHz

741

Bandwidth=GBWP(741) /50=1MHz/50=20kHz

OP-27

Bandwidth=GBWP(OP-27) /50=8MHz/50=160kHz

72

Example #2

A standard differential amplifier is designed using a 741 op-amp (GBWP=1MHz) with an overall gain K=1000 V/V

What is the bandwidth?

Bandwidth=GBWP/1000=1MHz/1000=1KHz

73

Example #3

An instrumentation amplifier is designed using 741 op-amps (GBWP=1MHz) with a 1st stage gain of 50 and a 2nd stage gain of 20 for an overall gain K=(50)(20)=1000 V/V

Would the bandwidth=GBWP/1000=1kHz?

NO!

Why?

The gain is distributed across multiple op-amp stages

Stage 1: Bandwidth=GBWP/50=1MHz/50=20KHz

Stage 2: Bandwidth=GBWP/20=1MHz/20=50KHz

Therefore Stage 1 limits the bandwidth of the instrumentation amplifier to 20KHz

However the bandwidth is 20 times larger compared to the standard differential amplifier case seen in Example #2!

This is a benefit of distributing large gains over multiple stages

74

Other ‘Op-Amp’ Configurations of Interest

Integrators

Differentiators

Modified Bridge Circuits

75

Integrators

Integrators produce an output voltage signal that is proportional to the running time integral of the input voltage signal.

Note: In a running time integral, the upper limit of integration is t .

76

Integrator

Purpose: In a general sense, integrators are used to determine the area under the curve, which can be used to estimate signal energy.

77

Example

If the input into an integrator is given by:

And R=10kΩ and C=0.1uF, sketch the output. (Assume an ideal op-amp)

Solution:

Output:

78

Differentiator

Differentiators produce an output voltage signal proportional to the time derivative of the input voltage signal.

79

Differentiator

Purpose: Differentiators are used to determine the rate of change within a signal. (e.g., an application could be to trigger an alarm based on a rate event, such as ventricular tachycardia.)

80

Application Example

Suppose a system outputs a voltage signal proportional to velocity (Vv) of a sprinter

How could you design a system to take this voltage signal as an input and output a voltage signal proportional to displacement (x)?

Velocity=dx/dt

Therefore an integrator could be used

How could you design a system to take this velocity voltage as an input and output a voltage proportional to acceleration (a)?

A=d2x/dt2=d(velocity)/dt

Therefore a differentiator could be used

81

Bridge Amplifiers

Wheatstone bridge

Provides method for monitoring changes in sensor resistance

To work, this bridge circuit requires a differential measurement to be taken

How would this be achieved in lab?

A digital differential input multimeter would be used

Suppose we did not have a differential input multimeter, of the circuits discussed in class, how could we implement the differencing measurement?

Use a differential amplifier

What about input impedance?

Standard differential versus instrumentation

need instrumentation amp

Drawbacks:

(1) # of op-amps (three)

(2) only linear for small variations in sensor resistance (due to the Wheatstone configuration)

Better circuit is a modified bridge amplifier

82

Modified Bridge Amplifier

 

83

Design Example#0

You have been asked to design a system that will be used in an oscillometric based blood pressure monitor. For this, you are provided a pressure sensor whose resistance changes proportional to input pressure (For reference, the sensor specifications state that at 40 mmHg the sensor has a corresponding resistance of 10kΩ and at 160 mmHg the corresponding resistance is 50kΩ.) .

 

The designed circuit should output a voltage proportional to the pressure within a pneumatic cuff. More specifically, the output voltage should be between 0V to 10V corresponding to cuff pressures between 40 mmHg to 160 mmHg (e.g. 0V corresponds to 40mmHg and 10 V corresponds to 160mmHg).

 

 

Summarize Information Given

@P=40mmHg Rs=10kW

@P=160mmHg Rs=50kW

From the problem statement,

we want

0 < Vo < 10

40mmHg < P < 160mmHg

10kΩ < Rs < 50kΩ

Design: Use Modified Bridge Amplifier and Solve for RBAL, R1, and V

Always start with the BALANCE case (i.e., when Vo=0)

This occurs when RBAL=RS; therefore RBAL=10kΩ

When P=40 mmHg, Rs=10kΩ which indicates DR=0.

We need to solve for R1, so now consider when P=160 mmHg. At this pressure, Vo=10 and Rs=50kΩ

We know Rs=RBAL+DR,

therefore, DR=Rs-RBAL=50k-10k=40kΩ

 

At this point, we need to define our input voltage (V). Assume V=5;

Was this a good assumption?

No, resistances can’t be negative (-)

Ok, assume V again… V= - 5

So we have: V=-5, RBAL=10kΩ, R1=10kΩ

Under this design; 0 < Vo < 10 when 40mmHg < P < 160mmHg

EXAM #3 Material Begins Here

Larger System Designs

It is usually easiest to start from the system output and work back toward the input(s). This is often because it is difficult to anticipate the effects that later stages may have on the overall design.

In system design, there are often many correct design architectures that can achieve the same output; however, some approaches may be more optimal (e.g., require fewer stages).

Design Steps

(1) Layout a block diagram to develop a flow pathway and logic required to realize the design. When possible, try to use standard design configurations and keep in mind associated output/input relationship associated with these configurations (e.g., although differentiator configuration does differentiate an input signal, it will also invert it which needs to be taken account).

(2) When the block diagram is finished, evaluate the system starting with the input(s) to confirm it will achieve the overall output you expect.

(3) After the block diagram is validated, then assemble the schematic by connecting the appropriate standard configurations. (Be sure to use unique variable names for the components to avoid confusion).

(4) Calculate the components values to realize associated amplifier gains based on the details specified in the block diagram.

Design: Example #1

You are working for a medical device company that designs and markets medical instrumentation for hospital intensive care units (ICUs). A team of engineers at your company has extensively researched and developed a new algorithm to alert nurses and physicians that an ICU patient is in distress and in need of immediate medical attention. The new device has input signals that are provided by other medical devices already used in the ICU.

 

These device include: (1) a respirometer that outputs a voltage signal, vR(t), proportional to respiration rate

(2) a blood pressure monitor that outputs a voltage signal, vBP(t), proportional to

instantaneous blood pressure

(3) a pulse oximeter that outputs a voltage signal, vOX(t), proportional to arterial blood

oxygenation

(4) a ECG system that outputs a voltage signal, vHR(t), proportional to heart rate

 

Note: vR(t), vBP(t), vOX(t), and vHR(t) are the inputs to the system you are to design.

The developed algorithm takes each of these as inputs and outputs a voltage signal, vA(t), which can be used to trigger an audible alarm. The output voltage signal is governed by the following equation:

 

 

Using ideal op-amps, design a system to realize the needed output..

Design Logic (one potential solution)

K=-RdCd=-1

K=-1/(RiCi)=-1

+

-

+

-

90

Summing Amplifier

91

Differentiator

92

Differential Amplifier

93

Integrator

94

Differential Amplifier

95

Inverting Amplifier

96

Design Schematic

Design: Example #2

Design Block Diagram

Differential Amplifier

100

Differentiator

101

Differential Amplifier

102

Integrator

103

Summing Amplifier

104

Design Schematic

Design Block Diagram

2

1

v

v

v

A

A

A

=

2

1

1

out

in

inin

V

R

K

VR

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vvvv

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24

2113

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2

1

1

4

2

3

2

1

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10

CMRR20 log

CMG

DMG

=

cm

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oidi

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10

CMRR(dB)20 log

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Linear_Range <

EECC

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MAX

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dt

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dt

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3

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3

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K

VR

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=