who can do my Electrical Engineering lab report
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03_EECE315_LabReport_03.pdf
1
EECE 315, Pre-Lab Report 03
Name
Date M/T/W/R/F
Collaborators
Pre-Lab Assume Vγ =0.6 V for all diodes, and assume the zener diode is ideal (rz = 0, Vγ.= 0.6 V).
1. Analyze circuits given in Fig. 1, Fig. 2, Fig. 3 (shown in next page). Explain and “EXPLICITLY STATE” ALL the status, assumptions, and applicable laws (theorems) that have been used in the analysis. Plot the input and output voltage waveforms.
a. Consider three different operating regions for diode(s) including “forward bias”, “reverse bias”, and “cut-off” region.
2. Use PSPICE to plot the input and output voltage waveforms of the circuits. Compare the results
with your experimental results in lab.
Circle one
2
EECE 315, Final Lab Report 03
Name
Date M/T/W/R/F
Collaborators
EECE 315, Lab Plot the input and output voltage waveforms of each of the circuits shown below. Explain your results (max, min, dc offset, reasons etc.) in detail and compare them to the predictions from the prelab. You can also use 1N4001 instead of 1N4148.
Circle one
Vout
Vin
8 Vpeak
0
Vout
100k
0
Vin8 V peak
Vout
0
Vout
1N4735 Vin
6 Vpeak
0
5 V peak
0
Vin8 V peak
3 V
1 kHz
10k
0
1N4148
1N4148
100 uF
Fig. 1
10k
Vin 5 Vpeak
10k1 kHz
+
100k
Fig. 2
+
R 1k
10k
1 kHz
10 kHz
1N4148 100 uF
10k
2 V
Fig. 3
Fig. 4
Vin
10 kHz
Fig. 5
10k
4 V
1 kHz
Vout
1N4148
1N4148
Fig. 6
Vout
1N4148
