EET 316 Microprocessor & Digital Systems Lab Course using Xilinx ISE Design Suite 13.2 program
Introduction:
Pulse circuits are essential in most digital system, and are used for a number of function other than providing clocking signals. A circuits that subtracts one form its output is such a circuit allowing it to cycle through a finite sequence.
Objective:
The object of this project this project is to design a combinational decrement circuit with a 4-bit input (a3a2a1a0) and a 4-bit output (s3s2s1s0)
Such that s3s2s1s0 = a3a2a1a0 -1
Pre Lab:
- Construct the truth table for a 4-bit decrement circuit (let the sequence cycle back to the start).
- Use Karnaugh maps to determine the expressions for the out puts.
- Obtain the minimized expressions for the outputs in sum-of-products format.
- Implement the design as a tow-Level AND-OR structure.
In Lab:
- Implement and simulate the design using the Xilinx ISE software.
- Program the design from Xilinx ISE into the digital AtlysTM board by using four toggle switches to provide the inputs and four LEDs as outputs.
Report:
- A brief and concise description of the project as shown above (use your own words).
- All pre-Lab work clearly shown.
- Print outs of the simulation plot(s), the circuit diagram, and any other relevant files used for the project.
- A brief concluding remarks.
- The signed signature page below.
13 years ago
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- decrement_circuit.docx