ECET-230 – Digital Circuits and Systems Homework Assignment #3
ECET-230 – Digital Circuits and Systems
Homework Assignment #3
Name
1. Determine the outputs for the circuit shown below. Assume that C0 = 0 for all cases.
A1 A2 A3 A4 | B1 B2 B3 B4 | S1 S2 S3 S4 | C4 |
| |||
2.
Sketch the Q output for the waveforms shown below applied to an active-LOW S-R latch. Assume that Q starts LOW.
3. Sketch the Q output for the waveforms shown. Assume that Q starts LOW.
4. Sketch the Q output for the circuit shown below. Assume that Q starts LOW.
5.
Sketch the Q output for the circuit shown below. Assume that Q starts LOW.
6.
Sketch the Q output for the circuit shown below. Assume that Q starts LOW.
7. Sketch the Q output for the circuit shown below. Assume that Q starts LOW.
8. Sketch the Q output for the circuit shown below. Assume that Q starts LOW.
9. Sketch the Q output for the circuit shown below. Assume that Q starts LOW. Note that the clock goes through a negative edge detection circuit.
- In your own words, explain the differences between a flip-flop’s asynchronous input and synchronous input. Be as clear and detailed as possible in your explanation.
9 years ago
Purchase the answer to view it

- ecet230_homework3.docx