computer organization and architecture - due in 8-9 hours

2 questions- due in 8-9 hours

Computer Organization and Architecture

ASSIGNMENT:

1.   The followingMIPScode calculates the floating-pointexpression E =A * B+C * D, wheretheaddresses ofA, B, C, D, and Earestored in R1, R2, R3, R4, andR5, respectively:

L.S                  F0, 0(R1) L.S                  F1, 0(R2) MUL.S           F0, F0,F1

L.S                  F2, 0(R3) L.S                  F3, 0(R4) MUL.S           F2, F2,F3

ADD.S            F0, F0,F2

S.S                  F0, 0(R5)

Rewritethe codesequence, but now usingonlytwo floating-pointregisters. Optimize for minimum run-time. You mayneed to usetemporarymemorylocations to hold intermediatevalues.Listthe codesequenceandgivethe number ofcycles this takes to execute.

2.   A  5-stage  pipelined  processor  has  Instruction  Fetch  (IF),  Instruction  Decode  (ID), OperandFetch(OF), PerformOperation(PO) and WriteOperand(WO) stages.TheIF, ID,OFandWOstagestake1clockcycleeachforany instruction.ThePOstagetakes1 clockcycleforADDandSUB instructions,3clockcyclesforMUL instruction,and6 clockcyclesforDIVinstructionrespectively.Operandforwarding isusedinthepipeline. Whatisthenumberof clockcyclesneeded toexecutethefollowingsequenceof instructions?Show howyou arriveatyour answer.

Instruction        Meaning ofinstruction

I0:MULR2,R0,R1               R2← R0*R1

I1:DIV R5,R3,R4                 R5← R3/R4

I2: ADDR2,R5,R2             R2← R5+R2

I3:SUBR5,R2,R6               R5← R2- R6

See the attached for clarity