Project 7

ITT 432 Project 7 Due: Apr. 10, 2013 Name________________________

Execute the following instructions in the pipelined datapath for five clock cycles. If branch is taken, you need to stall the voided instructions by writing “bubble” on top of the voided stages.

Initial status: $s1=25, $s2=25, $s10=100, mem[110] = 35, PC = 204

(a) Write down only the instruction name (lw, sub, etc.) on top of each stage of the pipeline.

(b) List all control signals where they are utilized and input and output values of all participating blocks.

204 beq $s1, $s2, 1

208 sub $s3, $s1, $s2

212 sw $s3, 20($s10)

216 add $s4, $s2, $s1

220 lw $s4, 30($s10)

CC1

CC2

CC3

\

CC4

CC5