Computer Architecture Midterm
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1. The textbook describes a structured computer organization with six levels. Name each level in the correct
order with Level 0 representing the lowest level and Level 5 representing the highest level. (5 pts)
Level 5 Problem-oriented language level
Level 4
Level 3
Level 2
Level 1
Level 0
2. Label the following two architectures based upon their memory structure. (5 pts)
Computer Architecture Midterm Exam
Name______________________ ID________________________ Signature_____________________
*Instructions.
1. There are 14 questions.
2. Print your answers. Unreadable handwriting will not be graded.
3. Writing answers & Scanning your document & Submitting your exam: all should be done before 7:30pm
4. I WILL NOT ACCEPT your submission VIA EMAIL. If you submit it via email, your midterm score will be given 30 points.
5. All of your answers should be in one pdf file. If your answers are distributed on multiple files, your
score will be deducted 10 points.
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3. Name the inventor responsible for the following developments during the Zeroth Generation, defined by the use of mechanical computers. (6 pts)
( ) Built the first working calculating machine.
( ) Attempted to build the analytical engine for general-purpose computing.
( ) Built the Mark I, known as the first American general-purpose computer.
4. Convert the decimal number -67 to 8-bit, signed 2’s complement binary. (6 pts)
5. Convert -35.75 to its hexadecimal representation in IEEE floating point format. (15 pts)
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6. For the following truth table: (15 pts)
Write the formula for the truth table in sum-of-products form.
Simplify the formula as much as possible.
Draw the logic gates which correspond to your simplified formula.
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7. For the following expression, use DeMorgan's theorem to obtain an equivalent expression which contains AND's
and OR's of the input (e.g., A ) and their complements (e.g., A ). There should be no complements (bars) in the
final expression except for those over the inputs. (5 pts)
8. The CPU executes each instruction in a series of small steps. Roughly speaking, the steps are as follows:
Step 1 Fetch the next instruction from memory into an instruction register.
Step 2
Step 3 Determine the type of instruction just fetched.
Step 4 If the instruction uses a word in the memory, determine where it is.
Step 5 Fetch the word, if needed, into a CPU register.
Step 6 Execute the instruction.
Step 7 Go to step 1 to begin executing the next instruction.
What will be Step 2 ? (4 pts)
9. Which of the following has the fastest access time: registers, main memory, or magnetic disks? (3 pts)
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10. Determine if there is an error in the following 12-bit codeword. Write the bit number if an error occurred
or write “none” if there is no error. This codeword was generated using Hamming's algorithm and
contains 8 data bits. (15 pts)
𝐹7316 = 1111 0111 00112
11. List and define two types of locality in cache? (5 pts)
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12. Please answer for the following circuit. (5 pts)
How many transistors will used if we construct the above circuit design?
(Please describe how you get the answer.)
13. Suppose a disk has the following performance: ① rotation speed: 10,000 RPM, ② an average seek time: 10ms,
③ an average number of sectors per track : 600.
Then, what is the average time to read a random sector from the disk?
(In addition to the answer, please also describe how you reached your answer) (7pts)
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14. Please consider the following five state pipeline:
Figure : (a) A five stage pipeline. (b) The state of each stage as a function of time
(nine clock cycles).
Suppose that the cycle time of a machine is 3 nsec (nano second). Then it takes 15 nsec for an instruction to
progress all the way through the five-stage pipeline.
If we have 15 instructions to be executed, how much time is needed to execute them over the five-stage pipeline?
(In addition to the answer, please also describe how you reached your answer) (5pts)