Introduction to digital design Lab task 2
Lab 2: Overview
1. Displaying numbers on SSD
2. Multiplexers and Decoders
3. SSD Control Architecture
4. Lab 2 Tasks
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Light Emitting Diodes
1. Displaying numbers on SSD
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• Light Emitting Diodes (LEDs) are semiconductor light sources
• They emit light when sufficient voltage is applied on the anode
terminal
• The emission of light is caused by the LED becoming forward biased
• Due to the semiconductor nature of LEDs, the brightness of LEDs are
directly proportional to the current being passed through it
Common Anodes
1. Displaying numbers on SSD
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• The LEDs for each of the seven segment display are connected in parallel to a common anode as shown below
Common Cathodes
1. Displaying numbers on SSD
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• For all 6 SSDs, there exist a set of common cathodes which are connected in parallel
• The output from your HEX2SSD determine whether the current passes through each LED for each SSD
SSD Sequence
1. Displaying numbers on SSD
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• At any point, only one SSD can be powered.
• To display multiple SSDs, a refresh sequence is needed.
• For n number of SSDs, each SSD needs to be powered in sequence
• The sequence needs to be quicker than the critical flicker period of a human
eye, providing an illusion that all SSDs are switched on at the same time.
Refresh sequence T = 0
1. Displaying numbers on SSD - Example
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• Time = 0ms
• First digit displayed of 1830
Refresh sequence T = 1
1. Displaying numbers on SSD - Example
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• Time = 1ms
• Second digit displayed of 1830
Refresh sequence T = 2
1. Displaying numbers on SSD - Example
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• Time = 2ms
• Third digit displayed of 1830
Refresh sequence T = 3
1. Displaying numbers on SSD - Example
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• Time = 3ms
• Fourth digit displayed of 1830
Refresh sequence T = 4
1. Displaying numbers on SSD - Example
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• Time = 4ms
• First digit displayed of 1830
Refresh sequence T = 5
1. Displaying numbers on SSD - Example
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• Time = 5ms
• Second digit displayed of 1830
Refresh sequence
1. Displaying numbers on SSD - Example
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• The cycle repeats continuously to give the illusion that all four
SSDs are lit up at the same time
Multiplexers
2. Multiplexers and Decoders
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• As each SSD is powered on in
sequence, the set of data
inputted into the HEX2SSD
will change to reflect the
current SSD’s display data
• A multiplexer selects the data
source to output for active
display based on select line(s)
2N to 1 Multiplexer
Data 0
Data 1
Data 2
Data 3
Data 4
Data 2N Data …
Select 0 Select 1 Select …
Select N
Output
Multiplexers
2. Multiplexers and Decoders
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• For each multiplexer with n select lines, there can only exist (AT MOST) 2n
data sources
• Multiplexers such as 6 to 1 multiplexer with 3 select lines are possible
• From the example before, there are 4 sets of data sources to choose from,
meaning the multiplexer requires 2 or more select lines
Multiplexers – 4 to 1 example
2. Multiplexers and Decoders
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• Truth Table – 4to1Multiplexer using 2 select lines
Select1 Select0 Output
0 0 I0
0 1 I1
1 0 I2
1 1 I3
Multiplexers – Quad 4 to 1 example
2. Multiplexers and Decoders
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• For 4 outputs, you will need 4 multiplexers
• Given 4 outputs W,X,Y,Z you need to multiplex which sets of WXYZ to display
Multiplexers – Quad 4 to 1 example
2. Multiplexers and Decoders
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• You can group multiple
multiplexers together to form
higher lever logic blocks
Decoders
2. Multiplexers and Decoders
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• In order to sequence powering on the
SSDs, a decoder is needed
• Expands select line(s) into possible outputs
• For n select lines, there can be up to 2n
output lines
• Similar to HEX2SSD where 4 inputs were
decoded into the 7(8) segment control
cathodes
N to 2N
Decoder Select 1
Select …
Select 0
Select N
Select 2
Out0 Out1 Out2 Out3 Out4
Out 2N -1 Out 2N
.
.
.
Decoders – 2-to-4 example
2. Multiplexers and Decoders
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• Truth Table
I1 I0 D3 D2 D1 D0
0 0 0 0 0 1
0 1 0 0 1 0
1 0 0 1 0 0
1 1 1 0 0 0
3. SSD Control Architecture
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3. SSD Control Architecture
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• Refresh Sequence • Time=0ms
3. SSD Control Architecture
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• Refresh Sequence • Time=1ms
3. SSD Control Architecture
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• Refresh Sequence • Time=2ms
3. SSD Control Architecture
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• Refresh Sequence • Time=3ms
3. SSD Control Architecture
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• Refresh Sequence • Time=4ms
3. SSD Control Architecture
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• Refresh Sequence • Time=5ms
Lab 2 Task: Multiplexer and Decoder
4. Lab 2 Task
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• Extend the multiplexer to a 4-to-1 Multiplexer
• Extend the decoder to a 2-to-4 decoder and 3-to-8 decoder