Assemble proj-auto-test.asm and execute. Make sure to turn on 'Assembles all files in directory' and 'Initialize program counter to global main if defined' option in MARS tool.
cs47_proj_source/CS47_proj_alu_normal.asm
.include "./cs47_proj_macro.asm" .text .globl au_normal # TBD: Complete your project procedures # Needed skeleton is given ##################################################################### # Implement au_normal # Argument: # $a0: First number # $a1: Second number # $a2: operation code ('+':add, '-':sub, '*':mul, '/':div) # Return: # $v0: ($a0+$a1) | ($a0-$a1) | ($a0*$a1):LO | ($a0 / $a1) # $v1: ($a0 * $a1):HI | ($a0 % $a1) # Notes: ##################################################################### au_normal: # TBD: Complete it addi $sp, $sp, -16 sw $fp, 16($sp) sw $ra, 12($sp) sw $s0, 8($sp) addi $fp, $sp, 16 beq $a2, '+', add_normal beq $a2, '-', sub_normal beq $a2, '*', mult_normal beq $a2, '/', div_normal add_normal: add $s0, $a0, $a1 move $v0, $s0 j normal_end sub_normal: sub $s0, $a0, $a1 la $v0, 0($s0) move $v0, $s0 j normal_end mult_normal: mult $a0, $a1 mfhi $v1 mflo $v0 j normal_end div_normal: div $a0, $a1 mfhi $v1 mflo $v0 j normal_end normal_end: lw $fp, 16($sp) lw $ra, 12($sp) lw $s0, 8($sp) addi $sp, $sp, 16 jr $ra
__MACOSX/cs47_proj_source/._CS47_proj_alu_normal.asm
cs47_proj_source/.DS_Store
__MACOSX/cs47_proj_source/._.DS_Store
cs47_proj_source/cs47_proj_macro.asm
# Add you macro definition here - do not touch cs47_common_macro.asm" #<------------------ MACRO DEFINITIONS ----------------------># # Macro to take away the nth bit for operations .macro take_nth_bit ($regD, $regS, $regT) # right shift by $regT srlv $regD, $regS, $regT and $regD, $regD, 0x1 .end_macro # Macro to put value to nth bit .macro put_value_to_nth_bit($regD, $regS, $regT, $maskReg) # shift 0x1 for $regS li $t9, 0x1 sllv $maskReg, $t9, $regS # inverse nor $maskReg, $maskReg, $0 and $regD, $regD, $maskReg # shift left $regT by the amount of it sllv $regT, $regT, $regS or $regD, $regD, $regT .end_macro
__MACOSX/cs47_proj_source/._cs47_proj_macro.asm
cs47_proj_source/CS47_proj_alu_logical.asm
.include "./cs47_proj_macro.asm" .text .globl au_logical # TBD: Complete your project procedures # Needed skeleton is given ##################################################################### # Implement au_logical # Argument: # $a0: First number # $a1: Second number # $a2: operation code ('+':add, '-':sub, '*':mul, '/':div) # Return: # $v0: ($a0+$a1) | ($a0-$a1) | ($a0*$a1):LO | ($a0 / $a1) # $v1: ($a0 * $a1):HI | ($a0 % $a1) # Notes: ##################################################################### au_logical: # TBD: Complete it # store frame addi $sp, $sp, -16 sw $fp, 16($sp) sw $ra, 12($sp) sw $a2, 8($sp) addi $fp, $sp, 16 operation_check: beq $a2, '+', add_logical beq $a2, '-', sub_logical beq $a2, '*', mult_logical beq $a2, '/', div_logical j logical_end add_logical: li $a2, 0x0 jal add_sub_logical j logical_end sub_logical: li $a2, 0xFFFFFFFF jal add_sub_logical j logical_end mult_logical: jal mult_signed j logical_end div_logical: jal div_signed logical_end: lw $fp, 16($sp) lw $ra, 12($sp) lw $a2, 8($sp) addi $sp, $sp, 16 jr $ra add_sub_logical: addi $sp, $sp, -20 sw $fp, 20($sp) sw $ra, 16($sp) sw $s0, 12($sp) sw $a1, 8($sp) addi $fp, $sp, 20 # start from li $t0, 0x0 li $s0, 0x0 take_nth_bit($t1, $a2, $t0) beq $t1, 0x0, add_steps nor $a1, $a1, $0 add_steps: # if I = 32, jump to the end beq $t0, 0x20, add_sub_logical_end take_nth_bit($t2, $a0, $t0) take_nth_bit($t3, $a1, $t0) xor $t4, $t2, $t3 xor $t5, $t1, $t4 and $t6, $t1, $t4 and $t7, $t2, $t3 or $t1, $t6, $t7 # change C to CO put_value_to_nth_bit($s0, $t0, $t5, $t8) # I = I + 1 addi $t0, $t0, 0x1 j add_steps add_sub_logical_end: move $v0, $s0 move $v1, $t1 lw $fp, 20($sp) lw $ra, 16($sp) lw $s0, 12($sp) lw $a1, 8($sp) addi $sp, $sp, 20 jr $ra mult_unsigned: addi $sp, $sp, -40 sw $fp, 40($sp) sw $ra, 36($sp) sw $s0, 32($sp) sw $s1, 28($sp) sw $s2, 24($sp) sw $s3, 20($sp) sw $a0, 16($sp) sw $a1, 12($sp) sw $a2, 8($sp) addi $fp, $sp, 40 li $s0, 0x0 li $s1, 0x0 la $s2, 0($a1) la $s3, 0($a0) add_loop: take_nth_bit($t4, $s2, $zero) la $t5, 0($a0) la $a0, 0($t4) jal bit_repeat la $t4, 0($v0) and $t7, $s3, $t4 la $a0, 0($s1) la $a1, 0($t7) li $a2, '+' jal au_logical la $s1, 0($v0) li $t6, 0x1 li $t4, 0x1f srlv $s2, $s2, $t6 take_nth_bit($t8, $s1, $zero) put_value_to_nth_bit($s2, $t4, $t8, $t9) srlv $s1, $s1, $t6 addi $s0, $s0, 0x1 beq $s0, 0x20, mult_unsigned_end j add_loop mult_unsigned_end: move $v0, $s2 move $v1, $s1 lw $fp, 40($sp) lw $ra, 36($sp) lw $s0, 32($sp) lw $s1, 28($sp) lw $s2, 24($sp) lw $s3, 20($sp) lw $a0, 16($sp) lw $a1, 12($sp) lw $a2, 8($sp) addi $sp, $sp, 40 jr $ra mult_signed: addi $sp, $sp, -44 sw $s1, 44($sp) sw $s0, 40($sp) sw $s7, 36($sp) sw $fp, 32($sp) sw $ra, 28($sp) sw $s4, 24($sp) sw $s5, 20($sp) sw $s6, 16($sp) sw $a0, 12($sp) sw $a1, 8($sp) addi $fp, $sp, 44 # start from la $s4, 0($a0) # begin with N1 la $s5, 0($a1) # begin with N2 jal twos_complement_add la $s7, 0($v0) la $a0, 0($a1) jal twos_complement_add la $a1, 0($v0) la $a0, 0($s7) jal mult_unsigned addi $t7, $zero, 31 take_nth_bit($s1, $s4, $t7) take_nth_bit($s0, $s5, $t7) xor $s6, $s1, $s0 bne $s6, 1, mult_signed_end move $a0, $v0 move $a1, $v1 jal twos_complement_64bit mult_signed_end: lw $s1, 44($sp) lw $s0, 40($sp) lw $s7, 36($sp) lw $fp, 32($sp) lw $ra, 28($sp) lw $s4, 24($sp) lw $s5, 20($sp) lw $s6, 16($sp) lw $a0, 12($sp) lw $a1, 8($sp) addi $sp, $sp, 44 jr $ra twos_complement_add: # store frame addi $sp, $sp, -16 sw $fp, 16($sp) sw $ra, 12($sp) sw $a0, 8($sp) addi $fp, $sp, 16 # start from move $v0 , $a0 bge $a0, 0x0, twos_complement_end jal twos_complement twos_complement_end: # restore frame lw $fp, 16($sp) lw $ra, 12($sp) lw $a0, 8($sp) addi $sp, $sp, 16 jr $ra twos_complement: # store frame addi $sp, $sp, -24 sw $fp, 24($sp) sw $ra, 20($sp) sw $a0, 16($sp) sw $a1, 12($sp) sw $a2, 8($sp) addi $fp, $sp, 24 # begin nor $a0, $a0, $zero # $a0 = ~$a0 addi $a1, $zero, 1 # $a1 = 1 li $a2, '+' jal au_logical # adding ~$a0 and 1 # restore frame lw $fp, 24($sp) lw $ra, 20($sp) lw $a0, 16($sp) lw $a1, 12($sp) lw $a2, 8($sp) addi $sp, $sp, 24 jr $ra bit_repeat: # store frame addi $sp, $sp, -16 sw $fp, 16($sp) sw $ra, 12($sp) sw $a0, 8($sp) addi $fp, $sp, 16 # begin beq $a0, 0x0, repeat_zero li $t0, 0xFFFFFFFF # if !zero j bit_repeat_end repeat_zero: li $t0, 0x0 bit_repeat_end: move $v0, $t0 # return value # restore frame lw $fp, 16($sp) lw $ra, 12($sp) lw $a0, 8($sp) addi $sp, $sp, 16 jr $ra twos_complement_64bit: # store frame addi $sp, $sp, -28 sw $s0, 28($sp) sw $fp, 24($sp) sw $ra, 20($sp) sw $a0, 16($sp) sw $a1, 12($sp) sw $a2, 8($sp) addi $fp, $sp, 28 # begin nor $a0, $a0, $zero nor $a1, $a1, $zero la $s0, 0($a1) addi $a1, $zero, 1 li $a2, '+' jal au_logical la $a1, 0($s0) # move s0 back to a1 la $s0, 0($v0) la $a0, 0($v1) li $a2, '+' jal au_logical move $v1, $v0 # high move $v0, $s0 # low twos_complement_64bit_end: # restore frame lw $s0, 28($sp) lw $fp, 24($sp) lw $ra, 20($sp) lw $a0, 16($sp) lw $a1, 12($sp) lw $a2, 8($sp) addi $sp, $sp, 28 jr $ra div_unsigned: # store the frame addi $sp, $sp, -40 sw $s5, 40($sp) sw $s2, 36($sp) sw $s7, 32($sp) sw $fp, 28($sp) sw $ra, 24($sp) sw $a0, 20($sp) sw $a2, 16($sp) sw $s0, 12($sp) sw $s1, 8($sp) addi $fp, $sp, 40 # start from li $s7, 0x0 # s7 = I = 0 li $s2, 0x0 la $s0, 0($a0) # original values la $s1, 0($a1) div_loop: li $t3, 0x1 sllv $s2, $s2, $t3 li $t3, 0x1f take_nth_bit($t4, $s0, $t3) put_value_to_nth_bit($s2, $zero, $t4, $t5) li $t3, 0x1 sllv $s0, $s0, $t3 la $t6, 0($a0) la $a0, 0($s2) # move R to a0 li $a2, '-' jal au_logical la $s2, 0($a0) la $a0, 0($t6) la $s5, 0($v0) # S = R - D bge $s5, $zero, intermediate_label div_loop_part2: addi $s7, $s7, 0x1 addi $t3, $zero, 32 beq $s7, 32, div_unsigned_end j div_loop intermediate_label: move $s2, $s5 # R = S addi $t3, $zero, 1 # t3 = 1 put_value_to_nth_bit($s0, $zero, $t3, $t6) # Q[0] = 1 j div_loop_part2 div_unsigned_end: move $v0, $s0 move $v1, $s2 #remainder # restore the frame lw $s5, 40($sp) lw $s2, 36($sp) lw $s7, 32($sp) lw $fp, 28($sp) lw $ra, 24($sp) lw $a0, 20($sp) lw $a2, 16($sp) lw $s0, 12($sp) lw $s1, 8($sp) addi $sp, $sp, 40 jr $ra div_signed: # store frame addi $sp, $sp, -48 sw $s5, 48($sp) sw $s6, 44($sp) sw $s7, 40($sp) sw $s3, 36($sp) sw $s2, 32($sp) sw $s1, 28($sp) sw $s0, 24($sp) sw $fp, 20($sp) sw $ra, 16($sp) sw $a0, 12($sp) sw $a1, 8($sp) addi $fp, $sp, 48 la $s0, 0($a0) # a0 begin la $s1, 0($a1) # a1 begin jal twos_complement_add la $s2, 0($v0) la $a0, 0($s1) jal twos_complement_add la $a1, 0($v0) la $a0, 0($s2) jal div_unsigned la $s2, 0($v0) la $s3, 0($v1) li $t4, 0x1f take_nth_bit($s5, $s0, $t4) take_nth_bit($s6, $s1, $t4) xor $s7, $s5, $s6 bne $s7, 1, find_sign_to_R la $a0, 0($s2) jal twos_complement la $s2, 0($v0) find_sign_to_R: la $s7, 0($s5) bne $s7, 1, div_signed_end la $a0, 0($s3) jal twos_complement la $s3, 0($v0) div_signed_end: move $v0, $s2 move $v1, $s3 lw $s5, 48($sp) lw $s6, 44($sp) lw $s7, 40($sp) lw $s3, 36($sp) lw $s2, 32($sp) lw $s1, 28($sp) lw $s0, 24($sp) lw $fp, 20($sp) lw $ra, 16($sp) lw $a0, 12($sp) lw $a1, 8($sp) addi $sp, $sp, 48 jr $ra